1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \ 4; RUN: FileCheck %s --check-prefix=CHECK-LINUX 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 6; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \ 7; RUN: FileCheck %s --check-prefix=CHECK-LINUX-BE 8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \ 9; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \ 10; RUN: FileCheck %s --check-prefix=CHECK-AIX 11; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu \ 12; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \ 13; RUN: FileCheck %s --check-prefix=CHECK-LINUX-32 14; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix-xcoff \ 15; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \ 16; RUN: FileCheck %s --check-prefix=CHECK-AIX-32 17 18declare hidden i32 @call1() 19define hidden void @function1() { 20; CHECK-LINUX-LABEL: function1: 21; CHECK-LINUX: # %bb.0: # %entry 22; CHECK-LINUX-NEXT: mflr r0 23; CHECK-LINUX-NEXT: std r0, 16(r1) 24; CHECK-LINUX-NEXT: stdu r1, -32(r1) 25; CHECK-LINUX-NEXT: .cfi_def_cfa_offset 32 26; CHECK-LINUX-NEXT: .cfi_offset lr, 16 27; CHECK-LINUX-NEXT: bl call1@notoc 28; CHECK-LINUX-NEXT: addi r1, r1, 32 29; CHECK-LINUX-NEXT: ld r0, 16(r1) 30; CHECK-LINUX-NEXT: mtlr r0 31; CHECK-LINUX-NEXT: blr 32; 33; CHECK-LINUX-BE-LABEL: function1: 34; CHECK-LINUX-BE: # %bb.0: # %entry 35; CHECK-LINUX-BE-NEXT: mflr r0 36; CHECK-LINUX-BE-NEXT: std r0, 16(r1) 37; CHECK-LINUX-BE-NEXT: stdu r1, -112(r1) 38; CHECK-LINUX-BE-NEXT: .cfi_def_cfa_offset 112 39; CHECK-LINUX-BE-NEXT: .cfi_offset lr, 16 40; CHECK-LINUX-BE-NEXT: bl call1 41; CHECK-LINUX-BE-NEXT: nop 42; CHECK-LINUX-BE-NEXT: addi r1, r1, 112 43; CHECK-LINUX-BE-NEXT: ld r0, 16(r1) 44; CHECK-LINUX-BE-NEXT: mtlr r0 45; CHECK-LINUX-BE-NEXT: blr 46; 47; CHECK-AIX-LABEL: function1: 48; CHECK-AIX: # %bb.0: # %entry 49; CHECK-AIX-NEXT: mflr r0 50; CHECK-AIX-NEXT: std r0, 16(r1) 51; CHECK-AIX-NEXT: stdu r1, -112(r1) 52; CHECK-AIX-NEXT: bl .call1[PR] 53; CHECK-AIX-NEXT: nop 54; CHECK-AIX-NEXT: addi r1, r1, 112 55; CHECK-AIX-NEXT: ld r0, 16(r1) 56; CHECK-AIX-NEXT: mtlr r0 57; CHECK-AIX-NEXT: blr 58; 59; CHECK-LINUX-32-LABEL: function1: 60; CHECK-LINUX-32: # %bb.0: # %entry 61; CHECK-LINUX-32-NEXT: mflr r0 62; CHECK-LINUX-32-NEXT: stw r0, 4(r1) 63; CHECK-LINUX-32-NEXT: stwu r1, -32(r1) 64; CHECK-LINUX-32-NEXT: .cfi_def_cfa_offset 32 65; CHECK-LINUX-32-NEXT: .cfi_offset lr, 4 66; CHECK-LINUX-32-NEXT: bl call1 67; CHECK-LINUX-32-NEXT: stw r3, 16(r1) 68; CHECK-LINUX-32-NEXT: lwz r0, 36(r1) 69; CHECK-LINUX-32-NEXT: addi r1, r1, 32 70; CHECK-LINUX-32-NEXT: mtlr r0 71; CHECK-LINUX-32-NEXT: blr 72; 73; CHECK-AIX-32-LABEL: function1: 74; CHECK-AIX-32: # %bb.0: # %entry 75; CHECK-AIX-32-NEXT: mflr r0 76; CHECK-AIX-32-NEXT: stw r0, 8(r1) 77; CHECK-AIX-32-NEXT: stwu r1, -80(r1) 78; CHECK-AIX-32-NEXT: bl .call1[PR] 79; CHECK-AIX-32-NEXT: nop 80; CHECK-AIX-32-NEXT: stw r3, 64(r1) 81; CHECK-AIX-32-NEXT: addi r1, r1, 80 82; CHECK-AIX-32-NEXT: lwz r0, 8(r1) 83; CHECK-AIX-32-NEXT: mtlr r0 84; CHECK-AIX-32-NEXT: blr 85entry: 86 %tailcall1 = tail call i32 @call1() 87 %0 = insertelement <4 x i32> poison, i32 %tailcall1, i64 1 88 %1 = insertelement <4 x i32> %0, i32 0, i64 2 89 %2 = insertelement <4 x i32> %1, i32 0, i64 3 90 %3 = trunc <4 x i32> %2 to <4 x i8> 91 %4 = icmp eq <4 x i8> %3, zeroinitializer 92 %5 = shufflevector <4 x i1> %4, <4 x i1> poison, <2 x i32> <i32 3, i32 undef> 93 %6 = shufflevector <4 x i1> %4, <4 x i1> poison, <2 x i32> <i32 2, i32 undef> 94 %7 = xor <2 x i1> %5, <i1 true, i1 poison> 95 %8 = shufflevector <2 x i1> %7, <2 x i1> poison, <2 x i32> zeroinitializer 96 %9 = zext <2 x i1> %8 to <2 x i64> 97 %10 = xor <2 x i1> %6, <i1 true, i1 poison> 98 %11 = shufflevector <2 x i1> %10, <2 x i1> poison, <2 x i32> zeroinitializer 99 %12 = zext <2 x i1> %11 to <2 x i64> 100 br label %next_block 101 102next_block: 103 %13 = add <2 x i64> zeroinitializer, %9 104 %14 = add <2 x i64> zeroinitializer, %12 105 %shift704 = shufflevector <2 x i64> %13, <2 x i64> poison, <2 x i32> <i32 1, i32 undef> 106 %15 = add <2 x i64> %shift704, %13 107 %shift705 = shufflevector <2 x i64> %14, <2 x i64> poison, <2 x i32> <i32 1, i32 undef> 108 %16 = add <2 x i64> %shift705, %14 109 ret void 110} 111