1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 4; RUN: FileCheck %s 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 7; RUN: FileCheck %s --check-prefix=CHECK-BE 8 9; This test case tests spilling the CR UN bit on Power10. On Power10, this is 10; achieved by setb %reg, %CRREG (un bit) -> stw %reg, $FI instead of: 11; mfocrf %reg, %CRREG -> rlwinm %reg1, %reg, $SH, 0, 0 -> stw %reg1, $FI. 12 13; Without fine-grained control over clobbering individual CR bits, 14; it is difficult to produce a concise test case that will ensure a specific 15; bit of any CR field is spilled. We need to test the spilling of a CR bit 16; other than the LT bit. Hence this test case is rather complex. 17 18%0 = type { i32, [768 x i8], [768 x i8], [1024 x i8], [768 x i8], [768 x i8], [768 x i8], [768 x i8], [768 x i8], [1024 x i8], [1024 x i8], i32, i16, i16, i16, i16, i16, i16, i32, i32, i32, i16, i16, i32, i32, i32, i32, i32, i32, i32, i16, i16, i16, i16, [64 x i8], i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, float, float, i32, i16, i16, float, i16, i16, i16, i16} 19%1 = type opaque 20%2 = type { ptr } 21%3 = type { ptr, ptr, ptr, %2, i32, %2, ptr, ptr, ptr, ptr, ptr, ptr, ptr } 22%4 = type { ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, [3 x float], i8, [64 x i8] } 23 24@global_1 = external dso_local unnamed_addr constant [1 x i8], align 1 25@global_2 = external local_unnamed_addr global %0, align 8 26@global_3 = external local_unnamed_addr global ptr, align 8 27@global_4 = external dso_local unnamed_addr constant [14 x i8], align 1 28 29declare i8 @call_1(ptr) local_unnamed_addr 30declare i32 @call_2(ptr, ptr) local_unnamed_addr 31declare i32 @call_3(ptr, ptr) local_unnamed_addr 32declare ptr @call_4(ptr, i32, i32, i32, i32, i32, i16, i16, ptr, ptr, i32, float, float, float, float, ptr) local_unnamed_addr 33declare i32 @call_5(ptr) local_unnamed_addr 34declare i8 @call_6(ptr, i32) local_unnamed_addr 35 36define dso_local void @P10_Spill_CR_UN(ptr %arg, ptr %arg1, i32 %arg2) local_unnamed_addr { 37; CHECK-LABEL: P10_Spill_CR_UN: 38; CHECK: # %bb.0: # %bb 39; CHECK-NEXT: mfcr r12 40; CHECK-NEXT: mflr r0 41; CHECK-NEXT: std r0, 16(r1) 42; CHECK-NEXT: stw r12, 8(r1) 43; CHECK-NEXT: stdu r1, -224(r1) 44; CHECK-NEXT: .cfi_def_cfa_offset 224 45; CHECK-NEXT: .cfi_offset lr, 16 46; CHECK-NEXT: .cfi_offset r27, -40 47; CHECK-NEXT: .cfi_offset r28, -32 48; CHECK-NEXT: .cfi_offset r29, -24 49; CHECK-NEXT: .cfi_offset r30, -16 50; CHECK-NEXT: .cfi_offset cr2, 8 51; CHECK-NEXT: .cfi_offset cr3, 8 52; CHECK-NEXT: .cfi_offset cr4, 8 53; CHECK-NEXT: std r29, 200(r1) # 8-byte Folded Spill 54; CHECK-NEXT: std r30, 208(r1) # 8-byte Folded Spill 55; CHECK-NEXT: mr r29, r3 56; CHECK-NEXT: mr r3, r4 57; CHECK-NEXT: mr r30, r4 58; CHECK-NEXT: std r27, 184(r1) # 8-byte Folded Spill 59; CHECK-NEXT: std r28, 192(r1) # 8-byte Folded Spill 60; CHECK-NEXT: mr r28, r5 61; CHECK-NEXT: bl call_1@notoc 62; CHECK-NEXT: cmpwi r3, 0 63; CHECK-NEXT: mr r3, r29 64; CHECK-NEXT: mr r4, r30 65; CHECK-NEXT: crnot 4*cr2+eq, eq 66; CHECK-NEXT: bl call_2@notoc 67; CHECK-NEXT: mr r27, r3 68; CHECK-NEXT: srwi r3, r28, 4 69; CHECK-NEXT: andi. r3, r3, 1 70; CHECK-NEXT: crmove 4*cr2+gt, gt 71; CHECK-NEXT: bc 12, 4*cr5+lt, .LBB0_2 72; CHECK-NEXT: # %bb.1: # %bb9 73; CHECK-NEXT: mr r3, r29 74; CHECK-NEXT: mr r4, r30 75; CHECK-NEXT: bl call_3@notoc 76; CHECK-NEXT: .LBB0_2: # %bb12 77; CHECK-NEXT: srwi r3, r28, 7 78; CHECK-NEXT: andi. r3, r3, 1 79; CHECK-NEXT: crmove 4*cr2+un, gt 80; CHECK-NEXT: bc 12, 4*cr2+eq, .LBB0_7 81; CHECK-NEXT: # %bb.3: # %bb37 82; CHECK-NEXT: lwz r28, 0(r3) 83; CHECK-NEXT: bc 12, 4*cr5+lt, .LBB0_5 84; CHECK-NEXT: # %bb.4: # %bb37 85; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_14 86; CHECK-NEXT: .LBB0_5: # %bb42 87; CHECK-NEXT: paddi r3, 0, global_1@PCREL, 1 88; CHECK-NEXT: li r4, 0 89; CHECK-NEXT: cmpwi r28, 0 90; CHECK-NEXT: isel r3, r3, r4, 4*cr2+gt 91; CHECK-NEXT: crnot 4*cr2+lt, eq 92; CHECK-NEXT: bl call_5@notoc 93; CHECK-NEXT: pld r3, global_2@got@pcrel(0), 1 94; CHECK-NEXT: addi r3, r3, 8682 95; CHECK-NEXT: lxsihzx v2, 0, r3 96; CHECK-NEXT: vextsh2d v2, v2 97; CHECK-NEXT: xscvsxdsp f0, v2 98; CHECK-NEXT: bc 12, 4*cr2+lt, .LBB0_12 99; CHECK-NEXT: # %bb.6: # %bb42 100; CHECK-NEXT: xxspltidp vs1, 1069547520 101; CHECK-NEXT: b .LBB0_13 102; CHECK-NEXT: .LBB0_7: # %bb19 103; CHECK-NEXT: setnbc r3, 4*cr2+un 104; CHECK-NEXT: paddi r4, 0, global_4@PCREL, 1 105; CHECK-NEXT: stw r3, 176(r1) 106; CHECK-NEXT: pld r3, global_3@got@pcrel(0), 1 107; CHECK-NEXT: .Lpcrel0: 108; CHECK-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) 109; CHECK-NEXT: ld r12, 0(r3) 110; CHECK-NEXT: mtctr r12 111; CHECK-NEXT: bctrl 112; CHECK-NEXT: cmpdi cr4, r3, 0 113; CHECK-NEXT: andi. r3, r28, 4 114; CHECK-NEXT: cmpwi cr2, r27, 0 115; CHECK-NEXT: mcrf cr3, cr0 116; CHECK-NEXT: .p2align 5 117; CHECK-NEXT: .LBB0_8: # %bb27 118; CHECK-NEXT: # 119; CHECK-NEXT: mr r3, r30 120; CHECK-NEXT: li r4, 0 121; CHECK-NEXT: bl call_6@notoc 122; CHECK-NEXT: bc 4, 4*cr4+eq, .LBB0_18 123; CHECK-NEXT: # %bb.9: # %bb31 124; CHECK-NEXT: # 125; CHECK-NEXT: bc 4, 4*cr3+eq, .LBB0_18 126; CHECK-NEXT: # %bb.10: # %bb33 127; CHECK-NEXT: # 128; CHECK-NEXT: bc 4, 4*cr2+eq, .LBB0_8 129; CHECK-NEXT: # %bb.11: # %bb36 130; CHECK-NEXT: stb r3, 181(r1) 131; CHECK-NEXT: # implicit-def: $cr2un 132; CHECK-NEXT: mfocrf r3, 32 133; CHECK-NEXT: lwz r4, 176(r1) 134; CHECK-NEXT: rlwimi r3, r4, 21, 11, 11 135; CHECK-NEXT: mtocrf 32, r3 136; CHECK-NEXT: b .LBB0_16 137; CHECK-NEXT: .LBB0_12: 138; CHECK-NEXT: xxspltidp vs1, 1071644672 139; CHECK-NEXT: .LBB0_13: # %bb42 140; CHECK-NEXT: xsmulsp f0, f1, f0 141; CHECK-NEXT: xscvdpsxws f0, f0 142; CHECK-NEXT: mffprwz r3, f0 143; CHECK-NEXT: b .LBB0_15 144; CHECK-NEXT: .LBB0_14: # %bb41 145; CHECK-NEXT: # implicit-def: $r3 146; CHECK-NEXT: .LBB0_15: # %bb50 147; CHECK-NEXT: li r4, 0 148; CHECK-NEXT: xxspltidp vs3, -1082130432 149; CHECK-NEXT: xxspltidp vs4, -1082130432 150; CHECK-NEXT: extsh r9, r3 151; CHECK-NEXT: extsw r6, r28 152; CHECK-NEXT: li r5, 0 153; CHECK-NEXT: li r7, 0 154; CHECK-NEXT: std r30, 104(r1) 155; CHECK-NEXT: std r29, 96(r1) 156; CHECK-NEXT: li r8, 0 157; CHECK-NEXT: li r10, 0 158; CHECK-NEXT: xxlxor f1, f1, f1 159; CHECK-NEXT: std r4, 152(r1) 160; CHECK-NEXT: li r4, -1 161; CHECK-NEXT: std r4, 112(r1) 162; CHECK-NEXT: li r4, 1024 163; CHECK-NEXT: bl call_4@notoc 164; CHECK-NEXT: .LBB0_16: # %bb54 165; CHECK-NEXT: bc 12, 4*cr2+un, .LBB0_19 166; CHECK-NEXT: # %bb.17: # %bb56 167; CHECK-NEXT: ld r30, 208(r1) # 8-byte Folded Reload 168; CHECK-NEXT: ld r29, 200(r1) # 8-byte Folded Reload 169; CHECK-NEXT: ld r28, 192(r1) # 8-byte Folded Reload 170; CHECK-NEXT: ld r27, 184(r1) # 8-byte Folded Reload 171; CHECK-NEXT: addi r1, r1, 224 172; CHECK-NEXT: ld r0, 16(r1) 173; CHECK-NEXT: lwz r12, 8(r1) 174; CHECK-NEXT: mtlr r0 175; CHECK-NEXT: mtocrf 32, r12 176; CHECK-NEXT: mtocrf 16, r12 177; CHECK-NEXT: mtocrf 8, r12 178; CHECK-NEXT: blr 179; CHECK-NEXT: .LBB0_18: # %bb30 180; CHECK-NEXT: stb r3, 181(r1) 181; CHECK-NEXT: .LBB0_19: # %bb55 182; 183; CHECK-BE-LABEL: P10_Spill_CR_UN: 184; CHECK-BE: # %bb.0: # %bb 185; CHECK-BE-NEXT: mfcr r12 186; CHECK-BE-NEXT: mflr r0 187; CHECK-BE-NEXT: std r0, 16(r1) 188; CHECK-BE-NEXT: stw r12, 8(r1) 189; CHECK-BE-NEXT: stdu r1, -240(r1) 190; CHECK-BE-NEXT: .cfi_def_cfa_offset 240 191; CHECK-BE-NEXT: .cfi_offset lr, 16 192; CHECK-BE-NEXT: .cfi_offset r27, -40 193; CHECK-BE-NEXT: .cfi_offset r28, -32 194; CHECK-BE-NEXT: .cfi_offset r29, -24 195; CHECK-BE-NEXT: .cfi_offset r30, -16 196; CHECK-BE-NEXT: .cfi_offset cr2, 8 197; CHECK-BE-NEXT: .cfi_offset cr2, 8 198; CHECK-BE-NEXT: .cfi_offset cr2, 8 199; CHECK-BE-NEXT: std r29, 216(r1) # 8-byte Folded Spill 200; CHECK-BE-NEXT: std r30, 224(r1) # 8-byte Folded Spill 201; CHECK-BE-NEXT: mr r29, r3 202; CHECK-BE-NEXT: mr r3, r4 203; CHECK-BE-NEXT: mr r30, r4 204; CHECK-BE-NEXT: std r27, 200(r1) # 8-byte Folded Spill 205; CHECK-BE-NEXT: std r28, 208(r1) # 8-byte Folded Spill 206; CHECK-BE-NEXT: mr r28, r5 207; CHECK-BE-NEXT: bl call_1 208; CHECK-BE-NEXT: nop 209; CHECK-BE-NEXT: cmpwi r3, 0 210; CHECK-BE-NEXT: mr r3, r29 211; CHECK-BE-NEXT: mr r4, r30 212; CHECK-BE-NEXT: crnot 4*cr2+eq, eq 213; CHECK-BE-NEXT: bl call_2 214; CHECK-BE-NEXT: nop 215; CHECK-BE-NEXT: mr r27, r3 216; CHECK-BE-NEXT: srwi r3, r28, 4 217; CHECK-BE-NEXT: andi. r3, r3, 1 218; CHECK-BE-NEXT: crmove 4*cr2+gt, gt 219; CHECK-BE-NEXT: bc 12, 4*cr5+lt, .LBB0_2 220; CHECK-BE-NEXT: # %bb.1: # %bb9 221; CHECK-BE-NEXT: mr r3, r29 222; CHECK-BE-NEXT: mr r4, r30 223; CHECK-BE-NEXT: bl call_3 224; CHECK-BE-NEXT: nop 225; CHECK-BE-NEXT: .LBB0_2: # %bb12 226; CHECK-BE-NEXT: srwi r3, r28, 7 227; CHECK-BE-NEXT: andi. r3, r3, 1 228; CHECK-BE-NEXT: crmove 4*cr2+un, gt 229; CHECK-BE-NEXT: bc 12, 4*cr2+eq, .LBB0_7 230; CHECK-BE-NEXT: # %bb.3: # %bb37 231; CHECK-BE-NEXT: lwz r28, 0(r3) 232; CHECK-BE-NEXT: addis r3, r2, global_1@toc@ha 233; CHECK-BE-NEXT: bc 12, 4*cr5+lt, .LBB0_5 234; CHECK-BE-NEXT: # %bb.4: # %bb37 235; CHECK-BE-NEXT: bc 4, 4*cr5+lt, .LBB0_14 236; CHECK-BE-NEXT: .LBB0_5: # %bb42 237; CHECK-BE-NEXT: addi r3, r3, global_1@toc@l 238; CHECK-BE-NEXT: li r4, 0 239; CHECK-BE-NEXT: cmpwi r28, 0 240; CHECK-BE-NEXT: isel r3, r3, r4, 4*cr2+gt 241; CHECK-BE-NEXT: crnot 4*cr2+lt, eq 242; CHECK-BE-NEXT: bl call_5 243; CHECK-BE-NEXT: nop 244; CHECK-BE-NEXT: addis r3, r2, .LC0@toc@ha 245; CHECK-BE-NEXT: ld r3, .LC0@toc@l(r3) 246; CHECK-BE-NEXT: addi r3, r3, 8682 247; CHECK-BE-NEXT: lxsihzx v2, 0, r3 248; CHECK-BE-NEXT: vextsh2d v2, v2 249; CHECK-BE-NEXT: xscvsxdsp f0, v2 250; CHECK-BE-NEXT: bc 12, 4*cr2+lt, .LBB0_12 251; CHECK-BE-NEXT: # %bb.6: # %bb42 252; CHECK-BE-NEXT: xxspltidp vs1, 1069547520 253; CHECK-BE-NEXT: b .LBB0_13 254; CHECK-BE-NEXT: .LBB0_7: # %bb19 255; CHECK-BE-NEXT: setnbc r3, 4*cr2+un 256; CHECK-BE-NEXT: addis r4, r2, global_4@toc@ha 257; CHECK-BE-NEXT: stw r3, 192(r1) 258; CHECK-BE-NEXT: addis r3, r2, .LC1@toc@ha 259; CHECK-BE-NEXT: std r2, 40(r1) 260; CHECK-BE-NEXT: addi r4, r4, global_4@toc@l 261; CHECK-BE-NEXT: ld r3, .LC1@toc@l(r3) 262; CHECK-BE-NEXT: ld r3, 0(r3) 263; CHECK-BE-NEXT: ld r2, 8(r3) 264; CHECK-BE-NEXT: ld r11, 16(r3) 265; CHECK-BE-NEXT: ld r3, 0(r3) 266; CHECK-BE-NEXT: mtctr r3 267; CHECK-BE-NEXT: bctrl 268; CHECK-BE-NEXT: ld 2, 40(r1) 269; CHECK-BE-NEXT: cmpdi cr4, r3, 0 270; CHECK-BE-NEXT: andi. r3, r28, 4 271; CHECK-BE-NEXT: cmpwi cr2, r27, 0 272; CHECK-BE-NEXT: mcrf cr3, cr0 273; CHECK-BE-NEXT: .p2align 5 274; CHECK-BE-NEXT: .LBB0_8: # %bb27 275; CHECK-BE-NEXT: # 276; CHECK-BE-NEXT: mr r3, r30 277; CHECK-BE-NEXT: li r4, 0 278; CHECK-BE-NEXT: bl call_6 279; CHECK-BE-NEXT: nop 280; CHECK-BE-NEXT: bc 4, 4*cr4+eq, .LBB0_18 281; CHECK-BE-NEXT: # %bb.9: # %bb31 282; CHECK-BE-NEXT: # 283; CHECK-BE-NEXT: bc 4, 4*cr3+eq, .LBB0_18 284; CHECK-BE-NEXT: # %bb.10: # %bb33 285; CHECK-BE-NEXT: # 286; CHECK-BE-NEXT: bc 4, 4*cr2+eq, .LBB0_8 287; CHECK-BE-NEXT: # %bb.11: # %bb36 288; CHECK-BE-NEXT: stb r3, 197(r1) 289; CHECK-BE-NEXT: # implicit-def: $cr2un 290; CHECK-BE-NEXT: mfocrf r3, 32 291; CHECK-BE-NEXT: lwz r4, 192(r1) 292; CHECK-BE-NEXT: rlwimi r3, r4, 21, 11, 11 293; CHECK-BE-NEXT: mtocrf 32, r3 294; CHECK-BE-NEXT: b .LBB0_16 295; CHECK-BE-NEXT: .LBB0_12: 296; CHECK-BE-NEXT: xxspltidp vs1, 1071644672 297; CHECK-BE-NEXT: .LBB0_13: # %bb42 298; CHECK-BE-NEXT: xsmulsp f0, f1, f0 299; CHECK-BE-NEXT: xscvdpsxws f0, f0 300; CHECK-BE-NEXT: mffprwz r3, f0 301; CHECK-BE-NEXT: b .LBB0_15 302; CHECK-BE-NEXT: .LBB0_14: # %bb41 303; CHECK-BE-NEXT: # implicit-def: $r3 304; CHECK-BE-NEXT: .LBB0_15: # %bb50 305; CHECK-BE-NEXT: li r4, 0 306; CHECK-BE-NEXT: xxspltidp vs3, -1082130432 307; CHECK-BE-NEXT: xxspltidp vs4, -1082130432 308; CHECK-BE-NEXT: extsh r9, r3 309; CHECK-BE-NEXT: extsw r6, r28 310; CHECK-BE-NEXT: li r5, 0 311; CHECK-BE-NEXT: li r7, 0 312; CHECK-BE-NEXT: std r30, 120(r1) 313; CHECK-BE-NEXT: std r29, 112(r1) 314; CHECK-BE-NEXT: li r8, 0 315; CHECK-BE-NEXT: li r10, 0 316; CHECK-BE-NEXT: xxlxor f1, f1, f1 317; CHECK-BE-NEXT: std r4, 168(r1) 318; CHECK-BE-NEXT: li r4, -1 319; CHECK-BE-NEXT: std r4, 128(r1) 320; CHECK-BE-NEXT: li r4, 1024 321; CHECK-BE-NEXT: bl call_4 322; CHECK-BE-NEXT: nop 323; CHECK-BE-NEXT: .LBB0_16: # %bb54 324; CHECK-BE-NEXT: bc 12, 4*cr2+un, .LBB0_19 325; CHECK-BE-NEXT: # %bb.17: # %bb56 326; CHECK-BE-NEXT: ld r30, 224(r1) # 8-byte Folded Reload 327; CHECK-BE-NEXT: ld r29, 216(r1) # 8-byte Folded Reload 328; CHECK-BE-NEXT: ld r28, 208(r1) # 8-byte Folded Reload 329; CHECK-BE-NEXT: ld r27, 200(r1) # 8-byte Folded Reload 330; CHECK-BE-NEXT: addi r1, r1, 240 331; CHECK-BE-NEXT: ld r0, 16(r1) 332; CHECK-BE-NEXT: lwz r12, 8(r1) 333; CHECK-BE-NEXT: mtlr r0 334; CHECK-BE-NEXT: mtocrf 32, r12 335; CHECK-BE-NEXT: mtocrf 16, r12 336; CHECK-BE-NEXT: mtocrf 8, r12 337; CHECK-BE-NEXT: blr 338; CHECK-BE-NEXT: .LBB0_18: # %bb30 339; CHECK-BE-NEXT: stb r3, 197(r1) 340; CHECK-BE-NEXT: .LBB0_19: # %bb55 341bb: 342 %tmp = alloca [3 x i8], align 1 343 %tmp3 = tail call zeroext i8 @call_1(ptr %arg1) 344 %tmp4 = icmp ne i8 %tmp3, 0 345 %tmp5 = tail call signext i32 @call_2(ptr %arg, ptr %arg1) 346 %tmp6 = and i32 %arg2, 16 347 %tmp7 = icmp ne i32 %tmp6, 0 348 br label %bb8 349 350bb8: ; preds = %bb 351 br i1 undef, label %bb9, label %bb11 352 353bb9: ; preds = %bb8 354 %tmp10 = call signext i32 @call_3(ptr %arg, ptr %arg1) 355 br label %bb12 356 357bb11: ; preds = %bb8 358 br label %bb12 359 360bb12: ; preds = %bb11, %bb9 361 %tmp13 = and i32 %arg2, 4 362 %tmp14 = and i32 %arg2, 128 363 %tmp15 = icmp ne i32 %tmp14, 0 364 br label %bb16 365 366bb16: ; preds = %bb12 367 %tmp17 = xor i1 %tmp4, true 368 %tmp18 = or i1 false, %tmp17 369 br i1 %tmp18, label %bb37, label %bb19 370 371bb19: ; preds = %bb16 372 %tmp21 = load ptr, ptr @global_3, align 8 373 %tmp22 = call ptr %tmp21(i64 undef, ptr @global_4) 374 %tmp24 = icmp eq ptr %tmp22, null 375 %tmp25 = icmp eq i32 %tmp13, 0 376 %tmp26 = zext i32 %tmp5 to i64 377 br label %bb27 378 379bb27: ; preds = %bb34, %bb19 380 %tmp28 = call zeroext i8 @call_6(ptr %arg1, i32 signext undef) 381 store i8 %tmp28, ptr %tmp, align 1 382 br label %bb29 383 384bb29: ; preds = %bb27 385 br i1 %tmp24, label %bb31, label %bb30 386 387bb30: ; preds = %bb29 388 unreachable 389 390bb31: ; preds = %bb29 391 br i1 %tmp25, label %bb33, label %bb32 392 393bb32: ; preds = %bb31 394 unreachable 395 396bb33: ; preds = %bb31 397 br label %bb34 398 399bb34: ; preds = %bb33 400 %tmp35 = icmp eq i64 0, %tmp26 401 br i1 %tmp35, label %bb36, label %bb27 402 403bb36: ; preds = %bb34 404 br label %bb54 405 406bb37: ; preds = %bb16 407 %tmp38 = load i32, ptr undef, align 8 408 %tmp39 = select i1 %tmp7, ptr @global_1, ptr null 409 %tmp40 = icmp ne i32 %tmp38, 0 410 switch i32 undef, label %bb41 [ 411 i32 1, label %bb42 412 i32 4, label %bb42 413 ] 414 415bb41: ; preds = %bb37 416 br label %bb50 417 418bb42: ; preds = %bb37, %bb37 419 %tmp43 = call signext i32 @call_5(ptr %tmp39) 420 %tmp44 = load i16, ptr getelementptr inbounds (%0, ptr @global_2, i64 0, i32 81), align 4 421 %tmp45 = sitofp i16 %tmp44 to float 422 %tmp46 = select i1 %tmp40, float 1.750000e+00, float 1.500000e+00 423 %tmp47 = fmul fast float %tmp46, %tmp45 424 %tmp48 = fadd fast float %tmp47, 0.000000e+00 425 %tmp49 = fptosi float %tmp48 to i32 426 br label %bb50 427 428bb50: ; preds = %bb42, %bb41 429 %tmp51 = phi i32 [ %tmp49, %bb42 ], [ undef, %bb41 ] 430 %tmp52 = trunc i32 %tmp51 to i16 431 %tmp53 = call ptr @call_4(ptr nonnull undef, i32 signext 1024, i32 signext 0, i32 signext %tmp38, i32 signext 0, i32 signext 0, i16 signext %tmp52, i16 signext undef, ptr %arg, ptr %arg1, i32 signext -1, float 0.000000e+00, float undef, float -1.000000e+00, float -1.000000e+00, ptr null) 432 br label %bb54 433 434bb54: ; preds = %bb50, %bb36 435 br i1 %tmp15, label %bb55, label %bb56 436 437bb55: ; preds = %bb54 438 unreachable 439 440bb56: ; preds = %bb54 441 ret void 442} 443