1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -ppc-min-jump-table-entries=4 < %s | \ 4; RUN: FileCheck %s 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -ppc-min-jump-table-entries=4 < %s | \ 7; RUN: FileCheck %s --check-prefix=CHECK-BE 8 9; This test case tests spilling the CR GT bit on Power10. On Power10, this is 10; achieved by setb %reg, %CRREG (gt bit) -> stw %reg, $FI instead of: 11; mfocrf %reg, %CRREG -> rlwinm %reg1, %reg, $SH, 0, 0 -> stw %reg1, $FI. 12 13; Without fine-grained control over clobbering individual CR bits, 14; it is difficult to produce a concise test case that will ensure a specific 15; bit of any CR field is spilled. We need to test the spilling of a CR bit 16; other than the LT bit. Hence this test case is rather complex. 17 18define dso_local fastcc void @P10_Spill_CR_GT() unnamed_addr { 19; CHECK-LABEL: P10_Spill_CR_GT: 20; CHECK: # %bb.0: # %bb 21; CHECK-NEXT: mfcr r12 22; CHECK-NEXT: mflr r0 23; CHECK-NEXT: std r0, 16(r1) 24; CHECK-NEXT: stw r12, 8(r1) 25; CHECK-NEXT: stdu r1, -64(r1) 26; CHECK-NEXT: .cfi_def_cfa_offset 64 27; CHECK-NEXT: .cfi_offset lr, 16 28; CHECK-NEXT: .cfi_offset r29, -24 29; CHECK-NEXT: .cfi_offset r30, -16 30; CHECK-NEXT: .cfi_offset cr2, 8 31; CHECK-NEXT: .cfi_offset cr3, 8 32; CHECK-NEXT: .cfi_offset cr4, 8 33; CHECK-NEXT: lwz r3, 0(r3) 34; CHECK-NEXT: std r29, 40(r1) # 8-byte Folded Spill 35; CHECK-NEXT: std r30, 48(r1) # 8-byte Folded Spill 36; CHECK-NEXT: crxor 4*cr2+eq, 4*cr2+eq, 4*cr2+eq 37; CHECK-NEXT: paddi r29, 0, .LJTI0_0@PCREL, 1 38; CHECK-NEXT: srwi r4, r3, 4 39; CHECK-NEXT: srwi r3, r3, 5 40; CHECK-NEXT: andi. r4, r4, 1 41; CHECK-NEXT: li r4, 0 42; CHECK-NEXT: crmove 4*cr2+gt, gt 43; CHECK-NEXT: andi. r3, r3, 1 44; CHECK-NEXT: li r3, 0 45; CHECK-NEXT: crmove 4*cr2+lt, gt 46; CHECK-NEXT: sldi r30, r3, 2 47; CHECK-NEXT: b .LBB0_2 48; CHECK-NEXT: .LBB0_1: # %bb43 49; CHECK-NEXT: # 50; CHECK-NEXT: bl call_1@notoc 51; CHECK-NEXT: setnbc r3, 4*cr3+eq 52; CHECK-NEXT: li r4, 0 53; CHECK-NEXT: stb r4, 0(r3) 54; CHECK-NEXT: li r4, 0 55; CHECK-NEXT: .p2align 4 56; CHECK-NEXT: .LBB0_2: # %bb5 57; CHECK-NEXT: # 58; CHECK-NEXT: bc 12, 4*cr2+gt, .LBB0_31 59; CHECK-NEXT: # %bb.3: # %bb10 60; CHECK-NEXT: # 61; CHECK-NEXT: bc 12, 4*cr2+eq, .LBB0_5 62; CHECK-NEXT: # %bb.4: # %bb10 63; CHECK-NEXT: # 64; CHECK-NEXT: mr r3, r4 65; CHECK-NEXT: lwz r5, 0(r3) 66; CHECK-NEXT: rlwinm r4, r5, 0, 21, 22 67; CHECK-NEXT: cmpwi cr3, r4, 512 68; CHECK-NEXT: lwax r4, r30, r29 69; CHECK-NEXT: add r4, r4, r29 70; CHECK-NEXT: mtctr r4 71; CHECK-NEXT: li r4, 0 72; CHECK-NEXT: bctr 73; CHECK-NEXT: .LBB0_5: # %bb13 74; CHECK-NEXT: # 75; CHECK-NEXT: li r4, 16 76; CHECK-NEXT: b .LBB0_2 77; CHECK-NEXT: .p2align 4 78; CHECK-NEXT: .LBB0_6: # %bb28 79; CHECK-NEXT: # 80; CHECK-NEXT: b .LBB0_6 81; CHECK-NEXT: .p2align 4 82; CHECK-NEXT: .LBB0_7: # %bb22 83; CHECK-NEXT: # 84; CHECK-NEXT: b .LBB0_7 85; CHECK-NEXT: .p2align 4 86; CHECK-NEXT: .LBB0_8: # %bb52 87; CHECK-NEXT: # 88; CHECK-NEXT: b .LBB0_8 89; CHECK-NEXT: .p2align 4 90; CHECK-NEXT: .LBB0_9: # %bb17 91; CHECK-NEXT: # 92; CHECK-NEXT: b .LBB0_9 93; CHECK-NEXT: .p2align 4 94; CHECK-NEXT: .LBB0_10: # %bb26 95; CHECK-NEXT: # 96; CHECK-NEXT: b .LBB0_10 97; CHECK-NEXT: .p2align 4 98; CHECK-NEXT: .LBB0_11: # %bb42 99; CHECK-NEXT: # 100; CHECK-NEXT: b .LBB0_11 101; CHECK-NEXT: .p2align 4 102; CHECK-NEXT: .LBB0_12: # %bb54 103; CHECK-NEXT: # 104; CHECK-NEXT: b .LBB0_12 105; CHECK-NEXT: .p2align 4 106; CHECK-NEXT: .LBB0_13: # %bb49 107; CHECK-NEXT: # 108; CHECK-NEXT: b .LBB0_13 109; CHECK-NEXT: .p2align 4 110; CHECK-NEXT: .LBB0_14: # %bb59 111; CHECK-NEXT: # 112; CHECK-NEXT: b .LBB0_14 113; CHECK-NEXT: .p2align 4 114; CHECK-NEXT: .LBB0_15: # %bb57 115; CHECK-NEXT: # 116; CHECK-NEXT: b .LBB0_15 117; CHECK-NEXT: .p2align 4 118; CHECK-NEXT: .LBB0_16: # %bb18 119; CHECK-NEXT: # 120; CHECK-NEXT: b .LBB0_16 121; CHECK-NEXT: .p2align 4 122; CHECK-NEXT: .LBB0_17: # %bb46 123; CHECK-NEXT: # 124; CHECK-NEXT: b .LBB0_17 125; CHECK-NEXT: .p2align 4 126; CHECK-NEXT: .LBB0_18: # %bb19 127; CHECK-NEXT: # 128; CHECK-NEXT: b .LBB0_18 129; CHECK-NEXT: .p2align 4 130; CHECK-NEXT: .LBB0_19: # %bb61 131; CHECK-NEXT: # 132; CHECK-NEXT: b .LBB0_19 133; CHECK-NEXT: .p2align 4 134; CHECK-NEXT: .LBB0_20: # %bb24 135; CHECK-NEXT: # 136; CHECK-NEXT: b .LBB0_20 137; CHECK-NEXT: .p2align 4 138; CHECK-NEXT: .LBB0_21: # %bb47 139; CHECK-NEXT: # 140; CHECK-NEXT: b .LBB0_21 141; CHECK-NEXT: .p2align 4 142; CHECK-NEXT: .LBB0_22: # %bb58 143; CHECK-NEXT: # 144; CHECK-NEXT: b .LBB0_22 145; CHECK-NEXT: .p2align 4 146; CHECK-NEXT: .LBB0_23: # %bb48 147; CHECK-NEXT: # 148; CHECK-NEXT: b .LBB0_23 149; CHECK-NEXT: .p2align 4 150; CHECK-NEXT: .LBB0_24: # %bb55 151; CHECK-NEXT: # 152; CHECK-NEXT: b .LBB0_24 153; CHECK-NEXT: .p2align 4 154; CHECK-NEXT: .LBB0_25: # %bb20 155; CHECK-NEXT: # 156; CHECK-NEXT: b .LBB0_25 157; CHECK-NEXT: .p2align 4 158; CHECK-NEXT: .LBB0_26: # %bb60 159; CHECK-NEXT: # 160; CHECK-NEXT: b .LBB0_26 161; CHECK-NEXT: .p2align 4 162; CHECK-NEXT: .LBB0_27: # %bb56 163; CHECK-NEXT: # 164; CHECK-NEXT: b .LBB0_27 165; CHECK-NEXT: .p2align 4 166; CHECK-NEXT: .LBB0_28: # %bb50 167; CHECK-NEXT: # 168; CHECK-NEXT: b .LBB0_28 169; CHECK-NEXT: .p2align 4 170; CHECK-NEXT: .LBB0_29: # %bb23 171; CHECK-NEXT: # 172; CHECK-NEXT: b .LBB0_29 173; CHECK-NEXT: .p2align 4 174; CHECK-NEXT: .LBB0_30: # %bb62 175; CHECK-NEXT: # 176; CHECK-NEXT: b .LBB0_30 177; CHECK-NEXT: .LBB0_31: # %bb9 178; CHECK-NEXT: ld r30, 48(r1) # 8-byte Folded Reload 179; CHECK-NEXT: ld r29, 40(r1) # 8-byte Folded Reload 180; CHECK-NEXT: addi r1, r1, 64 181; CHECK-NEXT: ld r0, 16(r1) 182; CHECK-NEXT: lwz r12, 8(r1) 183; CHECK-NEXT: mtlr r0 184; CHECK-NEXT: mtocrf 32, r12 185; CHECK-NEXT: mtocrf 16, r12 186; CHECK-NEXT: mtocrf 8, r12 187; CHECK-NEXT: blr 188; CHECK-NEXT: .LBB0_32: # %bb29 189; CHECK-NEXT: crmove eq, 4*cr3+eq 190; CHECK-NEXT: cmpwi cr3, r5, 366 191; CHECK-NEXT: cmpwi cr4, r3, 0 192; CHECK-NEXT: li r29, 0 193; CHECK-NEXT: setnbc r30, eq 194; CHECK-NEXT: bc 12, 4*cr2+lt, .LBB0_36 195; CHECK-NEXT: .p2align 5 196; CHECK-NEXT: .LBB0_33: # %bb36 197; CHECK-NEXT: bc 12, 4*cr4+eq, .LBB0_35 198; CHECK-NEXT: .LBB0_34: # %bb32 199; CHECK-NEXT: bc 4, 4*cr2+lt, .LBB0_33 200; CHECK-NEXT: b .LBB0_36 201; CHECK-NEXT: .p2align 5 202; CHECK-NEXT: .LBB0_35: # %bb39 203; CHECK-NEXT: bl call_2@notoc 204; CHECK-NEXT: bc 4, 4*cr2+lt, .LBB0_33 205; CHECK-NEXT: .LBB0_36: # %bb33 206; CHECK-NEXT: stb r29, 0(r30) 207; CHECK-NEXT: bc 4, 4*cr4+eq, .LBB0_34 208; CHECK-NEXT: b .LBB0_35 209; 210; CHECK-BE-LABEL: P10_Spill_CR_GT: 211; CHECK-BE: # %bb.0: # %bb 212; CHECK-BE-NEXT: mfcr r12 213; CHECK-BE-NEXT: mflr r0 214; CHECK-BE-NEXT: std r0, 16(r1) 215; CHECK-BE-NEXT: stw r12, 8(r1) 216; CHECK-BE-NEXT: stdu r1, -144(r1) 217; CHECK-BE-NEXT: .cfi_def_cfa_offset 144 218; CHECK-BE-NEXT: .cfi_offset lr, 16 219; CHECK-BE-NEXT: .cfi_offset r29, -24 220; CHECK-BE-NEXT: .cfi_offset r30, -16 221; CHECK-BE-NEXT: .cfi_offset cr2, 8 222; CHECK-BE-NEXT: .cfi_offset cr2, 8 223; CHECK-BE-NEXT: .cfi_offset cr2, 8 224; CHECK-BE-NEXT: lwz r3, 0(r3) 225; CHECK-BE-NEXT: std r29, 120(r1) # 8-byte Folded Spill 226; CHECK-BE-NEXT: std r30, 128(r1) # 8-byte Folded Spill 227; CHECK-BE-NEXT: crxor 4*cr2+eq, 4*cr2+eq, 4*cr2+eq 228; CHECK-BE-NEXT: srwi r4, r3, 4 229; CHECK-BE-NEXT: srwi r3, r3, 5 230; CHECK-BE-NEXT: andi. r4, r4, 1 231; CHECK-BE-NEXT: li r4, 0 232; CHECK-BE-NEXT: crmove 4*cr2+gt, gt 233; CHECK-BE-NEXT: andi. r3, r3, 1 234; CHECK-BE-NEXT: li r3, 0 235; CHECK-BE-NEXT: crmove 4*cr2+lt, gt 236; CHECK-BE-NEXT: sldi r30, r3, 2 237; CHECK-BE-NEXT: addis r3, r2, .LC0@toc@ha 238; CHECK-BE-NEXT: ld r29, .LC0@toc@l(r3) 239; CHECK-BE-NEXT: b .LBB0_2 240; CHECK-BE-NEXT: .LBB0_1: # %bb43 241; CHECK-BE-NEXT: # 242; CHECK-BE-NEXT: bl call_1 243; CHECK-BE-NEXT: nop 244; CHECK-BE-NEXT: setnbc r3, 4*cr3+eq 245; CHECK-BE-NEXT: li r4, 0 246; CHECK-BE-NEXT: stb r4, 0(r3) 247; CHECK-BE-NEXT: li r4, 0 248; CHECK-BE-NEXT: .p2align 4 249; CHECK-BE-NEXT: .LBB0_2: # %bb5 250; CHECK-BE-NEXT: # 251; CHECK-BE-NEXT: bc 12, 4*cr2+gt, .LBB0_31 252; CHECK-BE-NEXT: # %bb.3: # %bb10 253; CHECK-BE-NEXT: # 254; CHECK-BE-NEXT: bc 12, 4*cr2+eq, .LBB0_5 255; CHECK-BE-NEXT: # %bb.4: # %bb10 256; CHECK-BE-NEXT: # 257; CHECK-BE-NEXT: mr r3, r4 258; CHECK-BE-NEXT: lwz r5, 0(r3) 259; CHECK-BE-NEXT: rlwinm r4, r5, 0, 21, 22 260; CHECK-BE-NEXT: cmpwi cr3, r4, 512 261; CHECK-BE-NEXT: lwax r4, r30, r29 262; CHECK-BE-NEXT: add r4, r4, r29 263; CHECK-BE-NEXT: mtctr r4 264; CHECK-BE-NEXT: li r4, 0 265; CHECK-BE-NEXT: bctr 266; CHECK-BE-NEXT: .LBB0_5: # %bb13 267; CHECK-BE-NEXT: # 268; CHECK-BE-NEXT: li r4, 16 269; CHECK-BE-NEXT: b .LBB0_2 270; CHECK-BE-NEXT: .p2align 4 271; CHECK-BE-NEXT: .LBB0_6: # %bb28 272; CHECK-BE-NEXT: # 273; CHECK-BE-NEXT: b .LBB0_6 274; CHECK-BE-NEXT: .p2align 4 275; CHECK-BE-NEXT: .LBB0_7: # %bb22 276; CHECK-BE-NEXT: # 277; CHECK-BE-NEXT: b .LBB0_7 278; CHECK-BE-NEXT: .p2align 4 279; CHECK-BE-NEXT: .LBB0_8: # %bb52 280; CHECK-BE-NEXT: # 281; CHECK-BE-NEXT: b .LBB0_8 282; CHECK-BE-NEXT: .p2align 4 283; CHECK-BE-NEXT: .LBB0_9: # %bb17 284; CHECK-BE-NEXT: # 285; CHECK-BE-NEXT: b .LBB0_9 286; CHECK-BE-NEXT: .p2align 4 287; CHECK-BE-NEXT: .LBB0_10: # %bb26 288; CHECK-BE-NEXT: # 289; CHECK-BE-NEXT: b .LBB0_10 290; CHECK-BE-NEXT: .p2align 4 291; CHECK-BE-NEXT: .LBB0_11: # %bb42 292; CHECK-BE-NEXT: # 293; CHECK-BE-NEXT: b .LBB0_11 294; CHECK-BE-NEXT: .p2align 4 295; CHECK-BE-NEXT: .LBB0_12: # %bb54 296; CHECK-BE-NEXT: # 297; CHECK-BE-NEXT: b .LBB0_12 298; CHECK-BE-NEXT: .p2align 4 299; CHECK-BE-NEXT: .LBB0_13: # %bb49 300; CHECK-BE-NEXT: # 301; CHECK-BE-NEXT: b .LBB0_13 302; CHECK-BE-NEXT: .p2align 4 303; CHECK-BE-NEXT: .LBB0_14: # %bb59 304; CHECK-BE-NEXT: # 305; CHECK-BE-NEXT: b .LBB0_14 306; CHECK-BE-NEXT: .p2align 4 307; CHECK-BE-NEXT: .LBB0_15: # %bb57 308; CHECK-BE-NEXT: # 309; CHECK-BE-NEXT: b .LBB0_15 310; CHECK-BE-NEXT: .p2align 4 311; CHECK-BE-NEXT: .LBB0_16: # %bb18 312; CHECK-BE-NEXT: # 313; CHECK-BE-NEXT: b .LBB0_16 314; CHECK-BE-NEXT: .p2align 4 315; CHECK-BE-NEXT: .LBB0_17: # %bb46 316; CHECK-BE-NEXT: # 317; CHECK-BE-NEXT: b .LBB0_17 318; CHECK-BE-NEXT: .p2align 4 319; CHECK-BE-NEXT: .LBB0_18: # %bb19 320; CHECK-BE-NEXT: # 321; CHECK-BE-NEXT: b .LBB0_18 322; CHECK-BE-NEXT: .p2align 4 323; CHECK-BE-NEXT: .LBB0_19: # %bb61 324; CHECK-BE-NEXT: # 325; CHECK-BE-NEXT: b .LBB0_19 326; CHECK-BE-NEXT: .p2align 4 327; CHECK-BE-NEXT: .LBB0_20: # %bb24 328; CHECK-BE-NEXT: # 329; CHECK-BE-NEXT: b .LBB0_20 330; CHECK-BE-NEXT: .p2align 4 331; CHECK-BE-NEXT: .LBB0_21: # %bb47 332; CHECK-BE-NEXT: # 333; CHECK-BE-NEXT: b .LBB0_21 334; CHECK-BE-NEXT: .p2align 4 335; CHECK-BE-NEXT: .LBB0_22: # %bb58 336; CHECK-BE-NEXT: # 337; CHECK-BE-NEXT: b .LBB0_22 338; CHECK-BE-NEXT: .p2align 4 339; CHECK-BE-NEXT: .LBB0_23: # %bb48 340; CHECK-BE-NEXT: # 341; CHECK-BE-NEXT: b .LBB0_23 342; CHECK-BE-NEXT: .p2align 4 343; CHECK-BE-NEXT: .LBB0_24: # %bb55 344; CHECK-BE-NEXT: # 345; CHECK-BE-NEXT: b .LBB0_24 346; CHECK-BE-NEXT: .p2align 4 347; CHECK-BE-NEXT: .LBB0_25: # %bb20 348; CHECK-BE-NEXT: # 349; CHECK-BE-NEXT: b .LBB0_25 350; CHECK-BE-NEXT: .p2align 4 351; CHECK-BE-NEXT: .LBB0_26: # %bb60 352; CHECK-BE-NEXT: # 353; CHECK-BE-NEXT: b .LBB0_26 354; CHECK-BE-NEXT: .p2align 4 355; CHECK-BE-NEXT: .LBB0_27: # %bb56 356; CHECK-BE-NEXT: # 357; CHECK-BE-NEXT: b .LBB0_27 358; CHECK-BE-NEXT: .p2align 4 359; CHECK-BE-NEXT: .LBB0_28: # %bb50 360; CHECK-BE-NEXT: # 361; CHECK-BE-NEXT: b .LBB0_28 362; CHECK-BE-NEXT: .p2align 4 363; CHECK-BE-NEXT: .LBB0_29: # %bb23 364; CHECK-BE-NEXT: # 365; CHECK-BE-NEXT: b .LBB0_29 366; CHECK-BE-NEXT: .p2align 4 367; CHECK-BE-NEXT: .LBB0_30: # %bb62 368; CHECK-BE-NEXT: # 369; CHECK-BE-NEXT: b .LBB0_30 370; CHECK-BE-NEXT: .LBB0_31: # %bb9 371; CHECK-BE-NEXT: ld r30, 128(r1) # 8-byte Folded Reload 372; CHECK-BE-NEXT: ld r29, 120(r1) # 8-byte Folded Reload 373; CHECK-BE-NEXT: addi r1, r1, 144 374; CHECK-BE-NEXT: ld r0, 16(r1) 375; CHECK-BE-NEXT: lwz r12, 8(r1) 376; CHECK-BE-NEXT: mtlr r0 377; CHECK-BE-NEXT: mtocrf 32, r12 378; CHECK-BE-NEXT: mtocrf 16, r12 379; CHECK-BE-NEXT: mtocrf 8, r12 380; CHECK-BE-NEXT: blr 381; CHECK-BE-NEXT: .LBB0_32: # %bb29 382; CHECK-BE-NEXT: crmove eq, 4*cr3+eq 383; CHECK-BE-NEXT: cmpwi cr3, r5, 366 384; CHECK-BE-NEXT: cmpwi cr4, r3, 0 385; CHECK-BE-NEXT: li r29, 0 386; CHECK-BE-NEXT: setnbc r30, eq 387; CHECK-BE-NEXT: bc 12, 4*cr2+lt, .LBB0_36 388; CHECK-BE-NEXT: .p2align 4 389; CHECK-BE-NEXT: .LBB0_33: # %bb36 390; CHECK-BE-NEXT: bc 12, 4*cr4+eq, .LBB0_35 391; CHECK-BE-NEXT: .LBB0_34: # %bb32 392; CHECK-BE-NEXT: bc 4, 4*cr2+lt, .LBB0_33 393; CHECK-BE-NEXT: b .LBB0_36 394; CHECK-BE-NEXT: .p2align 4 395; CHECK-BE-NEXT: .LBB0_35: # %bb39 396; CHECK-BE-NEXT: bl call_2 397; CHECK-BE-NEXT: nop 398; CHECK-BE-NEXT: bc 4, 4*cr2+lt, .LBB0_33 399; CHECK-BE-NEXT: .LBB0_36: # %bb33 400; CHECK-BE-NEXT: stb r29, 0(r30) 401; CHECK-BE-NEXT: bc 4, 4*cr4+eq, .LBB0_34 402; CHECK-BE-NEXT: b .LBB0_35 403bb: 404 %tmp = load i32, ptr undef, align 8 405 %tmp1 = and i32 %tmp, 16 406 %tmp2 = icmp ne i32 %tmp1, 0 407 %tmp3 = and i32 %tmp, 32 408 %tmp4 = icmp ne i32 %tmp3, 0 409 br label %bb5 410 411bb5: ; preds = %bb63, %bb 412 %tmp6 = phi i32 [ 0, %bb ], [ %tmp64, %bb63 ] 413 %tmp7 = phi i1 [ %tmp4, %bb ], [ undef, %bb63 ] 414 %tmp8 = load i32, ptr undef, align 8 415 br i1 %tmp2, label %bb9, label %bb10 416 417bb9: ; preds = %bb5 418 ret void 419 420bb10: ; preds = %bb5 421 %tmp11 = and i32 %tmp8, 1536 422 %tmp12 = icmp eq i32 %tmp11, 512 423 switch i32 undef, label %bb13 [ 424 i32 117, label %bb62 425 i32 40, label %bb63 426 i32 302, label %bb63 427 i32 46, label %bb63 428 i32 320, label %bb16 429 i32 64, label %bb16 430 i32 344, label %bb18 431 i32 88, label %bb19 432 i32 376, label %bb63 433 i32 120, label %bb20 434 i32 47, label %bb21 435 i32 65, label %bb21 436 i32 90, label %bb21 437 i32 97, label %bb21 438 i32 66, label %bb63 439 i32 98, label %bb63 440 i32 72, label %bb63 441 i32 104, label %bb63 442 i32 67, label %bb63 443 i32 99, label %bb23 444 i32 87, label %bb24 445 i32 85, label %bb63 446 i32 371, label %bb25 447 i32 115, label %bb25 448 i32 339, label %bb27 449 i32 118, label %bb27 450 i32 110, label %bb27 451 i32 83, label %bb27 452 i32 374, label %bb29 453 i32 366, label %bb29 454 i32 105, label %bb41 455 i32 361, label %bb41 456 i32 73, label %bb43 457 i32 329, label %bb43 458 i32 106, label %bb46 459 i32 74, label %bb47 460 i32 364, label %bb48 461 i32 108, label %bb49 462 i32 332, label %bb50 463 i32 86, label %bb51 464 i32 78, label %bb51 465 i32 76, label %bb51 466 i32 342, label %bb53 467 i32 334, label %bb53 468 i32 112, label %bb55 469 i32 119, label %bb56 470 i32 80, label %bb63 471 i32 113, label %bb57 472 i32 81, label %bb58 473 i32 102, label %bb59 474 i32 100, label %bb60 475 i32 70, label %bb61 476 ] 477 478bb13: ; preds = %bb10 479 %tmp14 = icmp eq i32 0, 0 480 %tmp15 = select i1 %tmp14, i32 16, i32 undef 481 br label %bb63 482 483bb16: ; preds = %bb10, %bb10 484 br label %bb17 485 486bb17: ; preds = %bb17, %bb16 487 br label %bb17 488 489bb18: ; preds = %bb18, %bb10 490 br label %bb18 491 492bb19: ; preds = %bb19, %bb10 493 br label %bb19 494 495bb20: ; preds = %bb20, %bb10 496 br label %bb20 497 498bb21: ; preds = %bb10, %bb10, %bb10, %bb10 499 br label %bb22 500 501bb22: ; preds = %bb22, %bb21 502 br label %bb22 503 504bb23: ; preds = %bb23, %bb10 505 br label %bb23 506 507bb24: ; preds = %bb24, %bb10 508 br label %bb24 509 510bb25: ; preds = %bb10, %bb10 511 br label %bb26 512 513bb26: ; preds = %bb26, %bb25 514 br label %bb26 515 516bb27: ; preds = %bb10, %bb10, %bb10, %bb10 517 br label %bb28 518 519bb28: ; preds = %bb28, %bb27 520 br label %bb28 521 522bb29: ; preds = %bb10, %bb10 523 %tmp30 = icmp eq i32 %tmp8, 366 524 %tmp31 = icmp eq i32 %tmp6, 0 525 br label %bb32 526 527bb32: ; preds = %bb40, %bb29 528 br i1 %tmp7, label %bb33, label %bb36 529 530bb33: ; preds = %bb32 531 %tmp34 = getelementptr inbounds i8, ptr null, i64 -1 532 %tmp35 = select i1 %tmp12, ptr %tmp34, ptr null 533 store i8 0, ptr %tmp35, align 1 534 br label %bb36 535 536bb36: ; preds = %bb33, %bb32 537 br i1 %tmp30, label %bb37, label %bb38 538 539bb37: ; preds = %bb36 540 store i16 undef, ptr null, align 2 541 br label %bb38 542 543bb38: ; preds = %bb37, %bb36 544 br i1 %tmp31, label %bb39, label %bb40 545 546bb39: ; preds = %bb38 547 call void @call_2() 548 br label %bb40 549 550bb40: ; preds = %bb39, %bb38 551 br label %bb32 552 553bb41: ; preds = %bb10, %bb10 554 br label %bb42 555 556bb42: ; preds = %bb42, %bb41 557 br label %bb42 558 559bb43: ; preds = %bb10, %bb10 560 call void @call_1() 561 %tmp44 = getelementptr inbounds i8, ptr null, i64 -1 562 %tmp45 = select i1 %tmp12, ptr %tmp44, ptr null 563 store i8 0, ptr %tmp45, align 1 564 br label %bb63 565 566bb46: ; preds = %bb46, %bb10 567 br label %bb46 568 569bb47: ; preds = %bb47, %bb10 570 br label %bb47 571 572bb48: ; preds = %bb48, %bb10 573 br label %bb48 574 575bb49: ; preds = %bb49, %bb10 576 br label %bb49 577 578bb50: ; preds = %bb50, %bb10 579 br label %bb50 580 581bb51: ; preds = %bb10, %bb10, %bb10 582 br label %bb52 583 584bb52: ; preds = %bb52, %bb51 585 br label %bb52 586 587bb53: ; preds = %bb10, %bb10 588 br label %bb54 589 590bb54: ; preds = %bb54, %bb53 591 br label %bb54 592 593bb55: ; preds = %bb55, %bb10 594 br label %bb55 595 596bb56: ; preds = %bb56, %bb10 597 br label %bb56 598 599bb57: ; preds = %bb57, %bb10 600 br label %bb57 601 602bb58: ; preds = %bb58, %bb10 603 br label %bb58 604 605bb59: ; preds = %bb59, %bb10 606 br label %bb59 607 608bb60: ; preds = %bb60, %bb10 609 br label %bb60 610 611bb61: ; preds = %bb61, %bb10 612 br label %bb61 613 614bb62: ; preds = %bb62, %bb10 615 br label %bb62 616 617bb63: ; preds = %bb43, %bb13, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10 618 %tmp64 = phi i32 [ %tmp15, %bb13 ], [ 0, %bb43 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ] 619 br label %bb5 620} 621 622declare void @call_1() local_unnamed_addr 623 624declare void @call_2() local_unnamed_addr 625