1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 3; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \ 4; RUN: --check-prefixes=CHECK,CHECK-LE 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 6; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \ 7; RUN: --check-prefixes=CHECK,CHECK-BE 8 9; This file does not contain many test cases involving comparisons and logical 10; comparisons (cmplwi, cmpldi). This is because alternative code is generated 11; when there is a compare (logical or not), followed by a sign or zero extend. 12; This codegen will be re-evaluated at a later time on whether or not it should 13; be emitted on P10. 14 15@globalVal = common dso_local local_unnamed_addr global i8 0, align 1 16@globalVal2 = common dso_local local_unnamed_addr global i32 0, align 4 17@globalVal3 = common dso_local local_unnamed_addr global i64 0, align 8 18@globalVal4 = common dso_local local_unnamed_addr global i16 0, align 2 19 20 21define dso_local signext i32 @setbcr1(i32 signext %a, i32 signext %b) { 22; CHECK-LABEL: setbcr1: 23; CHECK: # %bb.0: # %entry 24; CHECK-NEXT: cmpw r3, r4 25; CHECK-NEXT: setbcr r3, lt 26; CHECK-NEXT: blr 27entry: 28 %cmp = icmp sge i32 %a, %b 29 %lnot.ext = zext i1 %cmp to i32 30 ret i32 %lnot.ext 31} 32 33 34define dso_local signext i32 @setbcr2(i32 signext %a, i32 signext %b) { 35; CHECK-LABEL: setbcr2: 36; CHECK: # %bb.0: # %entry 37; CHECK-NEXT: cmpw r3, r4 38; CHECK-NEXT: setbcr r3, gt 39; CHECK-NEXT: blr 40entry: 41 %cmp = icmp sle i32 %a, %b 42 %lnot.ext = zext i1 %cmp to i32 43 ret i32 %lnot.ext 44} 45 46 47define dso_local signext i32 @setbcr3(i32 signext %a, i32 signext %b) { 48; CHECK-LABEL: setbcr3: 49; CHECK: # %bb.0: # %entry 50; CHECK-NEXT: cmpw r3, r4 51; CHECK-NEXT: setbcr r3, eq 52; CHECK-NEXT: blr 53entry: 54 %cmp = icmp ne i32 %a, %b 55 %lnot.ext = zext i1 %cmp to i32 56 ret i32 %lnot.ext 57} 58 59 60define dso_local signext i32 @setbcr4(i8 signext %a, i8 signext %b) { 61; CHECK-LABEL: setbcr4: 62; CHECK: # %bb.0: # %entry 63; CHECK-NEXT: cmpw r3, r4 64; CHECK-NEXT: setbcr r3, lt 65; CHECK-NEXT: blr 66entry: 67 %cmp = icmp sge i8 %a, %b 68 %conv2 = zext i1 %cmp to i32 69 ret i32 %conv2 70} 71 72 73define dso_local void @setbcr5(i8 signext %a, i8 signext %b) { 74; CHECK-LE-LABEL: setbcr5: 75; CHECK-LE: # %bb.0: # %entry 76; CHECK-LE-NEXT: cmpw r3, r4 77; CHECK-LE-NEXT: setbcr r3, lt 78; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 79; CHECK-LE-NEXT: blr 80; 81; CHECK-BE-LABEL: setbcr5: 82; CHECK-BE: # %bb.0: # %entry 83; CHECK-BE-NEXT: cmpw r3, r4 84; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha 85; CHECK-BE-NEXT: setbcr r3, lt 86; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4) 87; CHECK-BE-NEXT: blr 88entry: 89 %cmp = icmp sge i8 %a, %b 90 %conv3 = zext i1 %cmp to i8 91 store i8 %conv3, ptr @globalVal, align 1 92 ret void 93} 94 95 96define dso_local void @setbcr6(i32 signext %a, i32 signext %b) { 97; CHECK-LE-LABEL: setbcr6: 98; CHECK-LE: # %bb.0: # %entry 99; CHECK-LE-NEXT: cmpw r3, r4 100; CHECK-LE-NEXT: setbcr r3, lt 101; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 102; CHECK-LE-NEXT: blr 103; 104; CHECK-BE-LABEL: setbcr6: 105; CHECK-BE: # %bb.0: # %entry 106; CHECK-BE-NEXT: cmpw r3, r4 107; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha 108; CHECK-BE-NEXT: setbcr r3, lt 109; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4) 110; CHECK-BE-NEXT: blr 111entry: 112 %cmp = icmp sge i32 %a, %b 113 %conv = zext i1 %cmp to i32 114 store i32 %conv, ptr @globalVal2, align 4 115 ret void 116} 117 118 119define dso_local signext i32 @setbcr7(i64 %a, i64 %b) { 120; CHECK-LABEL: setbcr7: 121; CHECK: # %bb.0: # %entry 122; CHECK-NEXT: cmpd r3, r4 123; CHECK-NEXT: setbcr r3, lt 124; CHECK-NEXT: blr 125entry: 126 %cmp = icmp sge i64 %a, %b 127 %conv = zext i1 %cmp to i32 128 ret i32 %conv 129} 130 131 132define signext i64 @setbcr8(i64 %a, i64 %b) { 133; CHECK-LABEL: setbcr8: 134; CHECK: # %bb.0: # %entry 135; CHECK-NEXT: cmpd r3, r4 136; CHECK-NEXT: setbcr r3, lt 137; CHECK-NEXT: blr 138entry: 139 %cmp = icmp sge i64 %a, %b 140 %conv = zext i1 %cmp to i64 141 ret i64 %conv 142} 143 144 145define dso_local void @setbcr9(i64 %a, i64 %b) { 146; CHECK-LE-LABEL: setbcr9: 147; CHECK-LE: # %bb.0: # %entry 148; CHECK-LE-NEXT: cmpd r3, r4 149; CHECK-LE-NEXT: setbcr r3, lt 150; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 151; CHECK-LE-NEXT: blr 152; 153; CHECK-BE-LABEL: setbcr9: 154; CHECK-BE: # %bb.0: # %entry 155; CHECK-BE-NEXT: cmpd r3, r4 156; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 157; CHECK-BE-NEXT: setbcr r3, lt 158; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 159; CHECK-BE-NEXT: blr 160entry: 161 %cmp = icmp sge i64 %a, %b 162 %conv1 = zext i1 %cmp to i64 163 store i64 %conv1, ptr @globalVal3, align 8 164 ret void 165} 166 167 168define dso_local signext i32 @setbcr10(i16 signext %a, i16 signext %b) { 169; CHECK-LABEL: setbcr10: 170; CHECK: # %bb.0: # %entry 171; CHECK-NEXT: cmpw r3, r4 172; CHECK-NEXT: setbcr r3, lt 173; CHECK-NEXT: blr 174entry: 175 %cmp = icmp sge i16 %a, %b 176 %conv2 = zext i1 %cmp to i32 177 ret i32 %conv2 178} 179 180 181define dso_local void @setbcr11(i16 signext %a, i16 signext %b) { 182; CHECK-LE-LABEL: setbcr11: 183; CHECK-LE: # %bb.0: # %entry 184; CHECK-LE-NEXT: cmpw r3, r4 185; CHECK-LE-NEXT: setbcr r3, lt 186; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 187; CHECK-LE-NEXT: blr 188; 189; CHECK-BE-LABEL: setbcr11: 190; CHECK-BE: # %bb.0: # %entry 191; CHECK-BE-NEXT: cmpw r3, r4 192; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha 193; CHECK-BE-NEXT: setbcr r3, lt 194; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4) 195; CHECK-BE-NEXT: blr 196entry: 197 %cmp = icmp sge i16 %a, %b 198 %conv3 = zext i1 %cmp to i16 199 store i16 %conv3, ptr @globalVal4, align 2 200 ret void 201} 202 203 204define dso_local signext i32 @setbcr12(i64 %a, i64 %b) { 205; CHECK-LABEL: setbcr12: 206; CHECK: # %bb.0: # %entry 207; CHECK-NEXT: cmpld r3, r4 208; CHECK-NEXT: setbcr r3, lt 209; CHECK-NEXT: blr 210entry: 211 %cmp = icmp uge i64 %a, %b 212 %conv = zext i1 %cmp to i32 213 ret i32 %conv 214} 215 216 217define dso_local void @setbcr13(i64 %a, i64 %b) { 218; CHECK-LE-LABEL: setbcr13: 219; CHECK-LE: # %bb.0: # %entry 220; CHECK-LE-NEXT: cmpld r3, r4 221; CHECK-LE-NEXT: setbcr r3, lt 222; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 223; CHECK-LE-NEXT: blr 224; 225; CHECK-BE-LABEL: setbcr13: 226; CHECK-BE: # %bb.0: # %entry 227; CHECK-BE-NEXT: cmpld r3, r4 228; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 229; CHECK-BE-NEXT: setbcr r3, lt 230; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 231; CHECK-BE-NEXT: blr 232entry: 233 %cmp = icmp uge i64 %a, %b 234 %conv1 = zext i1 %cmp to i64 235 store i64 %conv1, ptr @globalVal3 236 ret void 237} 238 239 240define dso_local signext i32 @setbcr14(i8 signext %a, i8 signext %b) { 241; CHECK-LABEL: setbcr14: 242; CHECK: # %bb.0: # %entry 243; CHECK-NEXT: cmpw r3, r4 244; CHECK-NEXT: setbcr r3, gt 245; CHECK-NEXT: blr 246entry: 247 %cmp = icmp sle i8 %a, %b 248 %conv2 = zext i1 %cmp to i32 249 ret i32 %conv2 250} 251 252 253define dso_local void @setbcr15(i8 signext %a, i8 signext %b) { 254; CHECK-LE-LABEL: setbcr15: 255; CHECK-LE: # %bb.0: # %entry 256; CHECK-LE-NEXT: cmpw r3, r4 257; CHECK-LE-NEXT: setbcr r3, gt 258; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 259; CHECK-LE-NEXT: blr 260; 261; CHECK-BE-LABEL: setbcr15: 262; CHECK-BE: # %bb.0: # %entry 263; CHECK-BE-NEXT: cmpw r3, r4 264; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha 265; CHECK-BE-NEXT: setbcr r3, gt 266; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4) 267; CHECK-BE-NEXT: blr 268entry: 269 %cmp = icmp sle i8 %a, %b 270 %conv3 = zext i1 %cmp to i8 271 store i8 %conv3, ptr @globalVal, align 1 272 ret void 273} 274 275 276define dso_local signext i32 @setbcr16(i32 signext %a, i32 signext %b) { 277; CHECK-LABEL: setbcr16: 278; CHECK: # %bb.0: # %entry 279; CHECK-NEXT: cmpw r3, r4 280; CHECK-NEXT: setbcr r3, gt 281; CHECK-NEXT: blr 282entry: 283 %cmp = icmp sle i32 %a, %b 284 %conv = zext i1 %cmp to i32 285 ret i32 %conv 286} 287 288 289define dso_local void @setbcr17(i32 signext %a, i32 signext %b) { 290; CHECK-LE-LABEL: setbcr17: 291; CHECK-LE: # %bb.0: # %entry 292; CHECK-LE-NEXT: cmpw r3, r4 293; CHECK-LE-NEXT: setbcr r3, gt 294; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 295; CHECK-LE-NEXT: blr 296; 297; CHECK-BE-LABEL: setbcr17: 298; CHECK-BE: # %bb.0: # %entry 299; CHECK-BE-NEXT: cmpw r3, r4 300; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha 301; CHECK-BE-NEXT: setbcr r3, gt 302; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4) 303; CHECK-BE-NEXT: blr 304entry: 305 %cmp = icmp sle i32 %a, %b 306 %conv = zext i1 %cmp to i32 307 store i32 %conv, ptr @globalVal2, align 4 308 ret void 309} 310 311 312define dso_local signext i32 @setbcr18(i64 %a, i64 %b) { 313; CHECK-LABEL: setbcr18: 314; CHECK: # %bb.0: # %entry 315; CHECK-NEXT: cmpd r3, r4 316; CHECK-NEXT: setbcr r3, gt 317; CHECK-NEXT: blr 318entry: 319 %cmp = icmp sle i64 %a, %b 320 %conv = zext i1 %cmp to i32 321 ret i32 %conv 322} 323 324 325define dso_local void @setbcr19(i64 %a, i64 %b) { 326; CHECK-LE-LABEL: setbcr19: 327; CHECK-LE: # %bb.0: # %entry 328; CHECK-LE-NEXT: cmpd r3, r4 329; CHECK-LE-NEXT: setbcr r3, gt 330; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 331; CHECK-LE-NEXT: blr 332; 333; CHECK-BE-LABEL: setbcr19: 334; CHECK-BE: # %bb.0: # %entry 335; CHECK-BE-NEXT: cmpd r3, r4 336; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 337; CHECK-BE-NEXT: setbcr r3, gt 338; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 339; CHECK-BE-NEXT: blr 340entry: 341 %cmp = icmp sle i64 %a, %b 342 %conv1 = zext i1 %cmp to i64 343 store i64 %conv1, ptr @globalVal3, align 8 344 ret void 345} 346 347 348define dso_local signext i32 @setbcr20(i16 signext %a, i16 signext %b) { 349; CHECK-LABEL: setbcr20: 350; CHECK: # %bb.0: # %entry 351; CHECK-NEXT: cmpw r3, r4 352; CHECK-NEXT: setbcr r3, gt 353; CHECK-NEXT: blr 354entry: 355 %cmp = icmp sle i16 %a, %b 356 %conv2 = zext i1 %cmp to i32 357 ret i32 %conv2 358} 359 360 361define dso_local void @setbcr21(i16 signext %a, i16 signext %b) { 362; CHECK-LE-LABEL: setbcr21: 363; CHECK-LE: # %bb.0: # %entry 364; CHECK-LE-NEXT: cmpw r3, r4 365; CHECK-LE-NEXT: setbcr r3, gt 366; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 367; CHECK-LE-NEXT: blr 368; 369; CHECK-BE-LABEL: setbcr21: 370; CHECK-BE: # %bb.0: # %entry 371; CHECK-BE-NEXT: cmpw r3, r4 372; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha 373; CHECK-BE-NEXT: setbcr r3, gt 374; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4) 375; CHECK-BE-NEXT: blr 376entry: 377 %cmp = icmp sle i16 %a, %b 378 %conv3 = zext i1 %cmp to i16 379 store i16 %conv3, ptr @globalVal4, align 2 380 ret void 381} 382 383 384define dso_local signext i32 @setbcr22(i64 %a, i64 %b) { 385; CHECK-LABEL: setbcr22: 386; CHECK: # %bb.0: # %entry 387; CHECK-NEXT: cmpld r3, r4 388; CHECK-NEXT: setbcr r3, gt 389; CHECK-NEXT: blr 390entry: 391 %cmp = icmp ule i64 %a, %b 392 %conv = zext i1 %cmp to i32 393 ret i32 %conv 394} 395 396 397define dso_local void @setbcr23(i64 %a, i64 %b) { 398; CHECK-LE-LABEL: setbcr23: 399; CHECK-LE: # %bb.0: # %entry 400; CHECK-LE-NEXT: cmpld r3, r4 401; CHECK-LE-NEXT: setbcr r3, gt 402; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 403; CHECK-LE-NEXT: blr 404; 405; CHECK-BE-LABEL: setbcr23: 406; CHECK-BE: # %bb.0: # %entry 407; CHECK-BE-NEXT: cmpld r3, r4 408; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 409; CHECK-BE-NEXT: setbcr r3, gt 410; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 411; CHECK-BE-NEXT: blr 412entry: 413 %cmp = icmp ule i64 %a, %b 414 %conv1 = zext i1 %cmp to i64 415 store i64 %conv1, ptr @globalVal3 416 ret void 417} 418 419define dso_local signext i32 @setbcr24(i8 signext %a, i8 signext %b) { 420; CHECK-LABEL: setbcr24: 421; CHECK: # %bb.0: # %entry 422; CHECK-NEXT: cmpw r3, r4 423; CHECK-NEXT: setbcr r3, eq 424; CHECK-NEXT: blr 425entry: 426 %cmp = icmp ne i8 %a, %b 427 %conv2 = zext i1 %cmp to i32 428 ret i32 %conv2 429} 430 431define dso_local void @setbcr25(i8 signext %a, i8 signext %b) { 432; CHECK-LE-LABEL: setbcr25: 433; CHECK-LE: # %bb.0: # %entry 434; CHECK-LE-NEXT: cmpw r3, r4 435; CHECK-LE-NEXT: setbcr r3, eq 436; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 437; CHECK-LE-NEXT: blr 438; 439; CHECK-BE-LABEL: setbcr25: 440; CHECK-BE: # %bb.0: # %entry 441; CHECK-BE-NEXT: cmpw r3, r4 442; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha 443; CHECK-BE-NEXT: setbcr r3, eq 444; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4) 445; CHECK-BE-NEXT: blr 446entry: 447 %cmp = icmp ne i8 %a, %b 448 %conv3 = zext i1 %cmp to i8 449 store i8 %conv3, ptr @globalVal, align 1 450 ret void 451} 452 453define dso_local void @setbcr26(i32 signext %a, i32 signext %b) { 454; CHECK-LE-LABEL: setbcr26: 455; CHECK-LE: # %bb.0: # %entry 456; CHECK-LE-NEXT: cmpw r3, r4 457; CHECK-LE-NEXT: setbcr r3, eq 458; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 459; CHECK-LE-NEXT: blr 460; 461; CHECK-BE-LABEL: setbcr26: 462; CHECK-BE: # %bb.0: # %entry 463; CHECK-BE-NEXT: cmpw r3, r4 464; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha 465; CHECK-BE-NEXT: setbcr r3, eq 466; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4) 467; CHECK-BE-NEXT: blr 468entry: 469 %cmp = icmp ne i32 %a, %b 470 %conv = zext i1 %cmp to i32 471 store i32 %conv, ptr @globalVal2, align 4 472 ret void 473} 474 475define dso_local signext i32 @setbcr27(i64 %a, i64 %b) { 476; CHECK-LABEL: setbcr27: 477; CHECK: # %bb.0: # %entry 478; CHECK-NEXT: cmpd r3, r4 479; CHECK-NEXT: setbcr r3, eq 480; CHECK-NEXT: blr 481entry: 482 %cmp = icmp ne i64 %a, %b 483 %conv = zext i1 %cmp to i32 484 ret i32 %conv 485} 486 487define dso_local void @setbcr28(i64 %a, i64 %b) { 488; CHECK-LE-LABEL: setbcr28: 489; CHECK-LE: # %bb.0: # %entry 490; CHECK-LE-NEXT: cmpd r3, r4 491; CHECK-LE-NEXT: setbcr r3, eq 492; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 493; CHECK-LE-NEXT: blr 494; 495; CHECK-BE-LABEL: setbcr28: 496; CHECK-BE: # %bb.0: # %entry 497; CHECK-BE-NEXT: cmpd r3, r4 498; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 499; CHECK-BE-NEXT: setbcr r3, eq 500; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 501; CHECK-BE-NEXT: blr 502entry: 503 %cmp = icmp ne i64 %a, %b 504 %conv1 = zext i1 %cmp to i64 505 store i64 %conv1, ptr @globalVal3, align 8 506 ret void 507} 508 509define dso_local signext i32 @setbcr29(i16 signext %a, i16 signext %b) { 510; CHECK-LABEL: setbcr29: 511; CHECK: # %bb.0: # %entry 512; CHECK-NEXT: cmpw r3, r4 513; CHECK-NEXT: setbcr r3, eq 514; CHECK-NEXT: blr 515entry: 516 %cmp = icmp ne i16 %a, %b 517 %conv2 = zext i1 %cmp to i32 518 ret i32 %conv2 519} 520 521define dso_local void @setbcr30(i16 signext %a, i16 signext %b) { 522; CHECK-LE-LABEL: setbcr30: 523; CHECK-LE: # %bb.0: # %entry 524; CHECK-LE-NEXT: cmpw r3, r4 525; CHECK-LE-NEXT: setbcr r3, eq 526; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 527; CHECK-LE-NEXT: blr 528; 529; CHECK-BE-LABEL: setbcr30: 530; CHECK-BE: # %bb.0: # %entry 531; CHECK-BE-NEXT: cmpw r3, r4 532; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha 533; CHECK-BE-NEXT: setbcr r3, eq 534; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4) 535; CHECK-BE-NEXT: blr 536entry: 537 %cmp = icmp ne i16 %a, %b 538 %conv3 = zext i1 %cmp to i16 539 store i16 %conv3, ptr @globalVal4, align 2 540 ret void 541} 542 543define dso_local signext i32 @setbcr31(i8 zeroext %a, i8 zeroext %b) { 544; CHECK-LABEL: setbcr31: 545; CHECK: # %bb.0: # %entry 546; CHECK-NEXT: cmpw r3, r4 547; CHECK-NEXT: setbcr r3, eq 548; CHECK-NEXT: blr 549entry: 550 %cmp = icmp ne i8 %a, %b 551 %conv2 = zext i1 %cmp to i32 552 ret i32 %conv2 553} 554 555define dso_local void @setbcr32(i8 zeroext %a, i8 zeroext %b) { 556; CHECK-LE-LABEL: setbcr32: 557; CHECK-LE: # %bb.0: # %entry 558; CHECK-LE-NEXT: cmpw r3, r4 559; CHECK-LE-NEXT: setbcr r3, eq 560; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 561; CHECK-LE-NEXT: blr 562; 563; CHECK-BE-LABEL: setbcr32: 564; CHECK-BE: # %bb.0: # %entry 565; CHECK-BE-NEXT: cmpw r3, r4 566; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha 567; CHECK-BE-NEXT: setbcr r3, eq 568; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4) 569; CHECK-BE-NEXT: blr 570entry: 571 %cmp = icmp ne i8 %a, %b 572 %conv3 = zext i1 %cmp to i8 573 store i8 %conv3, ptr @globalVal, align 1 574 ret void 575} 576 577define dso_local signext i32 @setbcr33(i32 zeroext %a, i32 zeroext %b) { 578; CHECK-LABEL: setbcr33: 579; CHECK: # %bb.0: # %entry 580; CHECK-NEXT: cmpw r3, r4 581; CHECK-NEXT: setbcr r3, eq 582; CHECK-NEXT: blr 583entry: 584 %cmp = icmp ne i32 %a, %b 585 %conv = zext i1 %cmp to i32 586 ret i32 %conv 587} 588 589define dso_local void @setbcr34(i32 zeroext %a, i32 zeroext %b) { 590; CHECK-LE-LABEL: setbcr34: 591; CHECK-LE: # %bb.0: # %entry 592; CHECK-LE-NEXT: cmpw r3, r4 593; CHECK-LE-NEXT: setbcr r3, eq 594; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 595; CHECK-LE-NEXT: blr 596; 597; CHECK-BE-LABEL: setbcr34: 598; CHECK-BE: # %bb.0: # %entry 599; CHECK-BE-NEXT: cmpw r3, r4 600; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha 601; CHECK-BE-NEXT: setbcr r3, eq 602; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4) 603; CHECK-BE-NEXT: blr 604entry: 605 %cmp = icmp ne i32 %a, %b 606 %conv = zext i1 %cmp to i32 607 store i32 %conv, ptr @globalVal2, align 4 608 ret void 609} 610 611define dso_local signext i32 @setbcr35(i16 zeroext %a, i16 zeroext %b) { 612; CHECK-LABEL: setbcr35: 613; CHECK: # %bb.0: # %entry 614; CHECK-NEXT: cmpw r3, r4 615; CHECK-NEXT: setbcr r3, eq 616; CHECK-NEXT: blr 617entry: 618 %cmp = icmp ne i16 %a, %b 619 %conv2 = zext i1 %cmp to i32 620 ret i32 %conv2 621} 622 623define dso_local void @setbcr36(i16 zeroext %a, i16 zeroext %b) { 624; CHECK-LE-LABEL: setbcr36: 625; CHECK-LE: # %bb.0: # %entry 626; CHECK-LE-NEXT: cmpw r3, r4 627; CHECK-LE-NEXT: setbcr r3, eq 628; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 629; CHECK-LE-NEXT: blr 630; 631; CHECK-BE-LABEL: setbcr36: 632; CHECK-BE: # %bb.0: # %entry 633; CHECK-BE-NEXT: cmpw r3, r4 634; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha 635; CHECK-BE-NEXT: setbcr r3, eq 636; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4) 637; CHECK-BE-NEXT: blr 638entry: 639 %cmp = icmp ne i16 %a, %b 640 %conv3 = zext i1 %cmp to i16 641 store i16 %conv3, ptr @globalVal4, align 2 642 ret void 643} 644 645define i64 @setbcr37(i8 signext %a, i8 signext %b) { 646; CHECK-LABEL: setbcr37: 647; CHECK: # %bb.0: # %entry 648; CHECK-NEXT: cmpw r3, r4 649; CHECK-NEXT: setbcr r3, lt 650; CHECK-NEXT: blr 651entry: 652 %cmp = icmp sge i8 %a, %b 653 %conv3 = zext i1 %cmp to i64 654 ret i64 %conv3 655} 656 657define dso_local void @setbcr38(i8 signext %a, i8 signext %b) { 658; CHECK-LE-LABEL: setbcr38: 659; CHECK-LE: # %bb.0: # %entry 660; CHECK-LE-NEXT: cmpw r3, r4 661; CHECK-LE-NEXT: setbcr r3, lt 662; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 663; CHECK-LE-NEXT: blr 664; 665; CHECK-BE-LABEL: setbcr38: 666; CHECK-BE: # %bb.0: # %entry 667; CHECK-BE-NEXT: cmpw r3, r4 668; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha 669; CHECK-BE-NEXT: setbcr r3, lt 670; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4) 671; CHECK-BE-NEXT: blr 672entry: 673 %cmp = icmp sge i8 %a, %b 674 %conv3 = zext i1 %cmp to i8 675 store i8 %conv3, ptr @globalVal, align 1 676 ret void 677} 678 679define i64 @setbcr39(i32 signext %a, i32 signext %b) { 680; CHECK-LABEL: setbcr39: 681; CHECK: # %bb.0: # %entry 682; CHECK-NEXT: cmpw r3, r4 683; CHECK-NEXT: setbcr r3, lt 684; CHECK-NEXT: blr 685entry: 686 %cmp = icmp sge i32 %a, %b 687 %conv1 = zext i1 %cmp to i64 688 ret i64 %conv1 689} 690 691define dso_local void @setbcr40(i32 signext %a, i32 signext %b) { 692; CHECK-LE-LABEL: setbcr40: 693; CHECK-LE: # %bb.0: # %entry 694; CHECK-LE-NEXT: cmpw r3, r4 695; CHECK-LE-NEXT: setbcr r3, lt 696; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 697; CHECK-LE-NEXT: blr 698; 699; CHECK-BE-LABEL: setbcr40: 700; CHECK-BE: # %bb.0: # %entry 701; CHECK-BE-NEXT: cmpw r3, r4 702; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha 703; CHECK-BE-NEXT: setbcr r3, lt 704; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4) 705; CHECK-BE-NEXT: blr 706entry: 707 %cmp = icmp sge i32 %a, %b 708 %conv = zext i1 %cmp to i32 709 store i32 %conv, ptr @globalVal2, align 4 710 ret void 711} 712 713define i64 @setbcr41(i64 %a, i64 %b) { 714; CHECK-LABEL: setbcr41: 715; CHECK: # %bb.0: # %entry 716; CHECK-NEXT: cmpd r3, r4 717; CHECK-NEXT: setbcr r3, lt 718; CHECK-NEXT: blr 719entry: 720 %cmp = icmp sge i64 %a, %b 721 %conv1 = zext i1 %cmp to i64 722 ret i64 %conv1 723} 724 725define dso_local void @setbcr42(i64 %a, i64 %b) { 726; CHECK-LE-LABEL: setbcr42: 727; CHECK-LE: # %bb.0: # %entry 728; CHECK-LE-NEXT: cmpd r3, r4 729; CHECK-LE-NEXT: setbcr r3, lt 730; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 731; CHECK-LE-NEXT: blr 732; 733; CHECK-BE-LABEL: setbcr42: 734; CHECK-BE: # %bb.0: # %entry 735; CHECK-BE-NEXT: cmpd r3, r4 736; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 737; CHECK-BE-NEXT: setbcr r3, lt 738; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 739; CHECK-BE-NEXT: blr 740entry: 741 %cmp = icmp sge i64 %a, %b 742 %conv1 = zext i1 %cmp to i64 743 store i64 %conv1, ptr @globalVal3, align 8 744 ret void 745} 746 747define i64 @setbcr43(i16 signext %a, i16 signext %b) { 748; CHECK-LABEL: setbcr43: 749; CHECK: # %bb.0: # %entry 750; CHECK-NEXT: cmpw r3, r4 751; CHECK-NEXT: setbcr r3, lt 752; CHECK-NEXT: blr 753entry: 754 %cmp = icmp sge i16 %a, %b 755 %conv3 = zext i1 %cmp to i64 756 ret i64 %conv3 757} 758 759define dso_local void @setbcr44(i16 signext %a, i16 signext %b) { 760; CHECK-LE-LABEL: setbcr44: 761; CHECK-LE: # %bb.0: # %entry 762; CHECK-LE-NEXT: cmpw r3, r4 763; CHECK-LE-NEXT: setbcr r3, lt 764; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 765; CHECK-LE-NEXT: blr 766; 767; CHECK-BE-LABEL: setbcr44: 768; CHECK-BE: # %bb.0: # %entry 769; CHECK-BE-NEXT: cmpw r3, r4 770; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha 771; CHECK-BE-NEXT: setbcr r3, lt 772; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4) 773; CHECK-BE-NEXT: blr 774entry: 775 %cmp = icmp sge i16 %a, %b 776 %conv3 = zext i1 %cmp to i16 777 store i16 %conv3, ptr @globalVal4, align 2 778 ret void 779} 780 781 782define i64 @setbcr45(i64 %a, i64 %b) { 783; CHECK-LABEL: setbcr45: 784; CHECK: # %bb.0: # %entry 785; CHECK-NEXT: cmpld r3, r4 786; CHECK-NEXT: setbcr r3, lt 787; CHECK-NEXT: blr 788entry: 789 %cmp = icmp uge i64 %a, %b 790 %conv1 = zext i1 %cmp to i64 791 ret i64 %conv1 792} 793 794 795define dso_local void @setbcr46(i64 %a, i64 %b) { 796; CHECK-LE-LABEL: setbcr46: 797; CHECK-LE: # %bb.0: # %entry 798; CHECK-LE-NEXT: cmpld r3, r4 799; CHECK-LE-NEXT: setbcr r3, lt 800; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 801; CHECK-LE-NEXT: blr 802; 803; CHECK-BE-LABEL: setbcr46: 804; CHECK-BE: # %bb.0: # %entry 805; CHECK-BE-NEXT: cmpld r3, r4 806; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 807; CHECK-BE-NEXT: setbcr r3, lt 808; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 809; CHECK-BE-NEXT: blr 810entry: 811 %cmp = icmp uge i64 %a, %b 812 %conv1 = zext i1 %cmp to i64 813 store i64 %conv1, ptr @globalVal3 814 ret void 815} 816 817define i64 @setbcr47(i8 signext %a, i8 signext %b) { 818; CHECK-LABEL: setbcr47: 819; CHECK: # %bb.0: # %entry 820; CHECK-NEXT: cmpw r3, r4 821; CHECK-NEXT: setbcr r3, gt 822; CHECK-NEXT: blr 823entry: 824 %cmp = icmp sle i8 %a, %b 825 %conv3 = zext i1 %cmp to i64 826 ret i64 %conv3 827} 828 829define dso_local void @setbcr48(i8 signext %a, i8 signext %b) { 830; CHECK-LE-LABEL: setbcr48: 831; CHECK-LE: # %bb.0: # %entry 832; CHECK-LE-NEXT: cmpw r3, r4 833; CHECK-LE-NEXT: setbcr r3, gt 834; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 835; CHECK-LE-NEXT: blr 836; 837; CHECK-BE-LABEL: setbcr48: 838; CHECK-BE: # %bb.0: # %entry 839; CHECK-BE-NEXT: cmpw r3, r4 840; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha 841; CHECK-BE-NEXT: setbcr r3, gt 842; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4) 843; CHECK-BE-NEXT: blr 844entry: 845 %cmp = icmp sle i8 %a, %b 846 %conv3 = zext i1 %cmp to i8 847 store i8 %conv3, ptr @globalVal, align 1 848 ret void 849} 850 851define i64 @setbcr49(i32 signext %a, i32 signext %b) { 852; CHECK-LABEL: setbcr49: 853; CHECK: # %bb.0: # %entry 854; CHECK-NEXT: cmpw r3, r4 855; CHECK-NEXT: setbcr r3, gt 856; CHECK-NEXT: blr 857entry: 858 %cmp = icmp sle i32 %a, %b 859 %conv1 = zext i1 %cmp to i64 860 ret i64 %conv1 861} 862 863define dso_local void @setbcr50(i32 signext %a, i32 signext %b) { 864; CHECK-LE-LABEL: setbcr50: 865; CHECK-LE: # %bb.0: # %entry 866; CHECK-LE-NEXT: cmpw r3, r4 867; CHECK-LE-NEXT: setbcr r3, gt 868; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 869; CHECK-LE-NEXT: blr 870; 871; CHECK-BE-LABEL: setbcr50: 872; CHECK-BE: # %bb.0: # %entry 873; CHECK-BE-NEXT: cmpw r3, r4 874; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha 875; CHECK-BE-NEXT: setbcr r3, gt 876; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4) 877; CHECK-BE-NEXT: blr 878entry: 879 %cmp = icmp sle i32 %a, %b 880 %conv = zext i1 %cmp to i32 881 store i32 %conv, ptr @globalVal2, align 4 882 ret void 883} 884 885 886define i64 @setbcr51(i64 %a, i64 %b) { 887; CHECK-LABEL: setbcr51: 888; CHECK: # %bb.0: # %entry 889; CHECK-NEXT: cmpd r3, r4 890; CHECK-NEXT: setbcr r3, gt 891; CHECK-NEXT: blr 892entry: 893 %cmp = icmp sle i64 %a, %b 894 %conv1 = zext i1 %cmp to i64 895 ret i64 %conv1 896} 897 898 899define dso_local void @setbcr52(i64 %a, i64 %b) { 900; CHECK-LE-LABEL: setbcr52: 901; CHECK-LE: # %bb.0: # %entry 902; CHECK-LE-NEXT: cmpd r3, r4 903; CHECK-LE-NEXT: setbcr r3, gt 904; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 905; CHECK-LE-NEXT: blr 906; 907; CHECK-BE-LABEL: setbcr52: 908; CHECK-BE: # %bb.0: # %entry 909; CHECK-BE-NEXT: cmpd r3, r4 910; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 911; CHECK-BE-NEXT: setbcr r3, gt 912; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 913; CHECK-BE-NEXT: blr 914entry: 915 %cmp = icmp sle i64 %a, %b 916 %conv1 = zext i1 %cmp to i64 917 store i64 %conv1, ptr @globalVal3, align 8 918 ret void 919} 920 921define i64 @setbcr53(i16 signext %a, i16 signext %b) { 922; CHECK-LABEL: setbcr53: 923; CHECK: # %bb.0: # %entry 924; CHECK-NEXT: cmpw r3, r4 925; CHECK-NEXT: setbcr r3, gt 926; CHECK-NEXT: blr 927entry: 928 %cmp = icmp sle i16 %a, %b 929 %conv3 = zext i1 %cmp to i64 930 ret i64 %conv3 931} 932 933define dso_local void @setbcr54(i16 signext %a, i16 signext %b) { 934; CHECK-LE-LABEL: setbcr54: 935; CHECK-LE: # %bb.0: # %entry 936; CHECK-LE-NEXT: cmpw r3, r4 937; CHECK-LE-NEXT: setbcr r3, gt 938; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 939; CHECK-LE-NEXT: blr 940; 941; CHECK-BE-LABEL: setbcr54: 942; CHECK-BE: # %bb.0: # %entry 943; CHECK-BE-NEXT: cmpw r3, r4 944; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha 945; CHECK-BE-NEXT: setbcr r3, gt 946; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4) 947; CHECK-BE-NEXT: blr 948entry: 949 %cmp = icmp sle i16 %a, %b 950 %conv3 = zext i1 %cmp to i16 951 store i16 %conv3, ptr @globalVal4, align 2 952 ret void 953} 954 955 956define i64 @setbcr55(i64 %a, i64 %b) { 957; CHECK-LABEL: setbcr55: 958; CHECK: # %bb.0: # %entry 959; CHECK-NEXT: cmpld r3, r4 960; CHECK-NEXT: setbcr r3, gt 961; CHECK-NEXT: blr 962entry: 963 %cmp = icmp ule i64 %a, %b 964 %conv1 = zext i1 %cmp to i64 965 ret i64 %conv1 966} 967 968 969define dso_local void @setbcr56(i64 %a, i64 %b) { 970; CHECK-LE-LABEL: setbcr56: 971; CHECK-LE: # %bb.0: # %entry 972; CHECK-LE-NEXT: cmpld r3, r4 973; CHECK-LE-NEXT: setbcr r3, gt 974; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 975; CHECK-LE-NEXT: blr 976; 977; CHECK-BE-LABEL: setbcr56: 978; CHECK-BE: # %bb.0: # %entry 979; CHECK-BE-NEXT: cmpld r3, r4 980; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 981; CHECK-BE-NEXT: setbcr r3, gt 982; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 983; CHECK-BE-NEXT: blr 984entry: 985 %cmp = icmp ule i64 %a, %b 986 %conv1 = zext i1 %cmp to i64 987 store i64 %conv1, ptr @globalVal3 988 ret void 989} 990 991define i64 @setbcr57(i64 %a, i64 %b) { 992; CHECK-LABEL: setbcr57: 993; CHECK: # %bb.0: # %entry 994; CHECK-NEXT: cmpd r3, r4 995; CHECK-NEXT: setbcr r3, eq 996; CHECK-NEXT: blr 997entry: 998 %cmp = icmp ne i64 %a, %b 999 %conv1 = zext i1 %cmp to i64 1000 ret i64 %conv1 1001} 1002 1003define dso_local void @setbcr58(i64 %a, i64 %b) { 1004; CHECK-LE-LABEL: setbcr58: 1005; CHECK-LE: # %bb.0: # %entry 1006; CHECK-LE-NEXT: cmpd r3, r4 1007; CHECK-LE-NEXT: setbcr r3, eq 1008; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 1009; CHECK-LE-NEXT: blr 1010; 1011; CHECK-BE-LABEL: setbcr58: 1012; CHECK-BE: # %bb.0: # %entry 1013; CHECK-BE-NEXT: cmpd r3, r4 1014; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 1015; CHECK-BE-NEXT: setbcr r3, eq 1016; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 1017; CHECK-BE-NEXT: blr 1018entry: 1019 %cmp = icmp ne i64 %a, %b 1020 %conv1 = zext i1 %cmp to i64 1021 store i64 %conv1, ptr @globalVal3, align 8 1022 ret void 1023} 1024 1025define i64 @setbcr59(i64 %a, i64 %b) { 1026; CHECK-LABEL: setbcr59: 1027; CHECK: # %bb.0: # %entry 1028; CHECK-NEXT: cmpd r3, r4 1029; CHECK-NEXT: setbcr r3, eq 1030; CHECK-NEXT: blr 1031entry: 1032 %cmp = icmp ne i64 %a, %b 1033 %conv1 = zext i1 %cmp to i64 1034 ret i64 %conv1 1035} 1036 1037define dso_local void @setbcr60(i64 %a, i64 %b) { 1038; CHECK-LE-LABEL: setbcr60: 1039; CHECK-LE: # %bb.0: # %entry 1040; CHECK-LE-NEXT: cmpd r3, r4 1041; CHECK-LE-NEXT: setbcr r3, eq 1042; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 1043; CHECK-LE-NEXT: blr 1044; 1045; CHECK-BE-LABEL: setbcr60: 1046; CHECK-BE: # %bb.0: # %entry 1047; CHECK-BE-NEXT: cmpd r3, r4 1048; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 1049; CHECK-BE-NEXT: setbcr r3, eq 1050; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 1051; CHECK-BE-NEXT: blr 1052entry: 1053 %cmp = icmp ne i64 %a, %b 1054 %conv1 = zext i1 %cmp to i64 1055 store i64 %conv1, ptr @globalVal3, align 8 1056 ret void 1057} 1058