xref: /llvm-project/llvm/test/CodeGen/PowerPC/mi-scheduling-lhs.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 <%s | FileCheck %s
2
3%struct.Record = type { ptr, i32 }
4
5@n = local_unnamed_addr global i32 500000000, align 4
6@m = common global %struct.Record zeroinitializer, align 8
7@a = hidden local_unnamed_addr global ptr @m, align 8
8@o = common global %struct.Record zeroinitializer, align 8
9@b = hidden local_unnamed_addr global ptr @o, align 8
10
11define signext i32 @foo() local_unnamed_addr {
12entry:
13  %0 = load i64, ptr @b, align 8
14  %1 = load ptr, ptr @a, align 8
15  store i64 %0, ptr %1, align 8
16  %2 = load i32, ptr @n, align 4
17  %cmp9 = icmp eq i32 %2, 0
18  br i1 %cmp9, label %for.end, label %for.body
19
20for.body:                                         ; preds = %entry, %for.body
21  %i.010 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
22  %3 = load ptr, ptr @a, align 8
23  %IntComp = getelementptr inbounds %struct.Record, ptr %3, i64 0, i32 1
24  store i32 5, ptr %IntComp, align 8
25  %4 = load ptr, ptr %3, align 8
26  %IntComp3 = getelementptr inbounds %struct.Record, ptr %4, i64 0, i32 1
27  store i32 5, ptr %IntComp3, align 8
28  store ptr %4, ptr %4, align 8
29  %inc = add nuw i32 %i.010, 1
30  %cmp = icmp ult i32 %inc, %2
31  br i1 %cmp, label %for.body, label %for.end
32
33for.end:                                          ; preds = %for.body, %entry
34  ret i32 0
35
36; CHECK-LABEL: foo
37; CHECK: addis [[REG1:[0-9]+]], 2, a@toc@ha
38; CHECK: li [[REG4:[0-9]+]], 5
39; CHECK: [[LAB:[a-z0-9A-Z_.]+]]:
40; CHECK: ld [[REG2:[0-9]+]], a@toc@l([[REG1]])
41; CHECK: stw [[REG4]], 8([[REG2]])
42; CHECK: ld [[REG3:[0-9]+]], 0([[REG2]])
43; CHECK: stw [[REG4]], 8([[REG3]])
44; CHECK: std [[REG3]], 0([[REG3]])
45; CHECK: bdnz [[LAB]]
46}
47
48