xref: /llvm-project/llvm/test/CodeGen/PowerPC/merge_stores_dereferenceable.ll (revision 032014ef103157bfd8403418538e25f3f58efa9d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
3
4; This code causes an assertion failure if dereferenceable flag is not properly set when in merging consecutive stores
5
6define <2 x i64> @func(ptr %pdst) {
7; CHECK-LABEL: func:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    addi 4, 1, -32
10; CHECK-NEXT:    lxvd2x 0, 0, 4
11; CHECK-NEXT:    xxswapd 34, 0
12; CHECK-NEXT:    lxvd2x 0, 0, 4
13; CHECK-NEXT:    stxvd2x 0, 0, 3
14; CHECK-NEXT:    blr
15entry:
16  %a = alloca [4 x i64], align 8
17  %psrc1 = getelementptr inbounds i64, ptr %a, i64 1
18  %d0 = load i64, ptr %a
19  %d1 = load i64, ptr %psrc1
20  %pdst1 = getelementptr inbounds i64, ptr %pdst, i64 1
21  store i64 %d0, ptr %pdst, align 8
22  store i64 %d1, ptr %pdst1, align 8
23  %vec = load <2 x i64>, ptr %a
24  ret <2 x i64> %vec
25}
26
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