xref: /llvm-project/llvm/test/CodeGen/PowerPC/mcm-7.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; RUN: llc -verify-machineinstrs -mcpu=pwr7 -O0 -code-model=medium < %s | FileCheck %s
2; RUN: llc -verify-machineinstrs -mcpu=pwr7 -O0 -code-model=large < %s | FileCheck %s
3
4; Test correct code generation for medium and large code model
5; for loading a function address.
6
7target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
8target triple = "powerpc64-unknown-linux-gnu"
9
10define ptr @test_fnaddr() nounwind {
11entry:
12  %func = alloca ptr, align 8
13  store ptr @foo, ptr %func, align 8
14  %0 = load ptr, ptr %func, align 8
15  ret ptr %0
16}
17
18declare signext i32 @foo(i32 signext)
19
20; CHECK-LABEL: test_fnaddr:
21; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
22; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
23; CHECK: .section .toc
24; CHECK: .LC[[TOCNUM]]:
25; CHECK: .tc {{[a-z0-9A-Z_.]+}}[TC],{{[a-z0-9A-Z_.]+}}
26