1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-P9 3; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-P8 4; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi < %s | FileCheck %s --check-prefix=CHECK-P8 5 6define signext i64 @maddld64(i64 signext %a, i64 signext %b) { 7; CHECK-P9-LABEL: maddld64: 8; CHECK-P9: # %bb.0: # %entry 9; CHECK-P9-NEXT: maddld 3, 4, 3, 3 10; CHECK-P9-NEXT: blr 11; 12; CHECK-P8-LABEL: maddld64: 13; CHECK-P8: # %bb.0: # %entry 14; CHECK-P8-NEXT: mulld 4, 4, 3 15; CHECK-P8-NEXT: add 3, 4, 3 16; CHECK-P8-NEXT: blr 17 18entry: 19 %mul = mul i64 %b, %a 20 %add = add i64 %mul, %a 21 ret i64 %add 22} 23 24define signext i32 @maddld32(i32 signext %a, i32 signext %b) { 25; CHECK-P9-LABEL: maddld32: 26; CHECK-P9: # %bb.0: # %entry 27; CHECK-P9-NEXT: maddld 3, 4, 3, 3 28; CHECK-P9-NEXT: extsw 3, 3 29; CHECK-P9-NEXT: blr 30; 31; CHECK-P8-LABEL: maddld32: 32; CHECK-P8: # %bb.0: # %entry 33; CHECK-P8-NEXT: mullw 4, 4, 3 34; CHECK-P8-NEXT: add 3, 4, 3 35; CHECK-P8-NEXT: extsw 3, 3 36; CHECK-P8-NEXT: blr 37 38entry: 39 %mul = mul i32 %b, %a 40 %add = add i32 %mul, %a 41 ret i32 %add 42} 43 44define signext i16 @maddld16(i16 signext %a, i16 signext %b, i16 signext %c) { 45; CHECK-P9-LABEL: maddld16: 46; CHECK-P9: # %bb.0: # %entry 47; CHECK-P9-NEXT: maddld 3, 4, 3, 5 48; CHECK-P9-NEXT: extsh 3, 3 49; CHECK-P9-NEXT: blr 50; 51; CHECK-P8-LABEL: maddld16: 52; CHECK-P8: # %bb.0: # %entry 53; CHECK-P8-NEXT: mullw 3, 4, 3 54; CHECK-P8-NEXT: add 3, 3, 5 55; CHECK-P8-NEXT: extsh 3, 3 56; CHECK-P8-NEXT: blr 57 58entry: 59 %mul = mul i16 %b, %a 60 %add = add i16 %mul, %c 61 ret i16 %add 62} 63 64define zeroext i32 @maddld32zeroext(i32 zeroext %a, i32 zeroext %b) { 65; CHECK-P9-LABEL: maddld32zeroext: 66; CHECK-P9: # %bb.0: # %entry 67; CHECK-P9-NEXT: maddld 3, 4, 3, 3 68; CHECK-P9-NEXT: clrldi 3, 3, 32 69; CHECK-P9-NEXT: blr 70; 71; CHECK-P8-LABEL: maddld32zeroext: 72; CHECK-P8: # %bb.0: # %entry 73; CHECK-P8-NEXT: mullw 4, 4, 3 74; CHECK-P8-NEXT: add 3, 4, 3 75; CHECK-P8-NEXT: clrldi 3, 3, 32 76; CHECK-P8-NEXT: blr 77 78entry: 79 %mul = mul i32 %b, %a 80 %add = add i32 %mul, %a 81 ret i32 %add 82} 83 84define signext i32 @maddld32nsw(i32 signext %a, i32 signext %b) { 85; CHECK-P9-LABEL: maddld32nsw: 86; CHECK-P9: # %bb.0: # %entry 87; CHECK-P9-NEXT: maddld 3, 4, 3, 3 88; CHECK-P9-NEXT: extsw 3, 3 89; CHECK-P9-NEXT: blr 90; 91; CHECK-P8-LABEL: maddld32nsw: 92; CHECK-P8: # %bb.0: # %entry 93; CHECK-P8-NEXT: mullw 4, 4, 3 94; CHECK-P8-NEXT: add 3, 4, 3 95; CHECK-P8-NEXT: extsw 3, 3 96; CHECK-P8-NEXT: blr 97 98entry: 99 %mul = mul nsw i32 %b, %a 100 %add = add nsw i32 %mul, %a 101 ret i32 %add 102} 103 104define zeroext i32 @maddld32nuw(i32 zeroext %a, i32 zeroext %b) { 105; CHECK-P9-LABEL: maddld32nuw: 106; CHECK-P9: # %bb.0: # %entry 107; CHECK-P9-NEXT: maddld 3, 4, 3, 3 108; CHECK-P9-NEXT: clrldi 3, 3, 32 109; CHECK-P9-NEXT: blr 110; 111; CHECK-P8-LABEL: maddld32nuw: 112; CHECK-P8: # %bb.0: # %entry 113; CHECK-P8-NEXT: mullw 4, 4, 3 114; CHECK-P8-NEXT: add 3, 4, 3 115; CHECK-P8-NEXT: clrldi 3, 3, 32 116; CHECK-P8-NEXT: blr 117 118entry: 119 %mul = mul nuw i32 %b, %a 120 %add = add nuw i32 %mul, %a 121 ret i32 %add 122} 123 124define signext i64 @maddld64_imm(i64 signext %a, i64 signext %b) { 125; CHECK-P9-LABEL: maddld64_imm: 126; CHECK-P9: # %bb.0: # %entry 127; CHECK-P9-NEXT: mulli 4, 4, 13 128; CHECK-P9-NEXT: add 3, 4, 3 129; CHECK-P9-NEXT: blr 130; 131; CHECK-P8-LABEL: maddld64_imm: 132; CHECK-P8: # %bb.0: # %entry 133; CHECK-P8-NEXT: mulli 4, 4, 13 134; CHECK-P8-NEXT: add 3, 4, 3 135; CHECK-P8-NEXT: blr 136entry: 137 %mul = mul i64 %b, 13 138 %add = add i64 %mul, %a 139 ret i64 %add 140} 141 142define signext i32 @maddld32_imm(i32 signext %a, i32 signext %b) { 143; CHECK-P9-LABEL: maddld32_imm: 144; CHECK-P9: # %bb.0: # %entry 145; CHECK-P9-NEXT: mullw 3, 4, 3 146; CHECK-P9-NEXT: addi 3, 3, 13 147; CHECK-P9-NEXT: extsw 3, 3 148; CHECK-P9-NEXT: blr 149; 150; CHECK-P8-LABEL: maddld32_imm: 151; CHECK-P8: # %bb.0: # %entry 152; CHECK-P8-NEXT: mullw 3, 4, 3 153; CHECK-P8-NEXT: addi 3, 3, 13 154; CHECK-P8-NEXT: extsw 3, 3 155; CHECK-P8-NEXT: blr 156entry: 157 %mul = mul i32 %b, %a 158 %add = add i32 %mul, 13 159 ret i32 %add 160} 161 162define signext i16 @maddld16_imm(i16 signext %a, i16 signext %b, i16 signext %c) { 163; CHECK-P9-LABEL: maddld16_imm: 164; CHECK-P9: # %bb.0: # %entry 165; CHECK-P9-NEXT: mulli 3, 4, 13 166; CHECK-P9-NEXT: add 3, 3, 5 167; CHECK-P9-NEXT: extsh 3, 3 168; CHECK-P9-NEXT: blr 169; 170; CHECK-P8-LABEL: maddld16_imm: 171; CHECK-P8: # %bb.0: # %entry 172; CHECK-P8-NEXT: mulli 3, 4, 13 173; CHECK-P8-NEXT: add 3, 3, 5 174; CHECK-P8-NEXT: extsh 3, 3 175; CHECK-P8-NEXT: blr 176entry: 177 %mul = mul i16 %b, 13 178 %add = add i16 %mul, %c 179 ret i16 %add 180} 181 182define zeroext i32 @maddld32zeroext_imm(i32 zeroext %a, i32 zeroext %b) { 183; CHECK-P9-LABEL: maddld32zeroext_imm: 184; CHECK-P9: # %bb.0: # %entry 185; CHECK-P9-NEXT: mullw 3, 4, 3 186; CHECK-P9-NEXT: addi 3, 3, 13 187; CHECK-P9-NEXT: clrldi 3, 3, 32 188; CHECK-P9-NEXT: blr 189; 190; CHECK-P8-LABEL: maddld32zeroext_imm: 191; CHECK-P8: # %bb.0: # %entry 192; CHECK-P8-NEXT: mullw 3, 4, 3 193; CHECK-P8-NEXT: addi 3, 3, 13 194; CHECK-P8-NEXT: clrldi 3, 3, 32 195; CHECK-P8-NEXT: blr 196entry: 197 %mul = mul i32 %b, %a 198 %add = add i32 %mul, 13 199 ret i32 %add 200} 201 202define signext i32 @maddld32nsw_imm(i32 signext %a, i32 signext %b) { 203; CHECK-P9-LABEL: maddld32nsw_imm: 204; CHECK-P9: # %bb.0: # %entry 205; CHECK-P9-NEXT: mulli 4, 4, 13 206; CHECK-P9-NEXT: add 3, 4, 3 207; CHECK-P9-NEXT: extsw 3, 3 208; CHECK-P9-NEXT: blr 209; 210; CHECK-P8-LABEL: maddld32nsw_imm: 211; CHECK-P8: # %bb.0: # %entry 212; CHECK-P8-NEXT: mulli 4, 4, 13 213; CHECK-P8-NEXT: add 3, 4, 3 214; CHECK-P8-NEXT: extsw 3, 3 215; CHECK-P8-NEXT: blr 216entry: 217 %mul = mul nsw i32 %b, 13 218 %add = add nsw i32 %mul, %a 219 ret i32 %add 220} 221 222define zeroext i32 @maddld32nuw_imm(i32 zeroext %a, i32 zeroext %b) { 223; CHECK-P9-LABEL: maddld32nuw_imm: 224; CHECK-P9: # %bb.0: # %entry 225; CHECK-P9-NEXT: mullw 3, 4, 3 226; CHECK-P9-NEXT: addi 3, 3, 13 227; CHECK-P9-NEXT: clrldi 3, 3, 32 228; CHECK-P9-NEXT: blr 229; 230; CHECK-P8-LABEL: maddld32nuw_imm: 231; CHECK-P8: # %bb.0: # %entry 232; CHECK-P8-NEXT: mullw 3, 4, 3 233; CHECK-P8-NEXT: addi 3, 3, 13 234; CHECK-P8-NEXT: clrldi 3, 3, 32 235; CHECK-P8-NEXT: blr 236entry: 237 %mul = mul nuw i32 %b, %a 238 %add = add nuw i32 %mul, 13 239 ret i32 %add 240} 241 242define zeroext i32 @maddld32nuw_imm_imm(i32 zeroext %b) { 243; CHECK-P9-LABEL: maddld32nuw_imm_imm: 244; CHECK-P9: # %bb.0: # %entry 245; CHECK-P9-NEXT: mulli 3, 3, 18 246; CHECK-P9-NEXT: addi 3, 3, 13 247; CHECK-P9-NEXT: clrldi 3, 3, 32 248; CHECK-P9-NEXT: blr 249; 250; CHECK-P8-LABEL: maddld32nuw_imm_imm: 251; CHECK-P8: # %bb.0: # %entry 252; CHECK-P8-NEXT: mulli 3, 3, 18 253; CHECK-P8-NEXT: addi 3, 3, 13 254; CHECK-P8-NEXT: clrldi 3, 3, 32 255; CHECK-P8-NEXT: blr 256entry: 257 %mul = mul nuw i32 %b, 18 258 %add = add nuw i32 %mul, 13 259 ret i32 %add 260} 261 262define zeroext i32 @maddld32nuw_bigimm_imm(i32 zeroext %b) { 263; CHECK-P9-LABEL: maddld32nuw_bigimm_imm: 264; CHECK-P9: # %bb.0: # %entry 265; CHECK-P9-NEXT: lis 4, 26127 266; CHECK-P9-NEXT: ori 4, 4, 63251 267; CHECK-P9-NEXT: mullw 3, 3, 4 268; CHECK-P9-NEXT: addi 3, 3, 13 269; CHECK-P9-NEXT: clrldi 3, 3, 32 270; CHECK-P9-NEXT: blr 271; 272; CHECK-P8-LABEL: maddld32nuw_bigimm_imm: 273; CHECK-P8: # %bb.0: # %entry 274; CHECK-P8-NEXT: lis 4, 26127 275; CHECK-P8-NEXT: ori 4, 4, 63251 276; CHECK-P8-NEXT: mullw 3, 3, 4 277; CHECK-P8-NEXT: addi 3, 3, 13 278; CHECK-P8-NEXT: clrldi 3, 3, 32 279; CHECK-P8-NEXT: blr 280entry: 281 %mul = mul nuw i32 %b, 1712322323 282 %add = add nuw i32 %mul, 13 283 ret i32 %add 284} 285 286define zeroext i32 @maddld32nuw_bigimm_bigimm(i32 zeroext %b) { 287; CHECK-P9-LABEL: maddld32nuw_bigimm_bigimm: 288; CHECK-P9: # %bb.0: # %entry 289; CHECK-P9-NEXT: lis 4, -865 290; CHECK-P9-NEXT: lis 5, 26127 291; CHECK-P9-NEXT: ori 4, 4, 42779 292; CHECK-P9-NEXT: ori 5, 5, 63251 293; CHECK-P9-NEXT: maddld 3, 3, 5, 4 294; CHECK-P9-NEXT: clrldi 3, 3, 32 295; CHECK-P9-NEXT: blr 296; 297; CHECK-P8-LABEL: maddld32nuw_bigimm_bigimm: 298; CHECK-P8: # %bb.0: # %entry 299; CHECK-P8-NEXT: lis 4, 26127 300; CHECK-P8-NEXT: ori 4, 4, 63251 301; CHECK-P8-NEXT: mullw 3, 3, 4 302; CHECK-P8-NEXT: addi 3, 3, -22757 303; CHECK-P8-NEXT: addis 3, 3, -864 304; CHECK-P8-NEXT: clrldi 3, 3, 32 305; CHECK-P8-NEXT: blr 306 307 308 309entry: 310 %mul = mul nuw i32 %b, 1712322323 311 %add = add nuw i32 %mul, 17123223323 312 ret i32 %add 313} 314