xref: /llvm-project/llvm/test/CodeGen/PowerPC/licm-remat.ll (revision aaa37d6755e635bbd62ba58896acd54ceef64610)
1; RUN: llc -verify-machineinstrs -ppc-reduce-cr-logicals \
2; RUN:   -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
3
4; Test case is reduced from the snappy benchmark.
5; Verify MachineLICM will always hoist trivially rematerializable instructions even when register pressure is high.
6
7%"class.snappy::SnappyDecompressor" = type <{ ptr, ptr, ptr, i32, i8, [5 x i8], [6 x i8] }>
8%"class.snappy::Source" = type { ptr }
9%"struct.snappy::iovec" = type { ptr, i64 }
10%"class.snappy::SnappyIOVecWriter" = type { ptr, i64, i64, i64, i64, i64 }
11
12@_ZN6snappy8internalL10char_tableE = internal unnamed_addr constant [5 x i16] [i16 1, i16 2052, i16 4097, i16 8193, i16 2], align 2
13@_ZN6snappy8internalL8wordmaskE = internal unnamed_addr constant [5 x i32] [i32 0, i32 255, i32 65535, i32 16777215, i32 -1], align 4
14
15; Function Attrs: argmemonly nounwind
16declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1) #2
17; Function Attrs: argmemonly nounwind
18declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #2
19
20define linkonce_odr void @ZN6snappyDecompressor_(ptr %this, ptr %writer) {
21; CHECK-LABEL: ZN6snappyDecompressor_:
22; CHECK:       # %bb.0: # %entry
23; CHECK:       addis 4, 2, .L_MergedGlobals@toc@ha
24; CHECK:       addi 26, 4, .L_MergedGlobals@toc@l
25; CHECK:       .LBB0_2: # %for.cond
26; CHECK-NOT:   addis {{[0-9]+}}, 2, .L_MergedGlobals@toc@ha
27; CHECK:       bctrl
28entry:
29  %ip_limit_ = getelementptr inbounds %"class.snappy::SnappyDecompressor", ptr %this, i64 0, i32 2
30  %curr_iov_index_.i = getelementptr inbounds %"class.snappy::SnappyIOVecWriter", ptr %writer, i64 0, i32 2
31  %curr_iov_written_.i = getelementptr inbounds %"class.snappy::SnappyIOVecWriter", ptr %writer, i64 0, i32 3
32  br label %for.cond
33
34for.cond:                                         ; preds = %if.end82, %if.then56, %if.end49, %entry
35  %ip.0 = phi ptr [ null, %entry ], [ %add.ptr50, %if.end49 ], [ null, %if.then56 ], [ undef, %if.end82 ]
36  %incdec.ptr = getelementptr inbounds i8, ptr %ip.0, i64 1
37  %0 = load i8, ptr %ip.0, align 1
38  %conv = zext i8 %0 to i32
39  br i1 undef, label %if.then7, label %if.else
40
41if.then7:                                         ; preds = %for.cond
42  %1 = lshr i32 %conv, 2
43  %add = add nuw nsw i32 %1, 1
44  %conv9 = zext i32 %add to i64
45  %2 = load i64, ptr %ip_limit_, align 8
46  %sub.ptr.sub13 = sub i64 %2, 0
47  %3 = load i64, ptr undef, align 8
48  %4 = load i64, ptr null, align 8
49  %sub.i = sub i64 %3, %4
50  %cmp.i = icmp ult i32 %add, 17
51  %cmp2.i = icmp ugt i64 %sub.ptr.sub13, 20
52  %or.cond.i = and i1 %cmp.i, %cmp2.i
53  %cmp4.i = icmp ugt i64 %sub.i, 15
54  %or.cond13.i = and i1 %or.cond.i, %cmp4.i
55  br i1 %or.cond13.i, label %land.lhs.true5.i, label %if.end17
56
57land.lhs.true5.i:                                 ; preds = %if.then7
58  %5 = load ptr, ptr undef, align 8
59  %6 = load i64, ptr %curr_iov_index_.i, align 8
60  %7 = load i64, ptr %curr_iov_written_.i, align 8
61  %sub6.i = sub i64 0, %7
62  %cmp7.i = icmp ugt i64 %sub6.i, 15
63  br i1 %cmp7.i, label %cleanup102, label %if.end17
64
65if.end17:                                         ; preds = %land.lhs.true5.i, %if.then7
66  %sub = add nsw i64 %conv9, -60
67  %8 = load i32, ptr undef, align 4
68  %arrayidx = getelementptr inbounds [5 x i32], ptr @_ZN6snappy8internalL8wordmaskE, i64 0, i64 %sub
69  %9 = load i32, ptr %arrayidx, align 4
70  %and21 = and i32 %9, %8
71  %add22 = add i32 %and21, 1
72  %conv23 = zext i32 %add22 to i64
73  %add.ptr24 = getelementptr inbounds i8, ptr %incdec.ptr, i64 %sub
74  br label %if.end25
75
76if.end25:                                         ; preds = %if.end17
77  %sub.ptr.rhs.cast28 = ptrtoint ptr %add.ptr24 to i64
78  %cmp30233 = icmp ugt i64 %conv23, 0
79  br i1 %cmp30233, label %while.body.preheader, label %while.end
80
81while.body.preheader:                             ; preds = %if.end25
82  %add.i158256 = add i64 %4, 0
83  %cmp.i160257 = icmp ugt i64 %add.i158256, %3
84  br i1 %cmp.i160257, label %cleanup105, label %while.cond.preheader.i
85
86while.cond.preheader.i:                           ; preds = %while.body.preheader
87  %call39 = call ptr undef(ptr undef, ptr nonnull undef)
88  unreachable
89
90while.end:                                        ; preds = %if.end25
91  br label %while.cond.preheader.i176
92
93while.cond.preheader.i176:                        ; preds = %while.end
94  br i1 undef, label %if.end49, label %while.body.lr.ph.i182
95
96while.body.lr.ph.i182:                            ; preds = %while.cond.preheader.i176
97  %.pre.i181 = load i64, ptr %curr_iov_written_.i, align 8
98  %10 = load ptr, ptr undef, align 8
99  %11 = load i64, ptr %curr_iov_index_.i, align 8
100  %iov_len.i185 = getelementptr inbounds %"struct.snappy::iovec", ptr %10, i64 %11, i32 1
101  %12 = load i64, ptr %iov_len.i185, align 8
102  br label %cond.end.i190
103
104cond.end.i190:                                    ; preds = %while.body.lr.ph.i182
105  br i1 undef, label %if.end18.i207, label %if.then10.i193
106
107if.then10.i193:                                   ; preds = %cond.end.i190
108  %add12.i191 = add i64 %11, 1
109  %iov_len22.phi.trans.insert.i194 = getelementptr inbounds %"struct.snappy::iovec", ptr %10, i64 %add12.i191, i32 1
110  %.pre48.i195 = load i64, ptr %iov_len22.phi.trans.insert.i194, align 8
111  br label %if.end18.i207
112
113if.end18.i207:                                    ; preds = %if.then10.i193, %cond.end.i190
114  %13 = phi i64 [ %.pre.i181, %cond.end.i190 ], [ 0, %if.then10.i193 ]
115  %14 = phi i64 [ %12, %cond.end.i190 ], [ %.pre48.i195, %if.then10.i193 ]
116  %15 = phi i64 [ %11, %cond.end.i190 ], [ %add12.i191, %if.then10.i193 ]
117  %sub.i197 = sub i64 %14, %13
118  %cmp.i.i198 = icmp ult i64 %sub.i197, %conv23
119  %.sroa.speculated.i199 = select i1 %cmp.i.i198, i64 %sub.i197, i64 %conv23
120  %iov_base.i.i200 = getelementptr inbounds %"struct.snappy::iovec", ptr %10, i64 %15, i32 0
121  %16 = load ptr, ptr %iov_base.i.i200, align 8
122  %add.ptr.i.i201 = getelementptr inbounds i8, ptr %16, i64 %13
123  call void @llvm.memcpy.p0.p0.i64(ptr %add.ptr.i.i201, ptr %add.ptr24, i64 %.sroa.speculated.i199, i1 false) #12
124  %add30.i203 = add i64 0, %.sroa.speculated.i199
125  store i64 %add30.i203, ptr null, align 8
126  %.pre245 = load i64, ptr %ip_limit_, align 8
127  br label %if.end49
128
129if.end49:                                         ; preds = %if.end18.i207, %while.cond.preheader.i176
130  %17 = phi i64 [ %.pre245, %if.end18.i207 ], [ %2, %while.cond.preheader.i176 ]
131  %add.ptr50 = getelementptr inbounds i8, ptr %add.ptr24, i64 %conv23
132  %sub.ptr.sub54 = sub i64 %17, 0
133  %cmp55 = icmp slt i64 %sub.ptr.sub54, 5
134  br i1 %cmp55, label %if.then56, label %for.cond
135
136if.then56:                                        ; preds = %if.end49
137  br label %for.cond
138
139if.else:                                          ; preds = %for.cond
140  %idxprom = zext i8 %0 to i64
141  %arrayidx68 = getelementptr inbounds [5 x i16], ptr @_ZN6snappy8internalL10char_tableE, i64 0, i64 %idxprom
142  %18 = load i16, ptr %arrayidx68, align 2
143  %conv69 = zext i16 %18 to i64
144  %19 = load i32, ptr undef, align 4
145  %shr71 = lshr i64 %conv69, 11
146  %arrayidx72 = getelementptr inbounds [5 x i32], ptr @_ZN6snappy8internalL8wordmaskE, i64 0, i64 %shr71
147  %20 = load i32, ptr %arrayidx72, align 4
148  %and73 = and i32 %20, %19
149  %conv74 = zext i32 %and73 to i64
150  %add79 = add nuw nsw i64 0, %conv74
151  %call80 = call zeroext i1 @_ZN6snappy17SnappyIOVecWriterAppendFromSelfEmm(ptr %writer, i64 %add79, i64 undef)
152  br i1 %call80, label %if.end82, label %cleanup105
153
154if.end82:                                         ; preds = %if.else
155  br label %for.cond
156
157cleanup102:                                       ; preds = %land.lhs.true5.i
158  %iov_base.i.i = getelementptr inbounds %"struct.snappy::iovec", ptr %5, i64 %6, i32 0
159  %21 = load ptr, ptr %iov_base.i.i, align 8
160  %add.ptr.i.i = getelementptr inbounds i8, ptr %21, i64 %7
161  call void @llvm.memmove.p0.p0.i64(ptr %add.ptr.i.i, ptr %incdec.ptr, i64 16, i1 false) #12
162  %22 = load <2 x i64>, ptr %curr_iov_written_.i, align 8
163  %23 = insertelement <2 x i64> undef, i64 %conv9, i32 0
164  %24 = shufflevector <2 x i64> %23, <2 x i64> undef, <2 x i32> zeroinitializer
165  %25 = add <2 x i64> %22, %24
166  store <2 x i64> %25, ptr undef, align 8
167  unreachable
168
169cleanup105:                                       ; preds = %if.else, %while.body.preheader
170  ret void
171}
172
173; Function Attrs: inlinehint
174declare zeroext i1 @_ZN6snappy17SnappyIOVecWriterAppendFromSelfEmm(ptr, i64, i64) local_unnamed_addr #10 align 2
175