1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \ 3; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s 4 5define float @call_ldexpf(float %a, i32 %b) { 6; CHECK-LABEL: call_ldexpf: 7; CHECK: # %bb.0: 8; CHECK-NEXT: mflr r0 9; CHECK-NEXT: stdu r1, -32(r1) 10; CHECK-NEXT: std r0, 48(r1) 11; CHECK-NEXT: .cfi_def_cfa_offset 32 12; CHECK-NEXT: .cfi_offset lr, 16 13; CHECK-NEXT: extsw r4, r4 14; CHECK-NEXT: bl ldexpf 15; CHECK-NEXT: nop 16; CHECK-NEXT: addi r1, r1, 32 17; CHECK-NEXT: ld r0, 16(r1) 18; CHECK-NEXT: mtlr r0 19; CHECK-NEXT: blr 20 %result = call float @ldexpf(float %a, i32 %b) 21 ret float %result 22} 23 24define double @call_ldexp(double %a, i32 %b) { 25; CHECK-LABEL: call_ldexp: 26; CHECK: # %bb.0: 27; CHECK-NEXT: mflr r0 28; CHECK-NEXT: stdu r1, -32(r1) 29; CHECK-NEXT: std r0, 48(r1) 30; CHECK-NEXT: .cfi_def_cfa_offset 32 31; CHECK-NEXT: .cfi_offset lr, 16 32; CHECK-NEXT: extsw r4, r4 33; CHECK-NEXT: bl ldexp 34; CHECK-NEXT: nop 35; CHECK-NEXT: addi r1, r1, 32 36; CHECK-NEXT: ld r0, 16(r1) 37; CHECK-NEXT: mtlr r0 38; CHECK-NEXT: blr 39 %result = call double @ldexp(double %a, i32 %b) 40 ret double %result 41} 42 43define ppc_fp128 @call_ldexpl(ppc_fp128 %a, i32 %b) { 44; CHECK-LABEL: call_ldexpl: 45; CHECK: # %bb.0: 46; CHECK-NEXT: mflr r0 47; CHECK-NEXT: stdu r1, -32(r1) 48; CHECK-NEXT: std r0, 48(r1) 49; CHECK-NEXT: .cfi_def_cfa_offset 32 50; CHECK-NEXT: .cfi_offset lr, 16 51; CHECK-NEXT: clrldi r5, r5, 32 52; CHECK-NEXT: bl ldexpl 53; CHECK-NEXT: nop 54; CHECK-NEXT: addi r1, r1, 32 55; CHECK-NEXT: ld r0, 16(r1) 56; CHECK-NEXT: mtlr r0 57; CHECK-NEXT: blr 58 %result = call ppc_fp128 @ldexpl(ppc_fp128 %a, i32 %b) 59 ret ppc_fp128 %result 60} 61 62declare float @ldexpf(float %a, i32 %b) #0 63declare double @ldexp(double %a, i32 %b) #0 64declare ppc_fp128 @ldexpl(ppc_fp128 %a, i32 %b) #0 65 66attributes #0 = { nounwind readonly } 67