xref: /llvm-project/llvm/test/CodeGen/PowerPC/lbz-from-ld-shift.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -mtriple=powerpc64--   < %s | FileCheck %s --check-prefixes=BE
3; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -mtriple=powerpc64le-- < %s | FileCheck %s --check-prefixes=LE
4
5define signext i32 @test(ptr nocapture readonly %P) nounwind {
6; BE-LABEL: test:
7; BE:       # %bb.0:
8; BE-NEXT:    lbz r3, 0(r3)
9; BE-NEXT:    blr
10;
11; LE-LABEL: test:
12; LE:       # %bb.0:
13; LE-NEXT:    lbz r3, 3(r3)
14; LE-NEXT:    blr
15  %t0 = load i32, ptr %P, align 4
16  %shr = lshr i32 %t0, 24
17  ret i32 %shr
18}
19