1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -ppc-min-jump-table-entries=4 -o - \ 3; RUN: -ppc-asm-full-reg-names -verify-machineinstrs %s | FileCheck %s 4 5; Function Attrs: nounwind 6define dso_local zeroext i32 @test(i32 signext %l) nounwind { 7; CHECK-LABEL: test: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: mflr r0 10; CHECK-NEXT: stdu r1, -32(r1) 11; CHECK-NEXT: addi r3, r3, -1 12; CHECK-NEXT: std r0, 48(r1) 13; CHECK-NEXT: cmplwi r3, 5 14; CHECK-NEXT: bgt cr0, .LBB0_9 15; CHECK-NEXT: # %bb.1: # %entry 16; CHECK-NEXT: addis r4, r2, .LC0@toc@ha 17; CHECK-NEXT: rldic r3, r3, 2, 30 18; CHECK-NEXT: ld r4, .LC0@toc@l(r4) 19; CHECK-NEXT: lwax r3, r3, r4 20; CHECK-NEXT: add r3, r3, r4 21; CHECK-NEXT: mtctr r3 22; CHECK-NEXT: bctr 23; CHECK-NEXT: .LBB0_2: # %sw.bb 24; CHECK-NEXT: li r3, 2 25; CHECK-NEXT: bl test1 26; CHECK-NEXT: nop 27; CHECK-NEXT: b .LBB0_11 28; CHECK-NEXT: .LBB0_3: # %sw.bb10 29; CHECK-NEXT: li r3, 66 30; CHECK-NEXT: bl test4 31; CHECK-NEXT: nop 32; CHECK-NEXT: bl test1 33; CHECK-NEXT: nop 34; CHECK-NEXT: b .LBB0_11 35; CHECK-NEXT: .LBB0_4: # %sw.bb5 36; CHECK-NEXT: li r3, 4 37; CHECK-NEXT: bl test2 38; CHECK-NEXT: nop 39; CHECK-NEXT: b .LBB0_10 40; CHECK-NEXT: .LBB0_5: # %sw.bb8 41; CHECK-NEXT: li r3, 5 42; CHECK-NEXT: bl test4 43; CHECK-NEXT: nop 44; CHECK-NEXT: b .LBB0_11 45; CHECK-NEXT: .LBB0_6: # %sw.bb3 46; CHECK-NEXT: li r3, 3 47; CHECK-NEXT: b .LBB0_8 48; CHECK-NEXT: .LBB0_7: # %sw.bb13 49; CHECK-NEXT: li r3, 66 50; CHECK-NEXT: .LBB0_8: # %return 51; CHECK-NEXT: bl test2 52; CHECK-NEXT: nop 53; CHECK-NEXT: b .LBB0_11 54; CHECK-NEXT: .LBB0_9: # %sw.default 55; CHECK-NEXT: li r3, 1 56; CHECK-NEXT: bl test1 57; CHECK-NEXT: nop 58; CHECK-NEXT: .LBB0_10: # %return 59; CHECK-NEXT: bl test3 60; CHECK-NEXT: nop 61; CHECK-NEXT: .LBB0_11: # %return 62; CHECK-NEXT: clrldi r3, r3, 32 63; CHECK-NEXT: addi r1, r1, 32 64; CHECK-NEXT: ld r0, 16(r1) 65; CHECK-NEXT: mtlr r0 66; CHECK-NEXT: blr 67entry: 68 switch i32 %l, label %sw.default [ 69 i32 1, label %sw.bb 70 i32 2, label %sw.bb3 71 i32 3, label %sw.bb5 72 i32 4, label %sw.bb8 73 i32 5, label %sw.bb10 74 i32 6, label %sw.bb13 75 ] 76 77sw.default: ; preds = %entry 78 %call = tail call signext i32 @test1(i32 signext 1) 79 %call1 = tail call signext i32 @test3(i32 signext %call) 80 br label %return 81 82sw.bb: ; preds = %entry 83 %call2 = tail call signext i32 @test1(i32 signext 2) 84 br label %return 85 86sw.bb3: ; preds = %entry 87 %call4 = tail call signext i32 @test2(i32 signext 3) 88 br label %return 89 90sw.bb5: ; preds = %entry 91 %call6 = tail call signext i32 @test2(i32 signext 4) 92 %call7 = tail call signext i32 @test3(i32 signext %call6) 93 br label %return 94 95sw.bb8: ; preds = %entry 96 %call9 = tail call signext i32 @test4(i32 signext 5) 97 br label %return 98 99sw.bb10: ; preds = %entry 100 %call11 = tail call signext i32 @test4(i32 signext 66) 101 %call12 = tail call signext i32 @test1(i32 signext %call11) 102 br label %return 103 104sw.bb13: ; preds = %entry 105 %call14 = tail call signext i32 @test2(i32 signext 66) 106 br label %return 107 108return: ; preds = %sw.bb13, %sw.bb10, %sw.bb8, %sw.bb5, %sw.bb3, %sw.bb, %sw.default 109 %retval.0 = phi i32 [ %call1, %sw.default ], [ %call14, %sw.bb13 ], [ %call12, %sw.bb10 ], [ %call9, %sw.bb8 ], [ %call7, %sw.bb5 ], [ %call4, %sw.bb3 ], [ %call2, %sw.bb ] 110 ret i32 %retval.0 111} 112 113declare signext i32 @test3(i32 signext) 114 115declare signext i32 @test1(i32 signext) 116 117declare signext i32 @test2(i32 signext) 118 119declare signext i32 @test4(i32 signext) 120