1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs -o - %s | FileCheck %s 3 4 5define i1 @isnan_float(float %x) nounwind { 6; CHECK-LABEL: isnan_float: 7; CHECK: # %bb.0: 8; CHECK-NEXT: xststdcsp 0, 1, 64 9; CHECK-NEXT: li 3, 0 10; CHECK-NEXT: li 4, 1 11; CHECK-NEXT: iseleq 3, 4, 3 12; CHECK-NEXT: blr 13 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) ; nan 14 ret i1 %1 15} 16 17define i1 @isnan_double(double %x) nounwind { 18; CHECK-LABEL: isnan_double: 19; CHECK: # %bb.0: 20; CHECK-NEXT: xststdcdp 0, 1, 64 21; CHECK-NEXT: li 3, 0 22; CHECK-NEXT: li 4, 1 23; CHECK-NEXT: iseleq 3, 4, 3 24; CHECK-NEXT: blr 25 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) ; nan 26 ret i1 %1 27} 28 29define i1 @isnan_ppc_fp128(ppc_fp128 %x) nounwind { 30; CHECK-LABEL: isnan_ppc_fp128: 31; CHECK: # %bb.0: 32; CHECK-NEXT: xststdcdp 0, 1, 64 33; CHECK-NEXT: li 3, 0 34; CHECK-NEXT: li 4, 1 35; CHECK-NEXT: iseleq 3, 4, 3 36; CHECK-NEXT: blr 37 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 3) ; nan 38 ret i1 %1 39} 40 41define i1 @isnan_f128(fp128 %x) nounwind { 42; CHECK-LABEL: isnan_f128: 43; CHECK: # %bb.0: 44; CHECK-NEXT: xststdcqp 0, 2, 64 45; CHECK-NEXT: li 3, 0 46; CHECK-NEXT: li 4, 1 47; CHECK-NEXT: iseleq 3, 4, 3 48; CHECK-NEXT: blr 49 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 3) ; nan 50 ret i1 %1 51} 52 53define i1 @isnan_float_strictfp(float %x) strictfp nounwind { 54; CHECK-LABEL: isnan_float_strictfp: 55; CHECK: # %bb.0: 56; CHECK-NEXT: xststdcsp 0, 1, 64 57; CHECK-NEXT: li 3, 0 58; CHECK-NEXT: li 4, 1 59; CHECK-NEXT: iseleq 3, 4, 3 60; CHECK-NEXT: blr 61 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp ; nan 62 ret i1 %1 63} 64 65define i1 @isnan_double_strictfp(double %x) strictfp nounwind { 66; CHECK-LABEL: isnan_double_strictfp: 67; CHECK: # %bb.0: 68; CHECK-NEXT: xststdcdp 0, 1, 64 69; CHECK-NEXT: li 3, 0 70; CHECK-NEXT: li 4, 1 71; CHECK-NEXT: iseleq 3, 4, 3 72; CHECK-NEXT: blr 73 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) strictfp ; nan 74 ret i1 %1 75} 76 77define i1 @isnan_ppc_fp128_strictfp(ppc_fp128 %x) strictfp nounwind { 78; CHECK-LABEL: isnan_ppc_fp128_strictfp: 79; CHECK: # %bb.0: 80; CHECK-NEXT: xststdcdp 0, 1, 64 81; CHECK-NEXT: li 3, 0 82; CHECK-NEXT: li 4, 1 83; CHECK-NEXT: iseleq 3, 4, 3 84; CHECK-NEXT: blr 85 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 3) strictfp ; nan 86 ret i1 %1 87} 88 89define i1 @isnan_f128_strictfp(fp128 %x) strictfp nounwind { 90; CHECK-LABEL: isnan_f128_strictfp: 91; CHECK: # %bb.0: 92; CHECK-NEXT: xststdcqp 0, 2, 64 93; CHECK-NEXT: li 3, 0 94; CHECK-NEXT: li 4, 1 95; CHECK-NEXT: iseleq 3, 4, 3 96; CHECK-NEXT: blr 97 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 3) strictfp ; nan 98 ret i1 %1 99} 100 101define i1 @isinf_float(float %x) nounwind { 102; CHECK-LABEL: isinf_float: 103; CHECK: # %bb.0: 104; CHECK-NEXT: xststdcsp 0, 1, 48 105; CHECK-NEXT: li 3, 0 106; CHECK-NEXT: li 4, 1 107; CHECK-NEXT: iseleq 3, 4, 3 108; CHECK-NEXT: blr 109 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf" 110 ret i1 %1 111} 112 113define i1 @isinf_ppc_fp128(ppc_fp128 %x) nounwind { 114; CHECK-LABEL: isinf_ppc_fp128: 115; CHECK: # %bb.0: 116; CHECK-NEXT: xststdcdp 0, 1, 48 117; CHECK-NEXT: li 3, 0 118; CHECK-NEXT: li 4, 1 119; CHECK-NEXT: iseleq 3, 4, 3 120; CHECK-NEXT: blr 121 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 516) ; 0x204 = "inf" 122 ret i1 %1 123} 124 125define i1 @isinf_f128(fp128 %x) nounwind { 126; CHECK-LABEL: isinf_f128: 127; CHECK: # %bb.0: 128; CHECK-NEXT: xststdcqp 0, 2, 48 129; CHECK-NEXT: li 3, 0 130; CHECK-NEXT: li 4, 1 131; CHECK-NEXT: iseleq 3, 4, 3 132; CHECK-NEXT: blr 133 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 516) ; 0x204 = "inf" 134 ret i1 %1 135} 136 137define i1 @isfinite_float(float %x) nounwind { 138; CHECK-LABEL: isfinite_float: 139; CHECK: # %bb.0: 140; CHECK-NEXT: xststdcsp 0, 1, 112 141; CHECK-NEXT: li 3, 1 142; CHECK-NEXT: iseleq 3, 0, 3 143; CHECK-NEXT: blr 144 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite" 145 ret i1 %1 146} 147 148define i1 @isfinite_f128(fp128 %x) nounwind { 149; CHECK-LABEL: isfinite_f128: 150; CHECK: # %bb.0: 151; CHECK-NEXT: xststdcqp 0, 2, 112 152; CHECK-NEXT: li 3, 1 153; CHECK-NEXT: iseleq 3, 0, 3 154; CHECK-NEXT: blr 155 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 504) ; 0x1f8 = "finite" 156 ret i1 %1 157} 158 159define i1 @isnormal_float(float %x) nounwind { 160; CHECK-LABEL: isnormal_float: 161; CHECK: # %bb.0: 162; CHECK-NEXT: xststdcsp 0, 1, 127 163; CHECK-NEXT: li 3, 1 164; CHECK-NEXT: iseleq 3, 0, 3 165; CHECK-NEXT: blr 166 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 264) ; 0x108 = "normal" 167 ret i1 %1 168} 169 170define i1 @isnormal_f128(fp128 %x) nounwind { 171; CHECK-LABEL: isnormal_f128: 172; CHECK: # %bb.0: 173; CHECK-NEXT: xststdcqp 0, 2, 127 174; CHECK-NEXT: li 3, 1 175; CHECK-NEXT: iseleq 3, 0, 3 176; CHECK-NEXT: blr 177 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 264) ; 0x108 = "normal" 178 ret i1 %1 179} 180 181define i1 @issubnormal_float(float %x) nounwind { 182; CHECK-LABEL: issubnormal_float: 183; CHECK: # %bb.0: 184; CHECK-NEXT: xststdcsp 0, 1, 3 185; CHECK-NEXT: li 3, 0 186; CHECK-NEXT: li 4, 1 187; CHECK-NEXT: iseleq 3, 4, 3 188; CHECK-NEXT: blr 189 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 144) ; 0x90 = "subnormal" 190 ret i1 %1 191} 192 193define i1 @issubnormal_f128(fp128 %x) nounwind { 194; CHECK-LABEL: issubnormal_f128: 195; CHECK: # %bb.0: 196; CHECK-NEXT: xststdcqp 0, 2, 3 197; CHECK-NEXT: li 3, 0 198; CHECK-NEXT: li 4, 1 199; CHECK-NEXT: iseleq 3, 4, 3 200; CHECK-NEXT: blr 201 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 144) ; 0x90 = "subnormal" 202 ret i1 %1 203} 204 205define i1 @iszero_float(float %x) nounwind { 206; CHECK-LABEL: iszero_float: 207; CHECK: # %bb.0: 208; CHECK-NEXT: xststdcsp 0, 1, 12 209; CHECK-NEXT: li 3, 0 210; CHECK-NEXT: li 4, 1 211; CHECK-NEXT: iseleq 3, 4, 3 212; CHECK-NEXT: blr 213 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 96) ; 0x60 = "zero" 214 ret i1 %1 215} 216 217define i1 @iszero_f128(fp128 %x) nounwind { 218; CHECK-LABEL: iszero_f128: 219; CHECK: # %bb.0: 220; CHECK-NEXT: xststdcqp 0, 2, 12 221; CHECK-NEXT: li 3, 0 222; CHECK-NEXT: li 4, 1 223; CHECK-NEXT: iseleq 3, 4, 3 224; CHECK-NEXT: blr 225 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 96) ; 0x60 = "zero" 226 ret i1 %1 227} 228 229define i1 @issnan_float(float %x) nounwind { 230; CHECK-LABEL: issnan_float: 231; CHECK: # %bb.0: 232; CHECK-NEXT: xscvdpspn 0, 1 233; CHECK-NEXT: xststdcsp 1, 1, 64 234; CHECK-NEXT: mffprwz 3, 0 235; CHECK-NEXT: andis. 3, 3, 64 236; CHECK-NEXT: li 3, 1 237; CHECK-NEXT: crnand 20, 6, 2 238; CHECK-NEXT: isel 3, 0, 3, 20 239; CHECK-NEXT: blr 240 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 1) 241 ret i1 %1 242} 243 244define i1 @issnan_double(double %x) nounwind { 245; CHECK-LABEL: issnan_double: 246; CHECK: # %bb.0: 247; CHECK-NEXT: mffprd 3, 1 248; CHECK-NEXT: xststdcdp 1, 1, 64 249; CHECK-NEXT: rldicl 3, 3, 32, 32 250; CHECK-NEXT: andis. 3, 3, 8 251; CHECK-NEXT: li 3, 1 252; CHECK-NEXT: crnand 20, 6, 2 253; CHECK-NEXT: isel 3, 0, 3, 20 254; CHECK-NEXT: blr 255 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 1) 256 ret i1 %1 257} 258 259define i1 @issnan_fp128(fp128 %x) nounwind { 260; CHECK-LABEL: issnan_fp128: 261; CHECK: # %bb.0: 262; CHECK-NEXT: li 3, 12 263; CHECK-NEXT: xststdcqp 1, 2, 64 264; CHECK-NEXT: vextuwrx 3, 3, 2 265; CHECK-NEXT: andi. 3, 3, 32768 266; CHECK-NEXT: li 3, 1 267; CHECK-NEXT: crnand 20, 6, 2 268; CHECK-NEXT: isel 3, 0, 3, 20 269; CHECK-NEXT: blr 270 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 1) 271 ret i1 %1 272} 273 274define i1 @issnan_ppc_fp128(ppc_fp128 %x) nounwind { 275; CHECK-LABEL: issnan_ppc_fp128: 276; CHECK: # %bb.0: 277; CHECK-NEXT: mffprd 3, 1 278; CHECK-NEXT: xststdcdp 1, 1, 64 279; CHECK-NEXT: rldicl 3, 3, 32, 32 280; CHECK-NEXT: andis. 3, 3, 8 281; CHECK-NEXT: li 3, 1 282; CHECK-NEXT: crnand 20, 6, 2 283; CHECK-NEXT: isel 3, 0, 3, 20 284; CHECK-NEXT: blr 285 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 1) 286 ret i1 %1 287} 288 289define i1 @isqnan_float(float %x) nounwind { 290; CHECK-LABEL: isqnan_float: 291; CHECK: # %bb.0: 292; CHECK-NEXT: xscvdpspn 0, 1 293; CHECK-NEXT: xststdcsp 1, 1, 64 294; CHECK-NEXT: mffprwz 3, 0 295; CHECK-NEXT: srwi 3, 3, 22 296; CHECK-NEXT: andi. 3, 3, 1 297; CHECK-NEXT: li 3, 1 298; CHECK-NEXT: crnand 20, 6, 1 299; CHECK-NEXT: isel 3, 0, 3, 20 300; CHECK-NEXT: blr 301 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 2) 302 ret i1 %1 303} 304 305define i1 @isqnan_double(double %x) nounwind { 306; CHECK-LABEL: isqnan_double: 307; CHECK: # %bb.0: 308; CHECK-NEXT: mffprd 3, 1 309; CHECK-NEXT: xststdcdp 1, 1, 64 310; CHECK-NEXT: rldicl 3, 3, 13, 51 311; CHECK-NEXT: andi. 3, 3, 1 312; CHECK-NEXT: li 3, 1 313; CHECK-NEXT: crnand 20, 6, 1 314; CHECK-NEXT: isel 3, 0, 3, 20 315; CHECK-NEXT: blr 316 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 2) 317 ret i1 %1 318} 319 320define i1 @isqnan_fp128(fp128 %x) nounwind { 321; CHECK-LABEL: isqnan_fp128: 322; CHECK: # %bb.0: 323; CHECK-NEXT: li 3, 12 324; CHECK-NEXT: xststdcqp 1, 2, 64 325; CHECK-NEXT: vextuwrx 3, 3, 2 326; CHECK-NEXT: srwi 3, 3, 15 327; CHECK-NEXT: andi. 3, 3, 1 328; CHECK-NEXT: li 3, 1 329; CHECK-NEXT: crnand 20, 6, 1 330; CHECK-NEXT: isel 3, 0, 3, 20 331; CHECK-NEXT: blr 332 %1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 2) 333 ret i1 %1 334} 335 336define i1 @isqnan_ppc_fp128(ppc_fp128 %x) nounwind { 337; CHECK-LABEL: isqnan_ppc_fp128: 338; CHECK: # %bb.0: 339; CHECK-NEXT: mffprd 3, 1 340; CHECK-NEXT: xststdcdp 1, 1, 64 341; CHECK-NEXT: rldicl 3, 3, 13, 51 342; CHECK-NEXT: andi. 3, 3, 1 343; CHECK-NEXT: li 3, 1 344; CHECK-NEXT: crnand 20, 6, 1 345; CHECK-NEXT: isel 3, 0, 3, 20 346; CHECK-NEXT: blr 347 %1 = call i1 @llvm.is.fpclass.ppcf128(ppc_fp128 %x, i32 2) 348 ret i1 %1 349} 350 351define i1 @isposzero_double(double %x) nounwind { 352; CHECK-LABEL: isposzero_double: 353; CHECK: # %bb.0: 354; CHECK-NEXT: xststdcdp 0, 1, 8 355; CHECK-NEXT: li 3, 0 356; CHECK-NEXT: li 4, 1 357; CHECK-NEXT: iseleq 3, 4, 3 358; CHECK-NEXT: blr 359 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 64) 360 ret i1 %1 361} 362 363define i1 @isnegzero_double(double %x) nounwind { 364; CHECK-LABEL: isnegzero_double: 365; CHECK: # %bb.0: 366; CHECK-NEXT: xststdcdp 0, 1, 4 367; CHECK-NEXT: li 3, 0 368; CHECK-NEXT: li 4, 1 369; CHECK-NEXT: iseleq 3, 4, 3 370; CHECK-NEXT: blr 371 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 32) 372 ret i1 %1 373} 374 375define i1 @isposnormal_double(double %x) nounwind { 376; CHECK-LABEL: isposnormal_double: 377; CHECK: # %bb.0: 378; CHECK-NEXT: xststdcdp 0, 1, 127 379; CHECK-NEXT: li 3, 1 380; CHECK-NEXT: cror 20, 0, 2 381; CHECK-NEXT: isel 3, 0, 3, 20 382; CHECK-NEXT: blr 383 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 256) 384 ret i1 %1 385} 386 387define i1 @isnegnormal_double(double %x) nounwind { 388; CHECK-LABEL: isnegnormal_double: 389; CHECK: # %bb.0: 390; CHECK-NEXT: xststdcdp 0, 1, 127 391; CHECK-NEXT: li 3, 1 392; CHECK-NEXT: crorc 20, 2, 0 393; CHECK-NEXT: isel 3, 0, 3, 20 394; CHECK-NEXT: blr 395 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 8) 396 ret i1 %1 397} 398 399define i1 @isnormal_double(double %x) nounwind { 400; CHECK-LABEL: isnormal_double: 401; CHECK: # %bb.0: 402; CHECK-NEXT: xststdcdp 0, 1, 127 403; CHECK-NEXT: li 3, 1 404; CHECK-NEXT: iseleq 3, 0, 3 405; CHECK-NEXT: blr 406 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 264) 407 ret i1 %1 408} 409 410define i1 @isclass_00d_double(double %x) nounwind { 411; CHECK-LABEL: isclass_00d_double: 412; CHECK: # %bb.0: 413; CHECK-NEXT: mffprd 3, 1 414; CHECK-NEXT: xststdcdp 0, 1, 127 415; CHECK-NEXT: xststdcdp 1, 1, 64 416; CHECK-NEXT: rldicl 3, 3, 32, 32 417; CHECK-NEXT: crandc 20, 0, 2 418; CHECK-NEXT: andis. 3, 3, 8 419; CHECK-NEXT: li 3, 1 420; CHECK-NEXT: crand 21, 6, 2 421; CHECK-NEXT: xststdcdp 0, 1, 16 422; CHECK-NEXT: cror 21, 2, 21 423; CHECK-NEXT: crnor 20, 21, 20 424; CHECK-NEXT: isel 3, 0, 3, 20 425; CHECK-NEXT: blr 426 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 13) 427 ret i1 %1 428} 429 430define i1 @isclass_1c0_float(float %x) nounwind { 431; CHECK-LABEL: isclass_1c0_float: 432; CHECK: # %bb.0: 433; CHECK-NEXT: xststdcsp 0, 1, 127 434; CHECK-NEXT: li 3, 1 435; CHECK-NEXT: crnor 20, 0, 2 436; CHECK-NEXT: xststdcsp 0, 1, 10 437; CHECK-NEXT: crnor 20, 2, 20 438; CHECK-NEXT: isel 3, 0, 3, 20 439; CHECK-NEXT: blr 440 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 448) 441 ret i1 %1 442} 443 444declare i1 @llvm.is.fpclass.f32(float, i32) 445declare i1 @llvm.is.fpclass.f64(double, i32) 446declare i1 @llvm.is.fpclass.ppcf128(ppc_fp128, i32) 447declare i1 @llvm.is.fpclass.f128(fp128, i32) 448