xref: /llvm-project/llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr-spe.ll (revision c42f0a6e6476971974cb3f52c1138dbd8f9cca1f)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu \
3; RUN:          -mattr=+spe |  FileCheck %s
4
5define i32 @test_f32(float %x) {
6; CHECK-LABEL: test_f32:
7; CHECK:       # %bb.0: # %entry
8; CHECK-NEXT:    stwu 1, -16(1)
9; CHECK-NEXT:    .cfi_def_cfa_offset 16
10; CHECK-NEXT:    .cfi_offset r31, -4
11; CHECK-NEXT:    stw 3, 8(1)
12; CHECK-NEXT:    stw 31, 12(1) # 4-byte Folded Spill
13; CHECK-NEXT:    lwz 3, 8(1)
14; CHECK-NEXT:    #APP
15; CHECK-NEXT:    efsctsi 31, 3
16; CHECK-NEXT:    #NO_APP
17; CHECK-NEXT:    mr 3, 31
18; CHECK-NEXT:    lwz 31, 12(1) # 4-byte Folded Reload
19; CHECK-NEXT:    addi 1, 1, 16
20; CHECK-NEXT:    blr
21entry:
22  %0 = call i32 asm sideeffect "efsctsi $0, $1", "={f31},f"(float %x)
23  ret i32 %0
24}
25
26define i32 @test_f64(double %x) {
27; CHECK-LABEL: test_f64:
28; CHECK:       # %bb.0: # %entry
29; CHECK-NEXT:    evmergelo 3, 3, 4
30; CHECK-NEXT:    #APP
31; CHECK-NEXT:    efdctsi 0, 3
32; CHECK-NEXT:    #NO_APP
33; CHECK-NEXT:    mr 3, 0
34; CHECK-NEXT:    blr
35entry:
36  %0 = call i32 asm sideeffect "efdctsi $0, $1", "={f0},d"(double %x)
37  ret i32 %0
38}
39
40