xref: /llvm-project/llvm/test/CodeGen/PowerPC/ftrunc-legalize.ll (revision a51712751c184ebe056718c938d2526693a31564)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=ppc -mtriple=powerpc64-- -mattr=altivec -verify-machineinstrs < %s | FileCheck %s
3
4; This would assert because the widened vector op is
5; legal/custom, but the scalar op is expanded.
6
7define i32 @PR42010(<2 x float> %x) {
8; CHECK-LABEL: PR42010:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    addi 3, 1, -32
11; CHECK-NEXT:    vrfiz 2, 2
12; CHECK-NEXT:    stvx 2, 0, 3
13; CHECK-NEXT:    lfs 0, -28(1)
14; CHECK-NEXT:    fctiwz 0, 0
15; CHECK-NEXT:    stfd 0, -8(1)
16; CHECK-NEXT:    lwz 3, -4(1)
17; CHECK-NEXT:    blr
18  %t0 = call <2 x float> @llvm.trunc.v2f32(<2 x float> %x)
19  %t1 = extractelement <2 x float> %t0, i32 1
20  %t2 = fptosi float %t1 to i32
21  ret i32 %t2
22}
23
24declare <2 x float> @llvm.trunc.v2f32(<2 x float>)
25