1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s 3 4declare double @llvm.sqrt.f64(double) 5 6; Test several VSX FMA mutation opportunities. 7 8; This is reasonable transformation since it eliminates extra register copy. 9define double @foo3_fmf(double %a) nounwind { 10; CHECK-LABEL: foo3_fmf: 11; CHECK: # %bb.0: 12; CHECK-NEXT: xstsqrtdp 0, 1 13; CHECK-NEXT: bc 12, 2, .LBB0_2 14; CHECK-NEXT: # %bb.1: 15; CHECK-NEXT: vspltisw 2, -3 16; CHECK-NEXT: xsrsqrtedp 0, 1 17; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha 18; CHECK-NEXT: xvcvsxwdp 3, 34 19; CHECK-NEXT: xsmuldp 2, 1, 0 20; CHECK-NEXT: fmr 4, 3 21; CHECK-NEXT: xsmaddadp 4, 2, 0 22; CHECK-NEXT: lfs 2, .LCPI0_0@toc@l(3) 23; CHECK-NEXT: xsmuldp 0, 0, 2 24; CHECK-NEXT: xsmuldp 0, 0, 4 25; CHECK-NEXT: xsmuldp 1, 1, 0 26; CHECK-NEXT: xsmaddadp 3, 1, 0 27; CHECK-NEXT: xsmuldp 0, 1, 2 28; CHECK-NEXT: xsmuldp 1, 0, 3 29; CHECK-NEXT: blr 30; CHECK-NEXT: .LBB0_2: 31; CHECK-NEXT: xssqrtdp 1, 1 32; CHECK-NEXT: blr 33 %r = call contract reassoc afn ninf double @llvm.sqrt.f64(double %a) 34 ret double %r 35} 36 37define double @foo3_safe(double %a) nounwind { 38; CHECK-LABEL: foo3_safe: 39; CHECK: # %bb.0: 40; CHECK-NEXT: xssqrtdp 1, 1 41; CHECK-NEXT: blr 42 %r = call double @llvm.sqrt.f64(double %a) 43 ret double %r 44} 45 46