1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -relocation-model=pic -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \ 3; RUN: -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \ 4; RUN: | FileCheck %s 5; RUN: llc -relocation-model=pic -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown \ 6; RUN: -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \ 7; RUN: | FileCheck -check-prefix=CHECK-BE %s 8; RUN: llc -relocation-model=pic -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \ 9; RUN: -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \ 10; RUN: | FileCheck %s -check-prefix=CHECK-P8 11 12; Testing homogeneous aggregates. 13 14%struct.With9fp128params = type { fp128, fp128, fp128, fp128, fp128, fp128, 15 fp128, fp128, fp128 } 16 17@a1 = local_unnamed_addr global [3 x fp128] zeroinitializer, align 16 18 19; Function Attrs: norecurse nounwind readonly 20define fp128 @testArray_01(ptr nocapture readonly %sa) { 21; CHECK-LABEL: testArray_01: 22; CHECK: # %bb.0: # %entry 23; CHECK-NEXT: lxv v2, 32(r3) 24; CHECK-NEXT: blr 25; 26; CHECK-BE-LABEL: testArray_01: 27; CHECK-BE: # %bb.0: # %entry 28; CHECK-BE-NEXT: lxv v2, 32(r3) 29; CHECK-BE-NEXT: blr 30; 31; CHECK-P8-LABEL: testArray_01: 32; CHECK-P8: # %bb.0: # %entry 33; CHECK-P8-NEXT: addi r3, r3, 32 34; CHECK-P8-NEXT: lxvd2x vs0, 0, r3 35; CHECK-P8-NEXT: xxswapd v2, vs0 36; CHECK-P8-NEXT: blr 37 38entry: 39 %arrayidx = getelementptr inbounds fp128, ptr %sa, i64 2 40 %0 = load fp128, ptr %arrayidx, align 16 41 ret fp128 %0 42} 43 44; Function Attrs: norecurse nounwind readonly 45define fp128 @testArray_02() { 46; CHECK-LABEL: testArray_02: 47; CHECK: # %bb.0: # %entry 48; CHECK-NEXT: addis r3, r2, .LC0@toc@ha 49; CHECK-NEXT: ld r3, .LC0@toc@l(r3) 50; CHECK-NEXT: lxv v2, 32(r3) 51; CHECK-NEXT: blr 52; 53; CHECK-BE-LABEL: testArray_02: 54; CHECK-BE: # %bb.0: # %entry 55; CHECK-BE-NEXT: addis r3, r2, .LC0@toc@ha 56; CHECK-BE-NEXT: ld r3, .LC0@toc@l(r3) 57; CHECK-BE-NEXT: lxv v2, 32(r3) 58; CHECK-BE-NEXT: blr 59; 60; CHECK-P8-LABEL: testArray_02: 61; CHECK-P8: # %bb.0: # %entry 62; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha 63; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3) 64; CHECK-P8-NEXT: addi r3, r3, 32 65; CHECK-P8-NEXT: lxvd2x vs0, 0, r3 66; CHECK-P8-NEXT: xxswapd v2, vs0 67; CHECK-P8-NEXT: blr 68 69entry: 70 %0 = load fp128, ptr getelementptr inbounds ([3 x fp128], ptr @a1, 71 i64 0, i64 2), align 16 72 ret fp128 %0 73} 74 75; Function Attrs: norecurse nounwind readnone 76define fp128 @testStruct_01(fp128 inreg returned %a.coerce) { 77; CHECK-LABEL: testStruct_01: 78; CHECK: # %bb.0: # %entry 79; CHECK-NEXT: blr 80; 81; CHECK-BE-LABEL: testStruct_01: 82; CHECK-BE: # %bb.0: # %entry 83; CHECK-BE-NEXT: blr 84; 85; CHECK-P8-LABEL: testStruct_01: 86; CHECK-P8: # %bb.0: # %entry 87; CHECK-P8-NEXT: blr 88 89entry: 90 ret fp128 %a.coerce 91} 92 93; Function Attrs: norecurse nounwind readnone 94define fp128 @testStruct_02([8 x fp128] %a.coerce) { 95; CHECK-LABEL: testStruct_02: 96; CHECK: # %bb.0: # %entry 97; CHECK-NEXT: vmr v2, v9 98; CHECK-NEXT: blr 99; 100; CHECK-BE-LABEL: testStruct_02: 101; CHECK-BE: # %bb.0: # %entry 102; CHECK-BE-NEXT: vmr v2, v9 103; CHECK-BE-NEXT: blr 104; 105; CHECK-P8-LABEL: testStruct_02: 106; CHECK-P8: # %bb.0: # %entry 107; CHECK-P8-NEXT: vmr v2, v9 108; CHECK-P8-NEXT: blr 109 110entry: 111 %a.coerce.fca.7.extract = extractvalue [8 x fp128] %a.coerce, 7 112 ret fp128 %a.coerce.fca.7.extract 113} 114 115; Since we can only pass a max of 8 float128 value in VSX registers, ensure we 116; store to stack if passing more. 117; Function Attrs: norecurse nounwind readonly 118define fp128 @testStruct_03(ptr byval(%struct.With9fp128params) nocapture readonly align 16 %a) { 119; CHECK-LABEL: testStruct_03: 120; CHECK: # %bb.0: # %entry 121; CHECK-NEXT: lxv v2, 128(r1) 122; CHECK-NEXT: std r3, 32(r1) 123; CHECK-NEXT: std r4, 40(r1) 124; CHECK-NEXT: std r5, 48(r1) 125; CHECK-NEXT: std r6, 56(r1) 126; CHECK-NEXT: std r7, 64(r1) 127; CHECK-NEXT: std r8, 72(r1) 128; CHECK-NEXT: std r9, 80(r1) 129; CHECK-NEXT: std r10, 88(r1) 130; CHECK-NEXT: blr 131; 132; CHECK-BE-LABEL: testStruct_03: 133; CHECK-BE: # %bb.0: # %entry 134; CHECK-BE-NEXT: lxv v2, 144(r1) 135; CHECK-BE-NEXT: std r3, 48(r1) 136; CHECK-BE-NEXT: std r4, 56(r1) 137; CHECK-BE-NEXT: std r5, 64(r1) 138; CHECK-BE-NEXT: std r6, 72(r1) 139; CHECK-BE-NEXT: std r7, 80(r1) 140; CHECK-BE-NEXT: std r8, 88(r1) 141; CHECK-BE-NEXT: std r9, 96(r1) 142; CHECK-BE-NEXT: std r10, 104(r1) 143; CHECK-BE-NEXT: blr 144; 145; CHECK-P8-LABEL: testStruct_03: 146; CHECK-P8: # %bb.0: # %entry 147; CHECK-P8-NEXT: li r11, 96 148; CHECK-P8-NEXT: addi r12, r1, 32 149; CHECK-P8-NEXT: std r3, 32(r1) 150; CHECK-P8-NEXT: std r4, 40(r1) 151; CHECK-P8-NEXT: std r5, 48(r1) 152; CHECK-P8-NEXT: std r6, 56(r1) 153; CHECK-P8-NEXT: lxvd2x vs0, r12, r11 154; CHECK-P8-NEXT: std r7, 64(r1) 155; CHECK-P8-NEXT: std r8, 72(r1) 156; CHECK-P8-NEXT: std r9, 80(r1) 157; CHECK-P8-NEXT: std r10, 88(r1) 158; CHECK-P8-NEXT: xxswapd v2, vs0 159; CHECK-P8-NEXT: blr 160 161entry: 162 %a7 = getelementptr inbounds %struct.With9fp128params, 163 ptr %a, i64 0, i32 6 164 %0 = load fp128, ptr %a7, align 16 165 ret fp128 %0 166} 167 168; Function Attrs: norecurse nounwind readnone 169define fp128 @testStruct_04([8 x fp128] %a.coerce) { 170; CHECK-LABEL: testStruct_04: 171; CHECK: # %bb.0: # %entry 172; CHECK-NEXT: vmr v2, v5 173; CHECK-NEXT: blr 174; 175; CHECK-BE-LABEL: testStruct_04: 176; CHECK-BE: # %bb.0: # %entry 177; CHECK-BE-NEXT: vmr v2, v5 178; CHECK-BE-NEXT: blr 179; 180; CHECK-P8-LABEL: testStruct_04: 181; CHECK-P8: # %bb.0: # %entry 182; CHECK-P8-NEXT: vmr v2, v5 183; CHECK-P8-NEXT: blr 184 185entry: 186 %a.coerce.fca.3.extract = extractvalue [8 x fp128] %a.coerce, 3 187 ret fp128 %a.coerce.fca.3.extract 188} 189 190; Function Attrs: norecurse nounwind readnone 191define fp128 @testHUnion_01([1 x fp128] %a.coerce) { 192; CHECK-LABEL: testHUnion_01: 193; CHECK: # %bb.0: # %entry 194; CHECK-NEXT: blr 195; 196; CHECK-BE-LABEL: testHUnion_01: 197; CHECK-BE: # %bb.0: # %entry 198; CHECK-BE-NEXT: blr 199; 200; CHECK-P8-LABEL: testHUnion_01: 201; CHECK-P8: # %bb.0: # %entry 202; CHECK-P8-NEXT: blr 203 204entry: 205 %a.coerce.fca.0.extract = extractvalue [1 x fp128] %a.coerce, 0 206 ret fp128 %a.coerce.fca.0.extract 207} 208 209; Function Attrs: norecurse nounwind readnone 210define fp128 @testHUnion_02([3 x fp128] %a.coerce) { 211; CHECK-LABEL: testHUnion_02: 212; CHECK: # %bb.0: # %entry 213; CHECK-NEXT: blr 214; 215; CHECK-BE-LABEL: testHUnion_02: 216; CHECK-BE: # %bb.0: # %entry 217; CHECK-BE-NEXT: blr 218; 219; CHECK-P8-LABEL: testHUnion_02: 220; CHECK-P8: # %bb.0: # %entry 221; CHECK-P8-NEXT: blr 222 223entry: 224 %a.coerce.fca.0.extract = extractvalue [3 x fp128] %a.coerce, 0 225 ret fp128 %a.coerce.fca.0.extract 226} 227 228; Function Attrs: norecurse nounwind readnone 229define fp128 @testHUnion_03([3 x fp128] %a.coerce) { 230; CHECK-LABEL: testHUnion_03: 231; CHECK: # %bb.0: # %entry 232; CHECK-NEXT: vmr v2, v3 233; CHECK-NEXT: blr 234; 235; CHECK-BE-LABEL: testHUnion_03: 236; CHECK-BE: # %bb.0: # %entry 237; CHECK-BE-NEXT: vmr v2, v3 238; CHECK-BE-NEXT: blr 239; 240; CHECK-P8-LABEL: testHUnion_03: 241; CHECK-P8: # %bb.0: # %entry 242; CHECK-P8-NEXT: vmr v2, v3 243; CHECK-P8-NEXT: blr 244 245entry: 246 %a.coerce.fca.1.extract = extractvalue [3 x fp128] %a.coerce, 1 247 ret fp128 %a.coerce.fca.1.extract 248} 249 250; Function Attrs: norecurse nounwind readnone 251define fp128 @testHUnion_04([3 x fp128] %a.coerce) { 252; CHECK-LABEL: testHUnion_04: 253; CHECK: # %bb.0: # %entry 254; CHECK-NEXT: vmr v2, v4 255; CHECK-NEXT: blr 256; 257; CHECK-BE-LABEL: testHUnion_04: 258; CHECK-BE: # %bb.0: # %entry 259; CHECK-BE-NEXT: vmr v2, v4 260; CHECK-BE-NEXT: blr 261; 262; CHECK-P8-LABEL: testHUnion_04: 263; CHECK-P8: # %bb.0: # %entry 264; CHECK-P8-NEXT: vmr v2, v4 265; CHECK-P8-NEXT: blr 266 267entry: 268 %a.coerce.fca.2.extract = extractvalue [3 x fp128] %a.coerce, 2 269 ret fp128 %a.coerce.fca.2.extract 270} 271 272; Testing mixed member aggregates. 273 274%struct.MixedC = type { i32, %struct.SA, float, [12 x i8] } 275%struct.SA = type { double, fp128, <4 x float> } 276 277; Function Attrs: norecurse nounwind readnone 278define fp128 @testMixedAggregate([3 x i128] %a.coerce) { 279; CHECK-LABEL: testMixedAggregate: 280; CHECK: # %bb.0: # %entry 281; CHECK-NEXT: mtvsrdd v2, r8, r7 282; CHECK-NEXT: blr 283; 284; CHECK-BE-LABEL: testMixedAggregate: 285; CHECK-BE: # %bb.0: # %entry 286; CHECK-BE-NEXT: mtvsrdd v2, r7, r8 287; CHECK-BE-NEXT: blr 288; 289; CHECK-P8-LABEL: testMixedAggregate: 290; CHECK-P8: # %bb.0: # %entry 291; CHECK-P8-NEXT: addi r3, r1, -16 292; CHECK-P8-NEXT: std r8, -8(r1) 293; CHECK-P8-NEXT: std r7, -16(r1) 294; CHECK-P8-NEXT: lxvd2x vs0, 0, r3 295; CHECK-P8-NEXT: xxswapd v2, vs0 296; CHECK-P8-NEXT: blr 297 298entry: 299 %a.coerce.fca.2.extract = extractvalue [3 x i128] %a.coerce, 2 300 %0 = bitcast i128 %a.coerce.fca.2.extract to fp128 301 ret fp128 %0 302} 303 304; Function Attrs: norecurse nounwind readnone 305define fp128 @testMixedAggregate_02([4 x i128] %a.coerce) { 306; CHECK-LABEL: testMixedAggregate_02: 307; CHECK: # %bb.0: # %entry 308; CHECK-NEXT: mtvsrdd v2, r6, r5 309; CHECK-NEXT: blr 310; 311; CHECK-BE-LABEL: testMixedAggregate_02: 312; CHECK-BE: # %bb.0: # %entry 313; CHECK-BE-NEXT: mtvsrdd v2, r5, r6 314; CHECK-BE-NEXT: blr 315; 316; CHECK-P8-LABEL: testMixedAggregate_02: 317; CHECK-P8: # %bb.0: # %entry 318; CHECK-P8-NEXT: addi r3, r1, -16 319; CHECK-P8-NEXT: std r6, -8(r1) 320; CHECK-P8-NEXT: std r5, -16(r1) 321; CHECK-P8-NEXT: lxvd2x vs0, 0, r3 322; CHECK-P8-NEXT: xxswapd v2, vs0 323; CHECK-P8-NEXT: blr 324 325entry: 326 %a.coerce.fca.1.extract = extractvalue [4 x i128] %a.coerce, 1 327 %0 = bitcast i128 %a.coerce.fca.1.extract to fp128 328 ret fp128 %0 329} 330 331; Function Attrs: norecurse nounwind readnone 332define fp128 @testMixedAggregate_03([4 x i128] %sa.coerce) { 333; CHECK-LABEL: testMixedAggregate_03: 334; CHECK: # %bb.0: # %entry 335; CHECK-NEXT: mtvsrwa v2, r3 336; CHECK-NEXT: mtvsrdd v3, r6, r5 337; CHECK-NEXT: xscvsdqp v2, v2 338; CHECK-NEXT: xsaddqp v2, v3, v2 339; CHECK-NEXT: mtvsrd v3, r10 340; CHECK-NEXT: xscvsdqp v3, v3 341; CHECK-NEXT: xsaddqp v2, v2, v3 342; CHECK-NEXT: blr 343; 344; CHECK-BE-LABEL: testMixedAggregate_03: 345; CHECK-BE: # %bb.0: # %entry 346; CHECK-BE-NEXT: mtvsrwa v2, r4 347; CHECK-BE-NEXT: mtvsrdd v3, r5, r6 348; CHECK-BE-NEXT: xscvsdqp v2, v2 349; CHECK-BE-NEXT: xsaddqp v2, v3, v2 350; CHECK-BE-NEXT: mtvsrd v3, r9 351; CHECK-BE-NEXT: xscvsdqp v3, v3 352; CHECK-BE-NEXT: xsaddqp v2, v2, v3 353; CHECK-BE-NEXT: blr 354; 355; CHECK-P8-LABEL: testMixedAggregate_03: 356; CHECK-P8: # %bb.0: # %entry 357; CHECK-P8-NEXT: mflr r0 358; CHECK-P8-NEXT: stdu r1, -96(r1) 359; CHECK-P8-NEXT: std r0, 112(r1) 360; CHECK-P8-NEXT: .cfi_def_cfa_offset 96 361; CHECK-P8-NEXT: .cfi_offset lr, 16 362; CHECK-P8-NEXT: .cfi_offset r30, -16 363; CHECK-P8-NEXT: .cfi_offset v31, -32 364; CHECK-P8-NEXT: li r4, 64 365; CHECK-P8-NEXT: std r30, 80(r1) # 8-byte Folded Spill 366; CHECK-P8-NEXT: extsw r3, r3 367; CHECK-P8-NEXT: mr r30, r10 368; CHECK-P8-NEXT: stvx v31, r1, r4 # 16-byte Folded Spill 369; CHECK-P8-NEXT: addi r4, r1, 48 370; CHECK-P8-NEXT: std r6, 56(r1) 371; CHECK-P8-NEXT: std r5, 48(r1) 372; CHECK-P8-NEXT: lxvd2x vs0, 0, r4 373; CHECK-P8-NEXT: xxswapd v31, vs0 374; CHECK-P8-NEXT: bl __floatsikf 375; CHECK-P8-NEXT: nop 376; CHECK-P8-NEXT: vmr v3, v2 377; CHECK-P8-NEXT: vmr v2, v31 378; CHECK-P8-NEXT: bl __addkf3 379; CHECK-P8-NEXT: nop 380; CHECK-P8-NEXT: mr r3, r30 381; CHECK-P8-NEXT: vmr v31, v2 382; CHECK-P8-NEXT: bl __floatdikf 383; CHECK-P8-NEXT: nop 384; CHECK-P8-NEXT: vmr v3, v2 385; CHECK-P8-NEXT: vmr v2, v31 386; CHECK-P8-NEXT: bl __addkf3 387; CHECK-P8-NEXT: nop 388; CHECK-P8-NEXT: li r3, 64 389; CHECK-P8-NEXT: ld r30, 80(r1) # 8-byte Folded Reload 390; CHECK-P8-NEXT: lvx v31, r1, r3 # 16-byte Folded Reload 391; CHECK-P8-NEXT: addi r1, r1, 96 392; CHECK-P8-NEXT: ld r0, 16(r1) 393; CHECK-P8-NEXT: mtlr r0 394; CHECK-P8-NEXT: blr 395entry: 396 %sa.coerce.fca.0.extract = extractvalue [4 x i128] %sa.coerce, 0 397 %sa.sroa.0.0.extract.trunc = trunc i128 %sa.coerce.fca.0.extract to i32 398 %sa.coerce.fca.1.extract = extractvalue [4 x i128] %sa.coerce, 1 399 %sa.coerce.fca.3.extract = extractvalue [4 x i128] %sa.coerce, 3 400 %sa.sroa.6.48.extract.shift = lshr i128 %sa.coerce.fca.3.extract, 64 401 %sa.sroa.6.48.extract.trunc = trunc i128 %sa.sroa.6.48.extract.shift to i64 402 %conv = sitofp i32 %sa.sroa.0.0.extract.trunc to fp128 403 %0 = bitcast i128 %sa.coerce.fca.1.extract to fp128 404 %add = fadd fp128 %0, %conv 405 %conv2 = sitofp i64 %sa.sroa.6.48.extract.trunc to fp128 406 %add3 = fadd fp128 %add, %conv2 407 ret fp128 %add3 408} 409 410 411; Function Attrs: norecurse nounwind readonly 412define fp128 @testNestedAggregate(ptr byval(%struct.MixedC) nocapture readonly align 16 %a) { 413; CHECK-LABEL: testNestedAggregate: 414; CHECK: # %bb.0: # %entry 415; CHECK-NEXT: std r8, 72(r1) 416; CHECK-NEXT: std r7, 64(r1) 417; CHECK-NEXT: lxv v2, 64(r1) 418; CHECK-NEXT: std r3, 32(r1) 419; CHECK-NEXT: std r4, 40(r1) 420; CHECK-NEXT: std r5, 48(r1) 421; CHECK-NEXT: std r6, 56(r1) 422; CHECK-NEXT: std r9, 80(r1) 423; CHECK-NEXT: std r10, 88(r1) 424; CHECK-NEXT: blr 425; 426; CHECK-BE-LABEL: testNestedAggregate: 427; CHECK-BE: # %bb.0: # %entry 428; CHECK-BE-NEXT: std r8, 88(r1) 429; CHECK-BE-NEXT: std r7, 80(r1) 430; CHECK-BE-NEXT: lxv v2, 80(r1) 431; CHECK-BE-NEXT: std r3, 48(r1) 432; CHECK-BE-NEXT: std r4, 56(r1) 433; CHECK-BE-NEXT: std r5, 64(r1) 434; CHECK-BE-NEXT: std r6, 72(r1) 435; CHECK-BE-NEXT: std r9, 96(r1) 436; CHECK-BE-NEXT: std r10, 104(r1) 437; CHECK-BE-NEXT: blr 438; 439; CHECK-P8-LABEL: testNestedAggregate: 440; CHECK-P8: # %bb.0: # %entry 441; CHECK-P8-NEXT: std r8, 72(r1) 442; CHECK-P8-NEXT: std r7, 64(r1) 443; CHECK-P8-NEXT: li r7, 32 444; CHECK-P8-NEXT: addi r8, r1, 32 445; CHECK-P8-NEXT: std r9, 80(r1) 446; CHECK-P8-NEXT: std r10, 88(r1) 447; CHECK-P8-NEXT: lxvd2x vs0, r8, r7 448; CHECK-P8-NEXT: std r3, 32(r1) 449; CHECK-P8-NEXT: std r4, 40(r1) 450; CHECK-P8-NEXT: std r5, 48(r1) 451; CHECK-P8-NEXT: std r6, 56(r1) 452; CHECK-P8-NEXT: xxswapd v2, vs0 453; CHECK-P8-NEXT: blr 454 455entry: 456 %c = getelementptr inbounds %struct.MixedC, ptr %a, i64 0, i32 1, i32 1 457 %0 = load fp128, ptr %c, align 16 458 ret fp128 %0 459} 460 461; Function Attrs: norecurse nounwind readnone 462define fp128 @testUnion_01([1 x i128] %a.coerce) { 463; CHECK-LABEL: testUnion_01: 464; CHECK: # %bb.0: # %entry 465; CHECK-NEXT: mtvsrdd v2, r4, r3 466; CHECK-NEXT: blr 467; 468; CHECK-BE-LABEL: testUnion_01: 469; CHECK-BE: # %bb.0: # %entry 470; CHECK-BE-NEXT: mtvsrdd v2, r3, r4 471; CHECK-BE-NEXT: blr 472; 473; CHECK-P8-LABEL: testUnion_01: 474; CHECK-P8: # %bb.0: # %entry 475; CHECK-P8-NEXT: std r3, -16(r1) 476; CHECK-P8-NEXT: addi r3, r1, -16 477; CHECK-P8-NEXT: std r4, -8(r1) 478; CHECK-P8-NEXT: lxvd2x vs0, 0, r3 479; CHECK-P8-NEXT: xxswapd v2, vs0 480; CHECK-P8-NEXT: blr 481 482entry: 483 %a.coerce.fca.0.extract = extractvalue [1 x i128] %a.coerce, 0 484 %0 = bitcast i128 %a.coerce.fca.0.extract to fp128 485 ret fp128 %0 486} 487 488; Function Attrs: norecurse nounwind readnone 489define fp128 @testUnion_02([1 x i128] %a.coerce) { 490; CHECK-LABEL: testUnion_02: 491; CHECK: # %bb.0: # %entry 492; CHECK-NEXT: mtvsrdd v2, r4, r3 493; CHECK-NEXT: blr 494; 495; CHECK-BE-LABEL: testUnion_02: 496; CHECK-BE: # %bb.0: # %entry 497; CHECK-BE-NEXT: mtvsrdd v2, r3, r4 498; CHECK-BE-NEXT: blr 499; 500; CHECK-P8-LABEL: testUnion_02: 501; CHECK-P8: # %bb.0: # %entry 502; CHECK-P8-NEXT: std r3, -16(r1) 503; CHECK-P8-NEXT: addi r3, r1, -16 504; CHECK-P8-NEXT: std r4, -8(r1) 505; CHECK-P8-NEXT: lxvd2x vs0, 0, r3 506; CHECK-P8-NEXT: xxswapd v2, vs0 507; CHECK-P8-NEXT: blr 508 509entry: 510 %a.coerce.fca.0.extract = extractvalue [1 x i128] %a.coerce, 0 511 %0 = bitcast i128 %a.coerce.fca.0.extract to fp128 512 ret fp128 %0 513} 514 515; Function Attrs: norecurse nounwind readnone 516define fp128 @testUnion_03([4 x i128] %a.coerce) { 517; CHECK-LABEL: testUnion_03: 518; CHECK: # %bb.0: # %entry 519; CHECK-NEXT: mtvsrdd v2, r8, r7 520; CHECK-NEXT: blr 521; 522; CHECK-BE-LABEL: testUnion_03: 523; CHECK-BE: # %bb.0: # %entry 524; CHECK-BE-NEXT: mtvsrdd v2, r7, r8 525; CHECK-BE-NEXT: blr 526; 527; CHECK-P8-LABEL: testUnion_03: 528; CHECK-P8: # %bb.0: # %entry 529; CHECK-P8-NEXT: addi r3, r1, -16 530; CHECK-P8-NEXT: std r8, -8(r1) 531; CHECK-P8-NEXT: std r7, -16(r1) 532; CHECK-P8-NEXT: lxvd2x vs0, 0, r3 533; CHECK-P8-NEXT: xxswapd v2, vs0 534; CHECK-P8-NEXT: blr 535 536entry: 537 %a.coerce.fca.2.extract = extractvalue [4 x i128] %a.coerce, 2 538 %0 = bitcast i128 %a.coerce.fca.2.extract to fp128 539 ret fp128 %0 540} 541 542; Function Attrs: nounwind 543define fp128 @sum_float128(i32 signext %count, ...) { 544; CHECK-LABEL: sum_float128: 545; CHECK: # %bb.0: # %entry 546; CHECK-NEXT: std r4, 40(r1) 547; CHECK-NEXT: addis r4, r2, .LCPI17_0@toc@ha 548; CHECK-NEXT: cmpwi r3, 0 549; CHECK-NEXT: std r5, 48(r1) 550; CHECK-NEXT: addi r4, r4, .LCPI17_0@toc@l 551; CHECK-NEXT: std r6, 56(r1) 552; CHECK-NEXT: std r7, 64(r1) 553; CHECK-NEXT: std r8, 72(r1) 554; CHECK-NEXT: lxv v2, 0(r4) 555; CHECK-NEXT: std r9, 80(r1) 556; CHECK-NEXT: std r10, 88(r1) 557; CHECK-NEXT: blelr cr0 558; CHECK-NEXT: # %bb.1: # %if.end 559; CHECK-NEXT: addi r3, r1, 40 560; CHECK-NEXT: addi r4, r1, 72 561; CHECK-NEXT: lxvx v3, 0, r3 562; CHECK-NEXT: std r4, -8(r1) 563; CHECK-NEXT: xsaddqp v2, v3, v2 564; CHECK-NEXT: lxv v3, 16(r3) 565; CHECK-NEXT: xsaddqp v2, v2, v3 566; CHECK-NEXT: blr 567; 568; CHECK-BE-LABEL: sum_float128: 569; CHECK-BE: # %bb.0: # %entry 570; CHECK-BE-NEXT: std r4, 56(r1) 571; CHECK-BE-NEXT: addis r4, r2, .LCPI17_0@toc@ha 572; CHECK-BE-NEXT: cmpwi r3, 0 573; CHECK-BE-NEXT: std r5, 64(r1) 574; CHECK-BE-NEXT: addi r4, r4, .LCPI17_0@toc@l 575; CHECK-BE-NEXT: std r6, 72(r1) 576; CHECK-BE-NEXT: std r7, 80(r1) 577; CHECK-BE-NEXT: std r8, 88(r1) 578; CHECK-BE-NEXT: lxv v2, 0(r4) 579; CHECK-BE-NEXT: std r9, 96(r1) 580; CHECK-BE-NEXT: std r10, 104(r1) 581; CHECK-BE-NEXT: blelr cr0 582; CHECK-BE-NEXT: # %bb.1: # %if.end 583; CHECK-BE-NEXT: addi r3, r1, 56 584; CHECK-BE-NEXT: addi r4, r1, 88 585; CHECK-BE-NEXT: lxvx v3, 0, r3 586; CHECK-BE-NEXT: std r4, -8(r1) 587; CHECK-BE-NEXT: xsaddqp v2, v3, v2 588; CHECK-BE-NEXT: lxv v3, 16(r3) 589; CHECK-BE-NEXT: xsaddqp v2, v2, v3 590; CHECK-BE-NEXT: blr 591; 592; CHECK-P8-LABEL: sum_float128: 593; CHECK-P8: # %bb.0: # %entry 594; CHECK-P8-NEXT: mflr r0 595; CHECK-P8-NEXT: .cfi_def_cfa_offset 64 596; CHECK-P8-NEXT: .cfi_offset lr, 16 597; CHECK-P8-NEXT: .cfi_offset r30, -16 598; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill 599; CHECK-P8-NEXT: stdu r1, -64(r1) 600; CHECK-P8-NEXT: std r0, 80(r1) 601; CHECK-P8-NEXT: std r4, 104(r1) 602; CHECK-P8-NEXT: addis r4, r2, .LCPI17_0@toc@ha 603; CHECK-P8-NEXT: cmpwi r3, 0 604; CHECK-P8-NEXT: std r5, 112(r1) 605; CHECK-P8-NEXT: std r6, 120(r1) 606; CHECK-P8-NEXT: addi r4, r4, .LCPI17_0@toc@l 607; CHECK-P8-NEXT: std r7, 128(r1) 608; CHECK-P8-NEXT: std r8, 136(r1) 609; CHECK-P8-NEXT: lxvd2x vs0, 0, r4 610; CHECK-P8-NEXT: std r9, 144(r1) 611; CHECK-P8-NEXT: std r10, 152(r1) 612; CHECK-P8-NEXT: xxswapd v3, vs0 613; CHECK-P8-NEXT: ble cr0, .LBB17_2 614; CHECK-P8-NEXT: # %bb.1: # %if.end 615; CHECK-P8-NEXT: addi r30, r1, 104 616; CHECK-P8-NEXT: lxvd2x vs0, 0, r30 617; CHECK-P8-NEXT: xxswapd v2, vs0 618; CHECK-P8-NEXT: bl __addkf3 619; CHECK-P8-NEXT: nop 620; CHECK-P8-NEXT: li r3, 16 621; CHECK-P8-NEXT: lxvd2x vs0, r30, r3 622; CHECK-P8-NEXT: addi r3, r1, 136 623; CHECK-P8-NEXT: std r3, 40(r1) 624; CHECK-P8-NEXT: xxswapd v3, vs0 625; CHECK-P8-NEXT: bl __addkf3 626; CHECK-P8-NEXT: nop 627; CHECK-P8-NEXT: vmr v3, v2 628; CHECK-P8-NEXT: .LBB17_2: # %cleanup 629; CHECK-P8-NEXT: vmr v2, v3 630; CHECK-P8-NEXT: addi r1, r1, 64 631; CHECK-P8-NEXT: ld r0, 16(r1) 632; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload 633; CHECK-P8-NEXT: mtlr r0 634; CHECK-P8-NEXT: blr 635entry: 636 %ap = alloca ptr, align 8 637 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %ap) #2 638 %cmp = icmp slt i32 %count, 1 639 br i1 %cmp, label %cleanup, label %if.end 640 641if.end: ; preds = %entry 642 call void @llvm.va_start(ptr nonnull %ap) 643 %argp.cur = load ptr, ptr %ap, align 8 644 %argp.next = getelementptr inbounds i8, ptr %argp.cur, i64 16 645 %0 = load fp128, ptr %argp.cur, align 8 646 %add = fadd fp128 %0, 0xL00000000000000000000000000000000 647 %argp.next3 = getelementptr inbounds i8, ptr %argp.cur, i64 32 648 store ptr %argp.next3, ptr %ap, align 8 649 %1 = load fp128, ptr %argp.next, align 8 650 %add4 = fadd fp128 %add, %1 651 call void @llvm.va_end(ptr nonnull %ap) 652 br label %cleanup 653 654cleanup: ; preds = %entry, %if.end 655 %retval.0 = phi fp128 [ %add4, %if.end ], [ 0xL00000000000000000000000000000000, %entry ] 656 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %ap) #2 657 ret fp128 %retval.0 658} 659 660declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1 661declare void @llvm.va_start(ptr) #2 662declare void @llvm.va_end(ptr) #2 663declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1 664