1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefixes=CHECK-LE-P8 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 5; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefixes=CHECK-P9 6; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 7; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefixes=CHECK-BE-P8 8 9define <16 x i8> @test_vpermxorb() local_unnamed_addr { 10; CHECK-LE-P8-LABEL: test_vpermxorb: 11; CHECK-LE-P8: # %bb.0: # %entry 12; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha 13; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI0_0@toc@l 14; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3 15; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI0_1@toc@ha 16; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI0_1@toc@l 17; CHECK-LE-P8-NEXT: xxswapd 34, 0 18; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3 19; CHECK-LE-P8-NEXT: xxswapd 35, 0 20; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2 21; CHECK-LE-P8-NEXT: blr 22; 23; CHECK-P9-LABEL: test_vpermxorb: 24; CHECK-P9: # %bb.0: # %entry 25; CHECK-P9-NEXT: addis 3, 2, .LCPI0_0@toc@ha 26; CHECK-P9-NEXT: addi 3, 3, .LCPI0_0@toc@l 27; CHECK-P9-NEXT: lxv 34, 0(3) 28; CHECK-P9-NEXT: addis 3, 2, .LCPI0_1@toc@ha 29; CHECK-P9-NEXT: addi 3, 3, .LCPI0_1@toc@l 30; CHECK-P9-NEXT: lxv 35, 0(3) 31; CHECK-P9-NEXT: vpermxor 2, 3, 2, 2 32; CHECK-P9-NEXT: blr 33; 34; CHECK-BE-P8-LABEL: test_vpermxorb: 35; CHECK-BE-P8: # %bb.0: # %entry 36; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha 37; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI0_0@toc@l 38; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3 39; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI0_1@toc@ha 40; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI0_1@toc@l 41; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 3 42; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2 43; CHECK-BE-P8-NEXT: blr 44entry: 45 %0 = tail call <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16>, <16 x i8> <i8 113, i8 114, i8 115, i8 116, i8 117, i8 118, i8 119, i8 120, i8 121, i8 122, i8 123, i8 124, i8 125, i8 126, i8 127, i8 112>, <16 x i8> <i8 113, i8 114, i8 115, i8 116, i8 117, i8 118, i8 119, i8 120, i8 121, i8 122, i8 123, i8 124, i8 125, i8 126, i8 127, i8 112>) 46 ret <16 x i8> %0 47} 48 49declare <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8>, <16 x i8>, <16 x i8>) 50 51define <8 x i16> @test_vpermxorh() local_unnamed_addr { 52; CHECK-LE-P8-LABEL: test_vpermxorh: 53; CHECK-LE-P8: # %bb.0: # %entry 54; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI1_0@toc@ha 55; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI1_0@toc@l 56; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3 57; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI1_1@toc@ha 58; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI1_1@toc@l 59; CHECK-LE-P8-NEXT: xxswapd 34, 0 60; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3 61; CHECK-LE-P8-NEXT: xxswapd 35, 0 62; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2 63; CHECK-LE-P8-NEXT: blr 64; 65; CHECK-P9-LABEL: test_vpermxorh: 66; CHECK-P9: # %bb.0: # %entry 67; CHECK-P9-NEXT: addis 3, 2, .LCPI1_0@toc@ha 68; CHECK-P9-NEXT: addi 3, 3, .LCPI1_0@toc@l 69; CHECK-P9-NEXT: lxv 34, 0(3) 70; CHECK-P9-NEXT: addis 3, 2, .LCPI1_1@toc@ha 71; CHECK-P9-NEXT: addi 3, 3, .LCPI1_1@toc@l 72; CHECK-P9-NEXT: lxv 35, 0(3) 73; CHECK-P9-NEXT: vpermxor 2, 3, 2, 2 74; CHECK-P9-NEXT: blr 75; 76; CHECK-BE-P8-LABEL: test_vpermxorh: 77; CHECK-BE-P8: # %bb.0: # %entry 78; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI1_0@toc@ha 79; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI1_0@toc@l 80; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3 81; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI1_1@toc@ha 82; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI1_1@toc@l 83; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 3 84; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2 85; CHECK-BE-P8-NEXT: blr 86entry: 87 %0 = tail call <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8> <i8 2, i8 1, i8 4, i8 3, i8 6, i8 5, i8 8, i8 7, i8 10, i8 9, i8 12, i8 11, i8 14, i8 13, i8 16, i8 15>, <16 x i8> <i8 114, i8 113, i8 116, i8 115, i8 118, i8 117, i8 120, i8 119, i8 122, i8 121, i8 124, i8 123, i8 126, i8 125, i8 112, i8 127>, <16 x i8> <i8 114, i8 113, i8 116, i8 115, i8 118, i8 117, i8 120, i8 119, i8 122, i8 121, i8 124, i8 123, i8 126, i8 125, i8 112, i8 127>) 88 %1 = bitcast <16 x i8> %0 to <8 x i16> 89 ret <8 x i16> %1 90} 91 92define <4 x i32> @test_vpermxorw() local_unnamed_addr { 93; CHECK-LE-P8-LABEL: test_vpermxorw: 94; CHECK-LE-P8: # %bb.0: # %entry 95; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI2_0@toc@ha 96; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI2_0@toc@l 97; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3 98; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI2_1@toc@ha 99; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI2_1@toc@l 100; CHECK-LE-P8-NEXT: xxswapd 34, 0 101; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3 102; CHECK-LE-P8-NEXT: xxswapd 35, 0 103; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2 104; CHECK-LE-P8-NEXT: blr 105; 106; CHECK-P9-LABEL: test_vpermxorw: 107; CHECK-P9: # %bb.0: # %entry 108; CHECK-P9-NEXT: addis 3, 2, .LCPI2_0@toc@ha 109; CHECK-P9-NEXT: addi 3, 3, .LCPI2_0@toc@l 110; CHECK-P9-NEXT: lxv 34, 0(3) 111; CHECK-P9-NEXT: addis 3, 2, .LCPI2_1@toc@ha 112; CHECK-P9-NEXT: addi 3, 3, .LCPI2_1@toc@l 113; CHECK-P9-NEXT: lxv 35, 0(3) 114; CHECK-P9-NEXT: vpermxor 2, 3, 2, 2 115; CHECK-P9-NEXT: blr 116; 117; CHECK-BE-P8-LABEL: test_vpermxorw: 118; CHECK-BE-P8: # %bb.0: # %entry 119; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI2_0@toc@ha 120; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI2_0@toc@l 121; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3 122; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI2_1@toc@ha 123; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI2_1@toc@l 124; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 3 125; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2 126; CHECK-BE-P8-NEXT: blr 127entry: 128 %0 = tail call <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8> <i8 4, i8 3, i8 2, i8 1, i8 8, i8 7, i8 6, i8 5, i8 12, i8 11, i8 10, i8 9, i8 16, i8 15, i8 14, i8 13>, <16 x i8> <i8 116, i8 115, i8 114, i8 113, i8 120, i8 119, i8 118, i8 117, i8 124, i8 123, i8 122, i8 121, i8 112, i8 127, i8 126, i8 125>, <16 x i8> <i8 116, i8 115, i8 114, i8 113, i8 120, i8 119, i8 118, i8 117, i8 124, i8 123, i8 122, i8 121, i8 112, i8 127, i8 126, i8 125>) 129 %1 = bitcast <16 x i8> %0 to <4 x i32> 130 ret <4 x i32> %1 131} 132 133define <2 x i64> @test_vpermxord() local_unnamed_addr { 134; CHECK-LE-P8-LABEL: test_vpermxord: 135; CHECK-LE-P8: # %bb.0: # %entry 136; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha 137; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI3_0@toc@l 138; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3 139; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI3_1@toc@ha 140; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI3_1@toc@l 141; CHECK-LE-P8-NEXT: xxswapd 34, 0 142; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3 143; CHECK-LE-P8-NEXT: xxswapd 35, 0 144; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2 145; CHECK-LE-P8-NEXT: blr 146; 147; CHECK-P9-LABEL: test_vpermxord: 148; CHECK-P9: # %bb.0: # %entry 149; CHECK-P9-NEXT: addis 3, 2, .LCPI3_0@toc@ha 150; CHECK-P9-NEXT: addi 3, 3, .LCPI3_0@toc@l 151; CHECK-P9-NEXT: lxv 34, 0(3) 152; CHECK-P9-NEXT: addis 3, 2, .LCPI3_1@toc@ha 153; CHECK-P9-NEXT: addi 3, 3, .LCPI3_1@toc@l 154; CHECK-P9-NEXT: lxv 35, 0(3) 155; CHECK-P9-NEXT: vpermxor 2, 3, 2, 2 156; CHECK-P9-NEXT: blr 157; 158; CHECK-BE-P8-LABEL: test_vpermxord: 159; CHECK-BE-P8: # %bb.0: # %entry 160; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha 161; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI3_0@toc@l 162; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3 163; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI3_1@toc@ha 164; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI3_1@toc@l 165; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 3 166; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2 167; CHECK-BE-P8-NEXT: blr 168entry: 169 %0 = tail call <16 x i8> @llvm.ppc.altivec.crypto.vpermxor.be(<16 x i8> <i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9>, <16 x i8> <i8 120, i8 119, i8 118, i8 117, i8 116, i8 115, i8 114, i8 113, i8 112, i8 127, i8 126, i8 125, i8 124, i8 123, i8 122, i8 121>, <16 x i8> <i8 120, i8 119, i8 118, i8 117, i8 116, i8 115, i8 114, i8 113, i8 112, i8 127, i8 126, i8 125, i8 124, i8 123, i8 122, i8 121>) 170 %1 = bitcast <16 x i8> %0 to <2 x i64> 171 ret <2 x i64> %1 172} 173 174