1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 4; RUN: FileCheck %s --check-prefix=CHECK-P8 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 6; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 7; RUN: FileCheck %s --check-prefix=CHECK-P9 8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 9; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 10; RUN: FileCheck %s --check-prefix=CHECK-P9-BE 11; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 12; RUN: -mcpu=pwr8 -mattr=-vsx -ppc-asm-full-reg-names \ 13; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-NOVSX 14; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 15; RUN: -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 16; RUN: FileCheck %s --check-prefix=CHECK-P7 17; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr \ 18; RUN: -ppc-asm-full-reg-names -mtriple=powerpc64-ibm-aix-xcoff < %s | \ 19; RUN: FileCheck %s --check-prefixes=P8-AIX,P8-AIX-64 20; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr \ 21; RUN: -ppc-asm-full-reg-names -mtriple=powerpc-ibm-aix-xcoff < %s | \ 22; RUN: FileCheck %s --check-prefixes=P8-AIX,P8-AIX-32 23 24define dso_local <16 x i8> @testmrghb(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 25; CHECK-P8-LABEL: testmrghb: 26; CHECK-P8: # %bb.0: # %entry 27; CHECK-P8-NEXT: vmrghb v2, v3, v2 28; CHECK-P8-NEXT: blr 29; 30; CHECK-P9-LABEL: testmrghb: 31; CHECK-P9: # %bb.0: # %entry 32; CHECK-P9-NEXT: vmrghb v2, v3, v2 33; CHECK-P9-NEXT: blr 34; 35; CHECK-P9-BE-LABEL: testmrghb: 36; CHECK-P9-BE: # %bb.0: # %entry 37; CHECK-P9-BE-NEXT: vmrglb v2, v2, v3 38; CHECK-P9-BE-NEXT: blr 39; 40; CHECK-NOVSX-LABEL: testmrghb: 41; CHECK-NOVSX: # %bb.0: # %entry 42; CHECK-NOVSX-NEXT: vmrghb v2, v3, v2 43; CHECK-NOVSX-NEXT: blr 44; 45; CHECK-P7-LABEL: testmrghb: 46; CHECK-P7: # %bb.0: # %entry 47; CHECK-P7-NEXT: vmrghb v2, v3, v2 48; CHECK-P7-NEXT: blr 49; 50; P8-AIX-LABEL: testmrghb: 51; P8-AIX: # %bb.0: # %entry 52; P8-AIX-NEXT: vmrglb v2, v2, v3 53; P8-AIX-NEXT: blr 54entry: 55 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 56 ret <16 x i8> %shuffle 57} 58define dso_local <16 x i8> @testmrghb2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 59; CHECK-P8-LABEL: testmrghb2: 60; CHECK-P8: # %bb.0: # %entry 61; CHECK-P8-NEXT: vmrghb v2, v2, v3 62; CHECK-P8-NEXT: blr 63; 64; CHECK-P9-LABEL: testmrghb2: 65; CHECK-P9: # %bb.0: # %entry 66; CHECK-P9-NEXT: vmrghb v2, v2, v3 67; CHECK-P9-NEXT: blr 68; 69; CHECK-P9-BE-LABEL: testmrghb2: 70; CHECK-P9-BE: # %bb.0: # %entry 71; CHECK-P9-BE-NEXT: vmrglb v2, v3, v2 72; CHECK-P9-BE-NEXT: blr 73; 74; CHECK-NOVSX-LABEL: testmrghb2: 75; CHECK-NOVSX: # %bb.0: # %entry 76; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI1_0@toc@ha 77; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI1_0@toc@l 78; CHECK-NOVSX-NEXT: lvx v4, 0, r3 79; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 80; CHECK-NOVSX-NEXT: blr 81; 82; CHECK-P7-LABEL: testmrghb2: 83; CHECK-P7: # %bb.0: # %entry 84; CHECK-P7-NEXT: addis r3, r2, .LCPI1_0@toc@ha 85; CHECK-P7-NEXT: addi r3, r3, .LCPI1_0@toc@l 86; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 87; CHECK-P7-NEXT: xxswapd v4, vs0 88; CHECK-P7-NEXT: vperm v2, v3, v2, v4 89; CHECK-P7-NEXT: blr 90; 91; P8-AIX-LABEL: testmrghb2: 92; P8-AIX: # %bb.0: # %entry 93; P8-AIX-NEXT: vmrglb v2, v3, v2 94; P8-AIX-NEXT: blr 95entry: 96 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 8, i32 25, i32 9, i32 26, i32 10, i32 27, i32 11, i32 28, i32 12, i32 29, i32 13, i32 30, i32 14, i32 31, i32 15> 97 ret <16 x i8> %shuffle 98} 99define dso_local <16 x i8> @testmrghh(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 100; CHECK-P8-LABEL: testmrghh: 101; CHECK-P8: # %bb.0: # %entry 102; CHECK-P8-NEXT: vmrghh v2, v3, v2 103; CHECK-P8-NEXT: blr 104; 105; CHECK-P9-LABEL: testmrghh: 106; CHECK-P9: # %bb.0: # %entry 107; CHECK-P9-NEXT: vmrghh v2, v3, v2 108; CHECK-P9-NEXT: blr 109; 110; CHECK-P9-BE-LABEL: testmrghh: 111; CHECK-P9-BE: # %bb.0: # %entry 112; CHECK-P9-BE-NEXT: vmrglh v2, v2, v3 113; CHECK-P9-BE-NEXT: blr 114; 115; CHECK-NOVSX-LABEL: testmrghh: 116; CHECK-NOVSX: # %bb.0: # %entry 117; CHECK-NOVSX-NEXT: vmrghh v2, v3, v2 118; CHECK-NOVSX-NEXT: blr 119; 120; CHECK-P7-LABEL: testmrghh: 121; CHECK-P7: # %bb.0: # %entry 122; CHECK-P7-NEXT: vmrghh v2, v3, v2 123; CHECK-P7-NEXT: blr 124; 125; P8-AIX-LABEL: testmrghh: 126; P8-AIX: # %bb.0: # %entry 127; P8-AIX-NEXT: vmrglh v2, v2, v3 128; P8-AIX-NEXT: blr 129entry: 130 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 9, i32 24, i32 25, i32 10, i32 11, i32 26, i32 27, i32 12, i32 13, i32 28, i32 29, i32 14, i32 15, i32 30, i32 31> 131 ret <16 x i8> %shuffle 132} 133define dso_local <16 x i8> @testmrghh2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 134; CHECK-P8-LABEL: testmrghh2: 135; CHECK-P8: # %bb.0: # %entry 136; CHECK-P8-NEXT: vmrghh v2, v2, v3 137; CHECK-P8-NEXT: blr 138; 139; CHECK-P9-LABEL: testmrghh2: 140; CHECK-P9: # %bb.0: # %entry 141; CHECK-P9-NEXT: vmrghh v2, v2, v3 142; CHECK-P9-NEXT: blr 143; 144; CHECK-P9-BE-LABEL: testmrghh2: 145; CHECK-P9-BE: # %bb.0: # %entry 146; CHECK-P9-BE-NEXT: vmrglh v2, v3, v2 147; CHECK-P9-BE-NEXT: blr 148; 149; CHECK-NOVSX-LABEL: testmrghh2: 150; CHECK-NOVSX: # %bb.0: # %entry 151; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI3_0@toc@ha 152; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI3_0@toc@l 153; CHECK-NOVSX-NEXT: lvx v4, 0, r3 154; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 155; CHECK-NOVSX-NEXT: blr 156; 157; CHECK-P7-LABEL: testmrghh2: 158; CHECK-P7: # %bb.0: # %entry 159; CHECK-P7-NEXT: addis r3, r2, .LCPI3_0@toc@ha 160; CHECK-P7-NEXT: addi r3, r3, .LCPI3_0@toc@l 161; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 162; CHECK-P7-NEXT: xxswapd v4, vs0 163; CHECK-P7-NEXT: vperm v2, v3, v2, v4 164; CHECK-P7-NEXT: blr 165; 166; P8-AIX-LABEL: testmrghh2: 167; P8-AIX: # %bb.0: # %entry 168; P8-AIX-NEXT: vmrglh v2, v3, v2 169; P8-AIX-NEXT: blr 170entry: 171 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 25, i32 8, i32 9, i32 26, i32 27, i32 10, i32 11, i32 28, i32 29, i32 12, i32 13, i32 30, i32 31, i32 14, i32 15> 172 ret <16 x i8> %shuffle 173} 174define dso_local <16 x i8> @testmrglb(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 175; CHECK-P8-LABEL: testmrglb: 176; CHECK-P8: # %bb.0: # %entry 177; CHECK-P8-NEXT: vmrglb v2, v3, v2 178; CHECK-P8-NEXT: blr 179; 180; CHECK-P9-LABEL: testmrglb: 181; CHECK-P9: # %bb.0: # %entry 182; CHECK-P9-NEXT: vmrglb v2, v3, v2 183; CHECK-P9-NEXT: blr 184; 185; CHECK-P9-BE-LABEL: testmrglb: 186; CHECK-P9-BE: # %bb.0: # %entry 187; CHECK-P9-BE-NEXT: vmrghb v2, v2, v3 188; CHECK-P9-BE-NEXT: blr 189; 190; CHECK-NOVSX-LABEL: testmrglb: 191; CHECK-NOVSX: # %bb.0: # %entry 192; CHECK-NOVSX-NEXT: vmrglb v2, v3, v2 193; CHECK-NOVSX-NEXT: blr 194; 195; CHECK-P7-LABEL: testmrglb: 196; CHECK-P7: # %bb.0: # %entry 197; CHECK-P7-NEXT: vmrglb v2, v3, v2 198; CHECK-P7-NEXT: blr 199; 200; P8-AIX-LABEL: testmrglb: 201; P8-AIX: # %bb.0: # %entry 202; P8-AIX-NEXT: vmrghb v2, v2, v3 203; P8-AIX-NEXT: blr 204entry: 205 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 206 ret <16 x i8> %shuffle 207} 208define dso_local <16 x i8> @testmrglb2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 209; CHECK-P8-LABEL: testmrglb2: 210; CHECK-P8: # %bb.0: # %entry 211; CHECK-P8-NEXT: vmrglb v2, v2, v3 212; CHECK-P8-NEXT: blr 213; 214; CHECK-P9-LABEL: testmrglb2: 215; CHECK-P9: # %bb.0: # %entry 216; CHECK-P9-NEXT: vmrglb v2, v2, v3 217; CHECK-P9-NEXT: blr 218; 219; CHECK-P9-BE-LABEL: testmrglb2: 220; CHECK-P9-BE: # %bb.0: # %entry 221; CHECK-P9-BE-NEXT: vmrghb v2, v3, v2 222; CHECK-P9-BE-NEXT: blr 223; 224; CHECK-NOVSX-LABEL: testmrglb2: 225; CHECK-NOVSX: # %bb.0: # %entry 226; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI5_0@toc@ha 227; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI5_0@toc@l 228; CHECK-NOVSX-NEXT: lvx v4, 0, r3 229; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 230; CHECK-NOVSX-NEXT: blr 231; 232; CHECK-P7-LABEL: testmrglb2: 233; CHECK-P7: # %bb.0: # %entry 234; CHECK-P7-NEXT: addis r3, r2, .LCPI5_0@toc@ha 235; CHECK-P7-NEXT: addi r3, r3, .LCPI5_0@toc@l 236; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 237; CHECK-P7-NEXT: xxswapd v4, vs0 238; CHECK-P7-NEXT: vperm v2, v3, v2, v4 239; CHECK-P7-NEXT: blr 240; 241; P8-AIX-LABEL: testmrglb2: 242; P8-AIX: # %bb.0: # %entry 243; P8-AIX-NEXT: vmrghb v2, v3, v2 244; P8-AIX-NEXT: blr 245entry: 246 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 0, i32 17, i32 1, i32 18, i32 2, i32 19, i32 3, i32 20, i32 4, i32 21, i32 5, i32 22, i32 6, i32 23, i32 7> 247 ret <16 x i8> %shuffle 248} 249define dso_local <16 x i8> @testmrglh(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 250; CHECK-P8-LABEL: testmrglh: 251; CHECK-P8: # %bb.0: # %entry 252; CHECK-P8-NEXT: vmrglh v2, v3, v2 253; CHECK-P8-NEXT: blr 254; 255; CHECK-P9-LABEL: testmrglh: 256; CHECK-P9: # %bb.0: # %entry 257; CHECK-P9-NEXT: vmrglh v2, v3, v2 258; CHECK-P9-NEXT: blr 259; 260; CHECK-P9-BE-LABEL: testmrglh: 261; CHECK-P9-BE: # %bb.0: # %entry 262; CHECK-P9-BE-NEXT: vmrghh v2, v2, v3 263; CHECK-P9-BE-NEXT: blr 264; 265; CHECK-NOVSX-LABEL: testmrglh: 266; CHECK-NOVSX: # %bb.0: # %entry 267; CHECK-NOVSX-NEXT: vmrglh v2, v3, v2 268; CHECK-NOVSX-NEXT: blr 269; 270; CHECK-P7-LABEL: testmrglh: 271; CHECK-P7: # %bb.0: # %entry 272; CHECK-P7-NEXT: vmrglh v2, v3, v2 273; CHECK-P7-NEXT: blr 274; 275; P8-AIX-LABEL: testmrglh: 276; P8-AIX: # %bb.0: # %entry 277; P8-AIX-NEXT: vmrghh v2, v2, v3 278; P8-AIX-NEXT: blr 279entry: 280 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 2, i32 3, i32 18, i32 19, i32 4, i32 5, i32 20, i32 21, i32 6, i32 7, i32 22, i32 23> 281 ret <16 x i8> %shuffle 282} 283define dso_local <16 x i8> @testmrglh2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 284; CHECK-P8-LABEL: testmrglh2: 285; CHECK-P8: # %bb.0: # %entry 286; CHECK-P8-NEXT: vmrglh v2, v2, v3 287; CHECK-P8-NEXT: blr 288; 289; CHECK-P9-LABEL: testmrglh2: 290; CHECK-P9: # %bb.0: # %entry 291; CHECK-P9-NEXT: vmrglh v2, v2, v3 292; CHECK-P9-NEXT: blr 293; 294; CHECK-P9-BE-LABEL: testmrglh2: 295; CHECK-P9-BE: # %bb.0: # %entry 296; CHECK-P9-BE-NEXT: vmrghh v2, v3, v2 297; CHECK-P9-BE-NEXT: blr 298; 299; CHECK-NOVSX-LABEL: testmrglh2: 300; CHECK-NOVSX: # %bb.0: # %entry 301; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI7_0@toc@ha 302; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI7_0@toc@l 303; CHECK-NOVSX-NEXT: lvx v4, 0, r3 304; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 305; CHECK-NOVSX-NEXT: blr 306; 307; CHECK-P7-LABEL: testmrglh2: 308; CHECK-P7: # %bb.0: # %entry 309; CHECK-P7-NEXT: addis r3, r2, .LCPI7_0@toc@ha 310; CHECK-P7-NEXT: addi r3, r3, .LCPI7_0@toc@l 311; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 312; CHECK-P7-NEXT: xxswapd v4, vs0 313; CHECK-P7-NEXT: vperm v2, v3, v2, v4 314; CHECK-P7-NEXT: blr 315; 316; P8-AIX-LABEL: testmrglh2: 317; P8-AIX: # %bb.0: # %entry 318; P8-AIX-NEXT: vmrghh v2, v3, v2 319; P8-AIX-NEXT: blr 320entry: 321 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 17, i32 0, i32 1, i32 18, i32 19, i32 2, i32 3, i32 20, i32 21, i32 4, i32 5, i32 22, i32 23, i32 6, i32 7> 322 ret <16 x i8> %shuffle 323} 324define dso_local <16 x i8> @testmrghw(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 325; CHECK-P8-LABEL: testmrghw: 326; CHECK-P8: # %bb.0: # %entry 327; CHECK-P8-NEXT: xxmrghw v2, v3, v2 328; CHECK-P8-NEXT: blr 329; 330; CHECK-P9-LABEL: testmrghw: 331; CHECK-P9: # %bb.0: # %entry 332; CHECK-P9-NEXT: xxmrghw v2, v3, v2 333; CHECK-P9-NEXT: blr 334; 335; CHECK-P9-BE-LABEL: testmrghw: 336; CHECK-P9-BE: # %bb.0: # %entry 337; CHECK-P9-BE-NEXT: xxmrglw v2, v2, v3 338; CHECK-P9-BE-NEXT: blr 339; 340; CHECK-NOVSX-LABEL: testmrghw: 341; CHECK-NOVSX: # %bb.0: # %entry 342; CHECK-NOVSX-NEXT: vmrghw v2, v3, v2 343; CHECK-NOVSX-NEXT: blr 344; 345; CHECK-P7-LABEL: testmrghw: 346; CHECK-P7: # %bb.0: # %entry 347; CHECK-P7-NEXT: xxmrghw v2, v3, v2 348; CHECK-P7-NEXT: blr 349; 350; P8-AIX-LABEL: testmrghw: 351; P8-AIX: # %bb.0: # %entry 352; P8-AIX-NEXT: xxmrglw v2, v2, v3 353; P8-AIX-NEXT: blr 354entry: 355 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31> 356 ret <16 x i8> %shuffle 357} 358define dso_local <16 x i8> @testmrghw2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 359; CHECK-P8-LABEL: testmrghw2: 360; CHECK-P8: # %bb.0: # %entry 361; CHECK-P8-NEXT: xxmrghw v2, v2, v3 362; CHECK-P8-NEXT: blr 363; 364; CHECK-P9-LABEL: testmrghw2: 365; CHECK-P9: # %bb.0: # %entry 366; CHECK-P9-NEXT: xxmrghw v2, v2, v3 367; CHECK-P9-NEXT: blr 368; 369; CHECK-P9-BE-LABEL: testmrghw2: 370; CHECK-P9-BE: # %bb.0: # %entry 371; CHECK-P9-BE-NEXT: xxmrglw v2, v3, v2 372; CHECK-P9-BE-NEXT: blr 373; 374; CHECK-NOVSX-LABEL: testmrghw2: 375; CHECK-NOVSX: # %bb.0: # %entry 376; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI9_0@toc@ha 377; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI9_0@toc@l 378; CHECK-NOVSX-NEXT: lvx v4, 0, r3 379; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 380; CHECK-NOVSX-NEXT: blr 381; 382; CHECK-P7-LABEL: testmrghw2: 383; CHECK-P7: # %bb.0: # %entry 384; CHECK-P7-NEXT: addis r3, r2, .LCPI9_0@toc@ha 385; CHECK-P7-NEXT: addi r3, r3, .LCPI9_0@toc@l 386; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 387; CHECK-P7-NEXT: xxswapd v4, vs0 388; CHECK-P7-NEXT: vperm v2, v3, v2, v4 389; CHECK-P7-NEXT: blr 390; 391; P8-AIX-LABEL: testmrghw2: 392; P8-AIX: # %bb.0: # %entry 393; P8-AIX-NEXT: xxmrglw v2, v3, v2 394; P8-AIX-NEXT: blr 395entry: 396 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 25, i32 26, i32 27, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31, i32 12, i32 13, i32 14, i32 15> 397 ret <16 x i8> %shuffle 398} 399define dso_local <16 x i8> @testmrglw(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 400; CHECK-P8-LABEL: testmrglw: 401; CHECK-P8: # %bb.0: # %entry 402; CHECK-P8-NEXT: xxmrglw v2, v3, v2 403; CHECK-P8-NEXT: blr 404; 405; CHECK-P9-LABEL: testmrglw: 406; CHECK-P9: # %bb.0: # %entry 407; CHECK-P9-NEXT: xxmrglw v2, v3, v2 408; CHECK-P9-NEXT: blr 409; 410; CHECK-P9-BE-LABEL: testmrglw: 411; CHECK-P9-BE: # %bb.0: # %entry 412; CHECK-P9-BE-NEXT: xxmrghw v2, v2, v3 413; CHECK-P9-BE-NEXT: blr 414; 415; CHECK-NOVSX-LABEL: testmrglw: 416; CHECK-NOVSX: # %bb.0: # %entry 417; CHECK-NOVSX-NEXT: vmrglw v2, v3, v2 418; CHECK-NOVSX-NEXT: blr 419; 420; CHECK-P7-LABEL: testmrglw: 421; CHECK-P7: # %bb.0: # %entry 422; CHECK-P7-NEXT: xxmrglw v2, v3, v2 423; CHECK-P7-NEXT: blr 424; 425; P8-AIX-LABEL: testmrglw: 426; P8-AIX: # %bb.0: # %entry 427; P8-AIX-NEXT: xxmrghw v2, v2, v3 428; P8-AIX-NEXT: blr 429entry: 430 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23> 431 ret <16 x i8> %shuffle 432} 433define dso_local <16 x i8> @testmrglw2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 434; CHECK-P8-LABEL: testmrglw2: 435; CHECK-P8: # %bb.0: # %entry 436; CHECK-P8-NEXT: xxmrglw v2, v2, v3 437; CHECK-P8-NEXT: blr 438; 439; CHECK-P9-LABEL: testmrglw2: 440; CHECK-P9: # %bb.0: # %entry 441; CHECK-P9-NEXT: xxmrglw v2, v2, v3 442; CHECK-P9-NEXT: blr 443; 444; CHECK-P9-BE-LABEL: testmrglw2: 445; CHECK-P9-BE: # %bb.0: # %entry 446; CHECK-P9-BE-NEXT: xxmrghw v2, v3, v2 447; CHECK-P9-BE-NEXT: blr 448; 449; CHECK-NOVSX-LABEL: testmrglw2: 450; CHECK-NOVSX: # %bb.0: # %entry 451; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI11_0@toc@ha 452; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI11_0@toc@l 453; CHECK-NOVSX-NEXT: lvx v4, 0, r3 454; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4 455; CHECK-NOVSX-NEXT: blr 456; 457; CHECK-P7-LABEL: testmrglw2: 458; CHECK-P7: # %bb.0: # %entry 459; CHECK-P7-NEXT: addis r3, r2, .LCPI11_0@toc@ha 460; CHECK-P7-NEXT: addi r3, r3, .LCPI11_0@toc@l 461; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 462; CHECK-P7-NEXT: xxswapd v4, vs0 463; CHECK-P7-NEXT: vperm v2, v3, v2, v4 464; CHECK-P7-NEXT: blr 465; 466; P8-AIX-LABEL: testmrglw2: 467; P8-AIX: # %bb.0: # %entry 468; P8-AIX-NEXT: xxmrghw v2, v3, v2 469; P8-AIX-NEXT: blr 470entry: 471 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 4, i32 5, i32 6, i32 7> 472 ret <16 x i8> %shuffle 473} 474 475define dso_local <8 x i16> @testmrglb3(ptr nocapture readonly %a) local_unnamed_addr #0 { 476; CHECK-P8-LABEL: testmrglb3: 477; CHECK-P8: # %bb.0: # %entry 478; CHECK-P8-NEXT: lxsdx v2, 0, r3 479; CHECK-P8-NEXT: xxlxor v3, v3, v3 480; CHECK-P8-NEXT: vmrghb v2, v3, v2 481; CHECK-P8-NEXT: blr 482; 483; CHECK-P9-LABEL: testmrglb3: 484; CHECK-P9: # %bb.0: # %entry 485; CHECK-P9-NEXT: lxsd v2, 0(r3) 486; CHECK-P9-NEXT: xxlxor v3, v3, v3 487; CHECK-P9-NEXT: vmrghb v2, v3, v2 488; CHECK-P9-NEXT: blr 489; 490; CHECK-P9-BE-LABEL: testmrglb3: 491; CHECK-P9-BE: # %bb.0: # %entry 492; CHECK-P9-BE-NEXT: lxsd v2, 0(r3) 493; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI12_0@toc@ha 494; CHECK-P9-BE-NEXT: xxlxor vs1, vs1, vs1 495; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI12_0@toc@l 496; CHECK-P9-BE-NEXT: lxv vs0, 0(r3) 497; CHECK-P9-BE-NEXT: xxperm v2, vs1, vs0 498; CHECK-P9-BE-NEXT: blr 499; 500; CHECK-NOVSX-LABEL: testmrglb3: 501; CHECK-NOVSX: # %bb.0: # %entry 502; CHECK-NOVSX-NEXT: ld r3, 0(r3) 503; CHECK-NOVSX-NEXT: vxor v4, v4, v4 504; CHECK-NOVSX-NEXT: std r3, -16(r1) 505; CHECK-NOVSX-NEXT: addi r3, r1, -16 506; CHECK-NOVSX-NEXT: lvx v2, 0, r3 507; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI12_0@toc@ha 508; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI12_0@toc@l 509; CHECK-NOVSX-NEXT: lvx v3, 0, r3 510; CHECK-NOVSX-NEXT: vperm v2, v2, v4, v3 511; CHECK-NOVSX-NEXT: blr 512; 513; CHECK-P7-LABEL: testmrglb3: 514; CHECK-P7: # %bb.0: # %entry 515; CHECK-P7-NEXT: ld r3, 0(r3) 516; CHECK-P7-NEXT: xxlxor v4, v4, v4 517; CHECK-P7-NEXT: std r3, -16(r1) 518; CHECK-P7-NEXT: addi r3, r1, -16 519; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 520; CHECK-P7-NEXT: addis r3, r2, .LCPI12_0@toc@ha 521; CHECK-P7-NEXT: addi r3, r3, .LCPI12_0@toc@l 522; CHECK-P7-NEXT: xxswapd v2, vs0 523; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 524; CHECK-P7-NEXT: xxswapd v3, vs0 525; CHECK-P7-NEXT: vperm v2, v2, v4, v3 526; CHECK-P7-NEXT: blr 527; 528; P8-AIX-64-LABEL: testmrglb3: 529; P8-AIX-64: # %bb.0: # %entry 530; P8-AIX-64-NEXT: lxsdx v2, 0, r3 531; P8-AIX-64-NEXT: ld r3, L..C0(r2) # %const.0 532; P8-AIX-64-NEXT: xxlxor v4, v4, v4 533; P8-AIX-64-NEXT: lxvw4x v3, 0, r3 534; P8-AIX-64-NEXT: vperm v2, v4, v2, v3 535; P8-AIX-64-NEXT: blr 536; 537; P8-AIX-32-LABEL: testmrglb3: 538; P8-AIX-32: # %bb.0: # %entry 539; P8-AIX-32-NEXT: li r4, 4 540; P8-AIX-32-NEXT: lfiwzx f1, 0, r3 541; P8-AIX-32-NEXT: xxlxor v3, v3, v3 542; P8-AIX-32-NEXT: lfiwzx f0, r3, r4 543; P8-AIX-32-NEXT: xxspltw vs1, vs1, 1 544; P8-AIX-32-NEXT: xxspltw vs0, vs0, 1 545; P8-AIX-32-NEXT: xxmrghw v2, vs1, vs0 546; P8-AIX-32-NEXT: vmrghb v2, v3, v2 547; P8-AIX-32-NEXT: blr 548entry: 549 %0 = load <8 x i8>, ptr %a, align 8 550 %1 = zext <8 x i8> %0 to <8 x i16> 551 ret <8 x i16> %1 552} 553 554define dso_local void @no_crash_elt0_from_RHS(ptr noalias nocapture dereferenceable(16) %.vtx6) #0 { 555; CHECK-P8-LABEL: no_crash_elt0_from_RHS: 556; CHECK-P8: # %bb.0: # %test_entry 557; CHECK-P8-NEXT: mflr r0 558; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill 559; CHECK-P8-NEXT: stdu r1, -48(r1) 560; CHECK-P8-NEXT: std r0, 64(r1) 561; CHECK-P8-NEXT: mr r30, r3 562; CHECK-P8-NEXT: bl dummy 563; CHECK-P8-NEXT: nop 564; CHECK-P8-NEXT: xxlxor f0, f0, f0 565; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0 566; CHECK-P8-NEXT: xxswapd vs0, vs0 567; CHECK-P8-NEXT: stxvd2x vs0, 0, r30 568; 569; CHECK-P9-LABEL: no_crash_elt0_from_RHS: 570; CHECK-P9: # %bb.0: # %test_entry 571; CHECK-P9-NEXT: mflr r0 572; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill 573; CHECK-P9-NEXT: stdu r1, -48(r1) 574; CHECK-P9-NEXT: std r0, 64(r1) 575; CHECK-P9-NEXT: mr r30, r3 576; CHECK-P9-NEXT: bl dummy 577; CHECK-P9-NEXT: nop 578; CHECK-P9-NEXT: xxlxor f0, f0, f0 579; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0 580; CHECK-P9-NEXT: stxv vs0, 0(r30) 581; 582; CHECK-P9-BE-LABEL: no_crash_elt0_from_RHS: 583; CHECK-P9-BE: # %bb.0: # %test_entry 584; CHECK-P9-BE-NEXT: mflr r0 585; CHECK-P9-BE-NEXT: stdu r1, -128(r1) 586; CHECK-P9-BE-NEXT: std r0, 144(r1) 587; CHECK-P9-BE-NEXT: std r30, 112(r1) # 8-byte Folded Spill 588; CHECK-P9-BE-NEXT: mr r30, r3 589; CHECK-P9-BE-NEXT: bl dummy 590; CHECK-P9-BE-NEXT: nop 591; CHECK-P9-BE-NEXT: xxlxor f0, f0, f0 592; CHECK-P9-BE-NEXT: xxmrghd vs0, vs0, vs1 593; CHECK-P9-BE-NEXT: stxv vs0, 0(r30) 594; 595; CHECK-NOVSX-LABEL: no_crash_elt0_from_RHS: 596; CHECK-NOVSX: # %bb.0: # %test_entry 597; CHECK-NOVSX-NEXT: mflr r0 598; CHECK-NOVSX-NEXT: std r30, -16(r1) # 8-byte Folded Spill 599; CHECK-NOVSX-NEXT: stdu r1, -48(r1) 600; CHECK-NOVSX-NEXT: std r0, 64(r1) 601; CHECK-NOVSX-NEXT: mr r30, r3 602; CHECK-NOVSX-NEXT: bl dummy 603; CHECK-NOVSX-NEXT: nop 604; CHECK-NOVSX-NEXT: li r3, 0 605; CHECK-NOVSX-NEXT: stfd f1, 8(r30) 606; CHECK-NOVSX-NEXT: std r3, 0(r30) 607; 608; CHECK-P7-LABEL: no_crash_elt0_from_RHS: 609; CHECK-P7: # %bb.0: # %test_entry 610; CHECK-P7-NEXT: mflr r0 611; CHECK-P7-NEXT: std r30, -16(r1) # 8-byte Folded Spill 612; CHECK-P7-NEXT: stdu r1, -48(r1) 613; CHECK-P7-NEXT: std r0, 64(r1) 614; CHECK-P7-NEXT: mr r30, r3 615; CHECK-P7-NEXT: bl dummy 616; CHECK-P7-NEXT: nop 617; CHECK-P7-NEXT: xxlxor f0, f0, f0 618; CHECK-P7-NEXT: xxmrghd vs0, vs1, vs0 619; CHECK-P7-NEXT: xxswapd vs0, vs0 620; CHECK-P7-NEXT: stxvd2x vs0, 0, r30 621; 622; P8-AIX-64-LABEL: no_crash_elt0_from_RHS: 623; P8-AIX-64: # %bb.0: # %test_entry 624; P8-AIX-64-NEXT: mflr r0 625; P8-AIX-64-NEXT: stdu r1, -128(r1) 626; P8-AIX-64-NEXT: std r0, 144(r1) 627; P8-AIX-64-NEXT: std r31, 120(r1) # 8-byte Folded Spill 628; P8-AIX-64-NEXT: mr r31, r3 629; P8-AIX-64-NEXT: bl .dummy[PR] 630; P8-AIX-64-NEXT: nop 631; P8-AIX-64-NEXT: xxlxor f0, f0, f0 632; P8-AIX-64-NEXT: xxmrghd vs0, vs0, vs1 633; P8-AIX-64-NEXT: stxvd2x vs0, 0, r31 634; 635; P8-AIX-32-LABEL: no_crash_elt0_from_RHS: 636; P8-AIX-32: # %bb.0: # %test_entry 637; P8-AIX-32-NEXT: mflr r0 638; P8-AIX-32-NEXT: stwu r1, -64(r1) 639; P8-AIX-32-NEXT: stw r0, 72(r1) 640; P8-AIX-32-NEXT: stw r31, 60(r1) # 4-byte Folded Spill 641; P8-AIX-32-NEXT: mr r31, r3 642; P8-AIX-32-NEXT: bl .dummy[PR] 643; P8-AIX-32-NEXT: nop 644; P8-AIX-32-NEXT: xxlxor f0, f0, f0 645; P8-AIX-32-NEXT: xxmrghd vs0, vs0, vs1 646; P8-AIX-32-NEXT: stxvd2x vs0, 0, r31 647test_entry: 648 %_div_result = tail call double @dummy() 649 %oldret = insertvalue { double, double } undef, double %_div_result, 0 650 %0 = extractvalue { double, double } %oldret, 0 651 %.splatinsert = insertelement <2 x double> undef, double %0, i32 0 652 %.splat = shufflevector <2 x double> %.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer 653 %1 = shufflevector <2 x double> zeroinitializer, <2 x double> %.splat, <2 x i32> <i32 0, i32 3> 654 store <2 x double> %1, ptr %.vtx6, align 16 655 unreachable 656} 657 658define dso_local <16 x i8> @no_crash_bitcast(i32 %a) { 659; CHECK-P8-LABEL: no_crash_bitcast: 660; CHECK-P8: # %bb.0: # %entry 661; CHECK-P8-NEXT: mtvsrwz v2, r3 662; CHECK-P8-NEXT: blr 663; 664; CHECK-P9-LABEL: no_crash_bitcast: 665; CHECK-P9: # %bb.0: # %entry 666; CHECK-P9-NEXT: mtvsrwz v2, r3 667; CHECK-P9-NEXT: blr 668; 669; CHECK-P9-BE-LABEL: no_crash_bitcast: 670; CHECK-P9-BE: # %bb.0: # %entry 671; CHECK-P9-BE-NEXT: mtfprwz f0, r3 672; CHECK-P9-BE-NEXT: xxmrghw v2, vs0, vs0 673; CHECK-P9-BE-NEXT: blr 674; 675; CHECK-NOVSX-LABEL: no_crash_bitcast: 676; CHECK-NOVSX: # %bb.0: # %entry 677; CHECK-NOVSX-NEXT: stw r3, -16(r1) 678; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI14_0@toc@ha 679; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI14_0@toc@l 680; CHECK-NOVSX-NEXT: lvx v2, 0, r3 681; CHECK-NOVSX-NEXT: addi r3, r1, -16 682; CHECK-NOVSX-NEXT: lvx v3, 0, r3 683; CHECK-NOVSX-NEXT: vperm v2, v3, v3, v2 684; CHECK-NOVSX-NEXT: blr 685; 686; CHECK-P7-LABEL: no_crash_bitcast: 687; CHECK-P7: # %bb.0: # %entry 688; CHECK-P7-NEXT: stw r3, -16(r1) 689; CHECK-P7-NEXT: addis r3, r2, .LCPI14_0@toc@ha 690; CHECK-P7-NEXT: addi r3, r3, .LCPI14_0@toc@l 691; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 692; CHECK-P7-NEXT: addi r3, r1, -16 693; CHECK-P7-NEXT: xxswapd v2, vs0 694; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 695; CHECK-P7-NEXT: xxswapd v3, vs0 696; CHECK-P7-NEXT: vperm v2, v3, v3, v2 697; CHECK-P7-NEXT: blr 698; 699; P8-AIX-64-LABEL: no_crash_bitcast: 700; P8-AIX-64: # %bb.0: # %entry 701; P8-AIX-64-NEXT: mtfprwz f0, r3 702; P8-AIX-64-NEXT: xxmrghw v2, vs0, vs0 703; P8-AIX-64-NEXT: blr 704; 705; P8-AIX-32-LABEL: no_crash_bitcast: 706; P8-AIX-32: # %bb.0: # %entry 707; P8-AIX-32-NEXT: stw r3, -16(r1) 708; P8-AIX-32-NEXT: lwz r3, L..C0(r2) # %const.0 709; P8-AIX-32-NEXT: lxvw4x v2, 0, r3 710; P8-AIX-32-NEXT: addi r3, r1, -16 711; P8-AIX-32-NEXT: lxvw4x v3, 0, r3 712; P8-AIX-32-NEXT: vperm v2, v3, v3, v2 713; P8-AIX-32-NEXT: blr 714entry: 715 %cast = bitcast i32 %a to <4 x i8> 716 %ret = shufflevector <4 x i8> %cast, <4 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> 717 ret <16 x i8> %ret 718} 719 720define dso_local <4 x i32> @replace_undefs_in_splat(<4 x i32> %a) local_unnamed_addr #0 { 721; CHECK-P8-LABEL: replace_undefs_in_splat: 722; CHECK-P8: # %bb.0: # %entry 723; CHECK-P8-NEXT: addis r3, r2, .LCPI15_0@toc@ha 724; CHECK-P8-NEXT: addi r3, r3, .LCPI15_0@toc@l 725; CHECK-P8-NEXT: lxvd2x v3, 0, r3 726; CHECK-P8-NEXT: vmrgow v2, v3, v2 727; CHECK-P8-NEXT: blr 728; 729; CHECK-P9-LABEL: replace_undefs_in_splat: 730; CHECK-P9: # %bb.0: # %entry 731; CHECK-P9-NEXT: addis r3, r2, .LCPI15_0@toc@ha 732; CHECK-P9-NEXT: addi r3, r3, .LCPI15_0@toc@l 733; CHECK-P9-NEXT: lxv v3, 0(r3) 734; CHECK-P9-NEXT: vmrgow v2, v3, v2 735; CHECK-P9-NEXT: blr 736; 737; CHECK-P9-BE-LABEL: replace_undefs_in_splat: 738; CHECK-P9-BE: # %bb.0: # %entry 739; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_0@toc@ha 740; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_0@toc@l 741; CHECK-P9-BE-NEXT: lxv vs1, 0(r3) 742; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_1@toc@ha 743; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_1@toc@l 744; CHECK-P9-BE-NEXT: lxv vs0, 0(r3) 745; CHECK-P9-BE-NEXT: xxperm vs0, v2, vs1 746; CHECK-P9-BE-NEXT: xxlor v2, vs0, vs0 747; CHECK-P9-BE-NEXT: blr 748; 749; CHECK-NOVSX-LABEL: replace_undefs_in_splat: 750; CHECK-NOVSX: # %bb.0: # %entry 751; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI15_0@toc@ha 752; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI15_0@toc@l 753; CHECK-NOVSX-NEXT: lvx v3, 0, r3 754; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI15_1@toc@ha 755; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI15_1@toc@l 756; CHECK-NOVSX-NEXT: lvx v4, 0, r3 757; CHECK-NOVSX-NEXT: vperm v2, v4, v2, v3 758; CHECK-NOVSX-NEXT: blr 759; 760; CHECK-P7-LABEL: replace_undefs_in_splat: 761; CHECK-P7: # %bb.0: # %entry 762; CHECK-P7-NEXT: addis r3, r2, .LCPI15_0@toc@ha 763; CHECK-P7-NEXT: addi r3, r3, .LCPI15_0@toc@l 764; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 765; CHECK-P7-NEXT: addis r3, r2, .LCPI15_1@toc@ha 766; CHECK-P7-NEXT: addi r3, r3, .LCPI15_1@toc@l 767; CHECK-P7-NEXT: xxswapd v3, vs0 768; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 769; CHECK-P7-NEXT: xxswapd v4, vs0 770; CHECK-P7-NEXT: vperm v2, v4, v2, v3 771; CHECK-P7-NEXT: blr 772; 773; P8-AIX-64-LABEL: replace_undefs_in_splat: 774; P8-AIX-64: # %bb.0: # %entry 775; P8-AIX-64-NEXT: ld r3, L..C1(r2) # %const.0 776; P8-AIX-64-NEXT: lxvw4x v3, 0, r3 777; P8-AIX-64-NEXT: ld r3, L..C2(r2) # %const.1 778; P8-AIX-64-NEXT: lxvw4x v4, 0, r3 779; P8-AIX-64-NEXT: vperm v2, v2, v4, v3 780; P8-AIX-64-NEXT: blr 781; 782; P8-AIX-32-LABEL: replace_undefs_in_splat: 783; P8-AIX-32: # %bb.0: # %entry 784; P8-AIX-32-NEXT: lwz r3, L..C1(r2) # %const.0 785; P8-AIX-32-NEXT: lxvw4x v3, 0, r3 786; P8-AIX-32-NEXT: lwz r3, L..C2(r2) # %const.1 787; P8-AIX-32-NEXT: lxvw4x v4, 0, r3 788; P8-AIX-32-NEXT: vperm v2, v2, v4, v3 789; P8-AIX-32-NEXT: blr 790entry: 791 %vecins1 = shufflevector <4 x i32> %a, <4 x i32> <i32 undef, i32 566, i32 undef, i32 566>, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 792 ret <4 x i32> %vecins1 793} 794 795define dso_local <16 x i8> @no_RAUW_in_combine_during_legalize(ptr nocapture readonly %ptr, i32 signext %offset) local_unnamed_addr #0 { 796; CHECK-P8-LABEL: no_RAUW_in_combine_during_legalize: 797; CHECK-P8: # %bb.0: # %entry 798; CHECK-P8-NEXT: sldi r4, r4, 2 799; CHECK-P8-NEXT: xxlxor v3, v3, v3 800; CHECK-P8-NEXT: lfiwzx f0, r3, r4 801; CHECK-P8-NEXT: xxspltd v2, f0, 0 802; CHECK-P8-NEXT: vmrglb v2, v3, v2 803; CHECK-P8-NEXT: blr 804; 805; CHECK-P9-LABEL: no_RAUW_in_combine_during_legalize: 806; CHECK-P9: # %bb.0: # %entry 807; CHECK-P9-NEXT: sldi r4, r4, 2 808; CHECK-P9-NEXT: xxlxor v3, v3, v3 809; CHECK-P9-NEXT: lfiwzx f0, r3, r4 810; CHECK-P9-NEXT: xxspltd v2, f0, 0 811; CHECK-P9-NEXT: vmrglb v2, v3, v2 812; CHECK-P9-NEXT: blr 813; 814; CHECK-P9-BE-LABEL: no_RAUW_in_combine_during_legalize: 815; CHECK-P9-BE: # %bb.0: # %entry 816; CHECK-P9-BE-NEXT: sldi r4, r4, 2 817; CHECK-P9-BE-NEXT: xxlxor v3, v3, v3 818; CHECK-P9-BE-NEXT: lxsiwzx v2, r3, r4 819; CHECK-P9-BE-NEXT: vmrghb v2, v2, v3 820; CHECK-P9-BE-NEXT: blr 821; 822; CHECK-NOVSX-LABEL: no_RAUW_in_combine_during_legalize: 823; CHECK-NOVSX: # %bb.0: # %entry 824; CHECK-NOVSX-NEXT: sldi r4, r4, 2 825; CHECK-NOVSX-NEXT: vxor v3, v3, v3 826; CHECK-NOVSX-NEXT: lwzx r3, r3, r4 827; CHECK-NOVSX-NEXT: std r3, -16(r1) 828; CHECK-NOVSX-NEXT: addi r3, r1, -16 829; CHECK-NOVSX-NEXT: lvx v2, 0, r3 830; CHECK-NOVSX-NEXT: vmrglb v2, v3, v2 831; CHECK-NOVSX-NEXT: blr 832; 833; CHECK-P7-LABEL: no_RAUW_in_combine_during_legalize: 834; CHECK-P7: # %bb.0: # %entry 835; CHECK-P7-NEXT: sldi r4, r4, 2 836; CHECK-P7-NEXT: xxlxor v3, v3, v3 837; CHECK-P7-NEXT: lfiwzx f0, r3, r4 838; CHECK-P7-NEXT: xxspltd v2, f0, 0 839; CHECK-P7-NEXT: vmrglb v2, v3, v2 840; CHECK-P7-NEXT: blr 841; 842; P8-AIX-64-LABEL: no_RAUW_in_combine_during_legalize: 843; P8-AIX-64: # %bb.0: # %entry 844; P8-AIX-64-NEXT: sldi r4, r4, 2 845; P8-AIX-64-NEXT: xxlxor v3, v3, v3 846; P8-AIX-64-NEXT: lxsiwzx v2, r3, r4 847; P8-AIX-64-NEXT: vmrghb v2, v2, v3 848; P8-AIX-64-NEXT: blr 849; 850; P8-AIX-32-LABEL: no_RAUW_in_combine_during_legalize: 851; P8-AIX-32: # %bb.0: # %entry 852; P8-AIX-32-NEXT: slwi r4, r4, 2 853; P8-AIX-32-NEXT: xxlxor v2, v2, v2 854; P8-AIX-32-NEXT: lfiwzx f0, r3, r4 855; P8-AIX-32-NEXT: xxspltw vs0, vs0, 1 856; P8-AIX-32-NEXT: xxmrghw v3, v2, vs0 857; P8-AIX-32-NEXT: vmrghb v2, v3, v2 858; P8-AIX-32-NEXT: blr 859entry: 860 %idx.ext = sext i32 %offset to i64 861 %add.ptr = getelementptr inbounds i32, ptr %ptr, i64 %idx.ext 862 %0 = load i32, ptr %add.ptr, align 4 863 %conv = zext i32 %0 to i64 864 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0 865 %1 = bitcast <2 x i64> %splat.splatinsert to <16 x i8> 866 %shuffle = shufflevector <16 x i8> %1, <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 867 ret <16 x i8> %shuffle 868} 869 870define dso_local <4 x i32> @testSplat4Low(ptr nocapture readonly %ptr) local_unnamed_addr #0 { 871; CHECK-P8-LABEL: testSplat4Low: 872; CHECK-P8: # %bb.0: # %entry 873; CHECK-P8-NEXT: lfdx f0, 0, r3 874; CHECK-P8-NEXT: xxspltw v2, vs0, 0 875; CHECK-P8-NEXT: blr 876; 877; CHECK-P9-LABEL: testSplat4Low: 878; CHECK-P9: # %bb.0: # %entry 879; CHECK-P9-NEXT: addi r3, r3, 4 880; CHECK-P9-NEXT: lxvwsx v2, 0, r3 881; CHECK-P9-NEXT: blr 882; 883; CHECK-P9-BE-LABEL: testSplat4Low: 884; CHECK-P9-BE: # %bb.0: # %entry 885; CHECK-P9-BE-NEXT: addi r3, r3, 4 886; CHECK-P9-BE-NEXT: lxvwsx v2, 0, r3 887; CHECK-P9-BE-NEXT: blr 888; 889; CHECK-NOVSX-LABEL: testSplat4Low: 890; CHECK-NOVSX: # %bb.0: # %entry 891; CHECK-NOVSX-NEXT: ld r3, 0(r3) 892; CHECK-NOVSX-NEXT: std r3, -16(r1) 893; CHECK-NOVSX-NEXT: addi r3, r1, -16 894; CHECK-NOVSX-NEXT: lvx v2, 0, r3 895; CHECK-NOVSX-NEXT: vspltw v2, v2, 2 896; CHECK-NOVSX-NEXT: blr 897; 898; CHECK-P7-LABEL: testSplat4Low: 899; CHECK-P7: # %bb.0: # %entry 900; CHECK-P7-NEXT: ld r3, 0(r3) 901; CHECK-P7-NEXT: std r3, -16(r1) 902; CHECK-P7-NEXT: addi r3, r1, -16 903; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 904; CHECK-P7-NEXT: xxswapd v2, vs0 905; CHECK-P7-NEXT: xxspltw v2, v2, 2 906; CHECK-P7-NEXT: blr 907; 908; P8-AIX-64-LABEL: testSplat4Low: 909; P8-AIX-64: # %bb.0: # %entry 910; P8-AIX-64-NEXT: lfdx f0, 0, r3 911; P8-AIX-64-NEXT: xxspltw v2, vs0, 1 912; P8-AIX-64-NEXT: blr 913; 914; P8-AIX-32-LABEL: testSplat4Low: 915; P8-AIX-32: # %bb.0: # %entry 916; P8-AIX-32-NEXT: addi r3, r3, 4 917; P8-AIX-32-NEXT: lfiwzx f0, 0, r3 918; P8-AIX-32-NEXT: xxspltw v2, vs0, 1 919; P8-AIX-32-NEXT: blr 920entry: 921 %0 = load <8 x i8>, ptr %ptr, align 8 922 %vecinit18 = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 923 %1 = bitcast <16 x i8> %vecinit18 to <4 x i32> 924 ret <4 x i32> %1 925} 926 927; Function Attrs: norecurse nounwind readonly 928define dso_local <4 x i32> @testSplat4hi(ptr nocapture readonly %ptr) local_unnamed_addr #0 { 929; CHECK-P8-LABEL: testSplat4hi: 930; CHECK-P8: # %bb.0: # %entry 931; CHECK-P8-NEXT: lfdx f0, 0, r3 932; CHECK-P8-NEXT: xxspltw v2, vs0, 1 933; CHECK-P8-NEXT: blr 934; 935; CHECK-P9-LABEL: testSplat4hi: 936; CHECK-P9: # %bb.0: # %entry 937; CHECK-P9-NEXT: lxvwsx v2, 0, r3 938; CHECK-P9-NEXT: blr 939; 940; CHECK-P9-BE-LABEL: testSplat4hi: 941; CHECK-P9-BE: # %bb.0: # %entry 942; CHECK-P9-BE-NEXT: lxvwsx v2, 0, r3 943; CHECK-P9-BE-NEXT: blr 944; 945; CHECK-NOVSX-LABEL: testSplat4hi: 946; CHECK-NOVSX: # %bb.0: # %entry 947; CHECK-NOVSX-NEXT: ld r3, 0(r3) 948; CHECK-NOVSX-NEXT: std r3, -16(r1) 949; CHECK-NOVSX-NEXT: addi r3, r1, -16 950; CHECK-NOVSX-NEXT: lvx v2, 0, r3 951; CHECK-NOVSX-NEXT: vspltw v2, v2, 3 952; CHECK-NOVSX-NEXT: blr 953; 954; CHECK-P7-LABEL: testSplat4hi: 955; CHECK-P7: # %bb.0: # %entry 956; CHECK-P7-NEXT: ld r3, 0(r3) 957; CHECK-P7-NEXT: std r3, -16(r1) 958; CHECK-P7-NEXT: addi r3, r1, -16 959; CHECK-P7-NEXT: lxvd2x vs0, 0, r3 960; CHECK-P7-NEXT: xxswapd v2, vs0 961; CHECK-P7-NEXT: xxspltw v2, v2, 3 962; CHECK-P7-NEXT: blr 963; 964; P8-AIX-64-LABEL: testSplat4hi: 965; P8-AIX-64: # %bb.0: # %entry 966; P8-AIX-64-NEXT: lfdx f0, 0, r3 967; P8-AIX-64-NEXT: xxspltw v2, vs0, 0 968; P8-AIX-64-NEXT: blr 969; 970; P8-AIX-32-LABEL: testSplat4hi: 971; P8-AIX-32: # %bb.0: # %entry 972; P8-AIX-32-NEXT: lfiwzx f0, 0, r3 973; P8-AIX-32-NEXT: xxspltw v2, vs0, 1 974; P8-AIX-32-NEXT: blr 975entry: 976 %0 = load <8 x i8>, ptr %ptr, align 8 977 %vecinit22 = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 978 %1 = bitcast <16 x i8> %vecinit22 to <4 x i32> 979 ret <4 x i32> %1 980} 981 982; Function Attrs: norecurse nounwind readonly 983define dso_local <2 x i64> @testSplat8(ptr nocapture readonly %ptr) local_unnamed_addr #0 { 984; CHECK-P8-LABEL: testSplat8: 985; CHECK-P8: # %bb.0: # %entry 986; CHECK-P8-NEXT: lxvdsx v2, 0, r3 987; CHECK-P8-NEXT: blr 988; 989; CHECK-P9-LABEL: testSplat8: 990; CHECK-P9: # %bb.0: # %entry 991; CHECK-P9-NEXT: lxvdsx v2, 0, r3 992; CHECK-P9-NEXT: blr 993; 994; CHECK-P9-BE-LABEL: testSplat8: 995; CHECK-P9-BE: # %bb.0: # %entry 996; CHECK-P9-BE-NEXT: lxvdsx v2, 0, r3 997; CHECK-P9-BE-NEXT: blr 998; 999; CHECK-NOVSX-LABEL: testSplat8: 1000; CHECK-NOVSX: # %bb.0: # %entry 1001; CHECK-NOVSX-NEXT: ld r3, 0(r3) 1002; CHECK-NOVSX-NEXT: std r3, -8(r1) 1003; CHECK-NOVSX-NEXT: std r3, -16(r1) 1004; CHECK-NOVSX-NEXT: addi r3, r1, -16 1005; CHECK-NOVSX-NEXT: lvx v2, 0, r3 1006; CHECK-NOVSX-NEXT: blr 1007; 1008; CHECK-P7-LABEL: testSplat8: 1009; CHECK-P7: # %bb.0: # %entry 1010; CHECK-P7-NEXT: lxvdsx v2, 0, r3 1011; CHECK-P7-NEXT: blr 1012; 1013; P8-AIX-64-LABEL: testSplat8: 1014; P8-AIX-64: # %bb.0: # %entry 1015; P8-AIX-64-NEXT: lxvdsx v2, 0, r3 1016; P8-AIX-64-NEXT: blr 1017; 1018; P8-AIX-32-LABEL: testSplat8: 1019; P8-AIX-32: # %bb.0: # %entry 1020; P8-AIX-32-NEXT: li r4, 4 1021; P8-AIX-32-NEXT: lfiwzx f1, 0, r3 1022; P8-AIX-32-NEXT: lfiwzx f0, r3, r4 1023; P8-AIX-32-NEXT: xxspltw vs1, vs1, 1 1024; P8-AIX-32-NEXT: xxspltw vs0, vs0, 1 1025; P8-AIX-32-NEXT: xxmrghw vs0, vs1, vs0 1026; P8-AIX-32-NEXT: xxmrghd v2, vs0, vs0 1027; P8-AIX-32-NEXT: blr 1028entry: 1029 %0 = load <8 x i8>, ptr %ptr, align 8 1030 %vecinit30 = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1031 %1 = bitcast <16 x i8> %vecinit30 to <2 x i64> 1032 ret <2 x i64> %1 1033} 1034 1035define <2 x i64> @testSplati64_0(ptr nocapture readonly %ptr) #0 { 1036; CHECK-P8-LABEL: testSplati64_0: 1037; CHECK-P8: # %bb.0: # %entry 1038; CHECK-P8-NEXT: lxvdsx v2, 0, r3 1039; CHECK-P8-NEXT: blr 1040; 1041; CHECK-P9-LABEL: testSplati64_0: 1042; CHECK-P9: # %bb.0: # %entry 1043; CHECK-P9-NEXT: lxvdsx v2, 0, r3 1044; CHECK-P9-NEXT: blr 1045; 1046; CHECK-P9-BE-LABEL: testSplati64_0: 1047; CHECK-P9-BE: # %bb.0: # %entry 1048; CHECK-P9-BE-NEXT: lxvdsx v2, 0, r3 1049; CHECK-P9-BE-NEXT: blr 1050; 1051; CHECK-NOVSX-LABEL: testSplati64_0: 1052; CHECK-NOVSX: # %bb.0: # %entry 1053; CHECK-NOVSX-NEXT: ld r3, 0(r3) 1054; CHECK-NOVSX-NEXT: std r3, -8(r1) 1055; CHECK-NOVSX-NEXT: std r3, -16(r1) 1056; CHECK-NOVSX-NEXT: addi r3, r1, -16 1057; CHECK-NOVSX-NEXT: lvx v2, 0, r3 1058; CHECK-NOVSX-NEXT: blr 1059; 1060; CHECK-P7-LABEL: testSplati64_0: 1061; CHECK-P7: # %bb.0: # %entry 1062; CHECK-P7-NEXT: lxvdsx v2, 0, r3 1063; CHECK-P7-NEXT: blr 1064; 1065; P8-AIX-64-LABEL: testSplati64_0: 1066; P8-AIX-64: # %bb.0: # %entry 1067; P8-AIX-64-NEXT: lxvdsx v2, 0, r3 1068; P8-AIX-64-NEXT: blr 1069; 1070; P8-AIX-32-LABEL: testSplati64_0: 1071; P8-AIX-32: # %bb.0: # %entry 1072; P8-AIX-32-NEXT: li r4, 4 1073; P8-AIX-32-NEXT: lfiwzx f0, r3, r4 1074; P8-AIX-32-NEXT: xxspltw v2, vs0, 1 1075; P8-AIX-32-NEXT: lfiwzx f0, 0, r3 1076; P8-AIX-32-NEXT: lwz r3, L..C3(r2) # %const.0 1077; P8-AIX-32-NEXT: lxvw4x v4, 0, r3 1078; P8-AIX-32-NEXT: xxspltw v3, vs0, 1 1079; P8-AIX-32-NEXT: vperm v2, v3, v2, v4 1080; P8-AIX-32-NEXT: blr 1081entry: 1082 %0 = load <1 x i64>, ptr %ptr, align 8 1083 %1 = shufflevector <1 x i64> %0, <1 x i64> undef, <2 x i32> <i32 0, i32 0> 1084 ret <2 x i64> %1 1085} 1086 1087define <2 x i64> @testSplati64_1(ptr nocapture readonly %ptr) #0 { 1088; CHECK-P8-LABEL: testSplati64_1: 1089; CHECK-P8: # %bb.0: # %entry 1090; CHECK-P8-NEXT: addi r3, r3, 8 1091; CHECK-P8-NEXT: lxvdsx v2, 0, r3 1092; CHECK-P8-NEXT: blr 1093; 1094; CHECK-P9-LABEL: testSplati64_1: 1095; CHECK-P9: # %bb.0: # %entry 1096; CHECK-P9-NEXT: addi r3, r3, 8 1097; CHECK-P9-NEXT: lxvdsx v2, 0, r3 1098; CHECK-P9-NEXT: blr 1099; 1100; CHECK-P9-BE-LABEL: testSplati64_1: 1101; CHECK-P9-BE: # %bb.0: # %entry 1102; CHECK-P9-BE-NEXT: addi r3, r3, 8 1103; CHECK-P9-BE-NEXT: lxvdsx v2, 0, r3 1104; CHECK-P9-BE-NEXT: blr 1105; 1106; CHECK-NOVSX-LABEL: testSplati64_1: 1107; CHECK-NOVSX: # %bb.0: # %entry 1108; CHECK-NOVSX-NEXT: ld r4, 8(r3) 1109; CHECK-NOVSX-NEXT: std r4, -8(r1) 1110; CHECK-NOVSX-NEXT: ld r3, 0(r3) 1111; CHECK-NOVSX-NEXT: std r3, -16(r1) 1112; CHECK-NOVSX-NEXT: addi r3, r1, -16 1113; CHECK-NOVSX-NEXT: lvx v2, 0, r3 1114; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI21_0@toc@ha 1115; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI21_0@toc@l 1116; CHECK-NOVSX-NEXT: lvx v3, 0, r3 1117; CHECK-NOVSX-NEXT: vperm v2, v2, v2, v3 1118; CHECK-NOVSX-NEXT: blr 1119; 1120; CHECK-P7-LABEL: testSplati64_1: 1121; CHECK-P7: # %bb.0: # %entry 1122; CHECK-P7-NEXT: addi r3, r3, 8 1123; CHECK-P7-NEXT: lxvdsx v2, 0, r3 1124; CHECK-P7-NEXT: blr 1125; 1126; P8-AIX-LABEL: testSplati64_1: 1127; P8-AIX: # %bb.0: # %entry 1128; P8-AIX-NEXT: addi r3, r3, 8 1129; P8-AIX-NEXT: lxvdsx v2, 0, r3 1130; P8-AIX-NEXT: blr 1131entry: 1132 %0 = load <2 x i64>, ptr %ptr, align 8 1133 %1 = shufflevector <2 x i64> %0, <2 x i64> undef, <2 x i32> <i32 1, i32 1> 1134 ret <2 x i64> %1 1135} 1136 1137define dso_local void @testByteSplat() #0 { 1138; CHECK-P8-LABEL: testByteSplat: 1139; CHECK-P8: # %bb.0: # %entry 1140; CHECK-P8-NEXT: lbzx r3, 0, r3 1141; CHECK-P8-NEXT: mtvsrwz v2, r3 1142; CHECK-P8-NEXT: vspltb v2, v2, 7 1143; CHECK-P8-NEXT: xxswapd vs0, v2 1144; CHECK-P8-NEXT: stxvd2x vs0, 0, r3 1145; CHECK-P8-NEXT: blr 1146; 1147; CHECK-P9-LABEL: testByteSplat: 1148; CHECK-P9: # %bb.0: # %entry 1149; CHECK-P9-NEXT: lxsibzx v2, 0, r3 1150; CHECK-P9-NEXT: vspltb v2, v2, 7 1151; CHECK-P9-NEXT: stxv v2, 0(r3) 1152; CHECK-P9-NEXT: blr 1153; 1154; CHECK-P9-BE-LABEL: testByteSplat: 1155; CHECK-P9-BE: # %bb.0: # %entry 1156; CHECK-P9-BE-NEXT: lxsibzx v2, 0, r3 1157; CHECK-P9-BE-NEXT: vspltb v2, v2, 7 1158; CHECK-P9-BE-NEXT: stxv v2, 0(r3) 1159; CHECK-P9-BE-NEXT: blr 1160; 1161; CHECK-NOVSX-LABEL: testByteSplat: 1162; CHECK-NOVSX: # %bb.0: # %entry 1163; CHECK-NOVSX-NEXT: lbz r3, 0(r3) 1164; CHECK-NOVSX-NEXT: stb r3, -16(r1) 1165; CHECK-NOVSX-NEXT: addi r3, r1, -16 1166; CHECK-NOVSX-NEXT: lvx v2, 0, r3 1167; CHECK-NOVSX-NEXT: vspltb v2, v2, 15 1168; CHECK-NOVSX-NEXT: stvx v2, 0, r3 1169; CHECK-NOVSX-NEXT: blr 1170; 1171; CHECK-P7-LABEL: testByteSplat: 1172; CHECK-P7: # %bb.0: # %entry 1173; CHECK-P7-NEXT: lvsr v2, 0, r3 1174; CHECK-P7-NEXT: lvx v3, 0, r3 1175; CHECK-P7-NEXT: vperm v2, v3, v3, v2 1176; CHECK-P7-NEXT: vspltb v2, v2, 15 1177; CHECK-P7-NEXT: stxvd2x v2, 0, r3 1178; CHECK-P7-NEXT: blr 1179; 1180; P8-AIX-LABEL: testByteSplat: 1181; P8-AIX: # %bb.0: # %entry 1182; P8-AIX-NEXT: lbzx r3, 0, r3 1183; P8-AIX-NEXT: mtvsrwz v2, r3 1184; P8-AIX-NEXT: vspltb v2, v2, 7 1185; P8-AIX-NEXT: stxvw4x v2, 0, r3 1186; P8-AIX-NEXT: blr 1187entry: 1188 %0 = load i8, ptr undef, align 1 1189 %splat.splatinsert.i = insertelement <16 x i8> poison, i8 %0, i32 0 1190 %splat.splat.i = shufflevector <16 x i8> %splat.splatinsert.i, <16 x i8> poison, <16 x i32> zeroinitializer 1191 store <16 x i8> %splat.splat.i, ptr undef, align 16 1192 ret void 1193} 1194 1195declare double @dummy() local_unnamed_addr 1196attributes #0 = { nounwind } 1197