xref: /llvm-project/llvm/test/CodeGen/PowerPC/byval-lhs.ll (revision 4f0ed16a46c509a7b8ef09f3c9ae6434d0cf5622)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -ppc-asm-full-reg-names -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   %s -o - -verify-machineinstrs | FileCheck %s --check-prefix=LE
4; RUN: llc -ppc-asm-full-reg-names -mtriple=powerpc64-ibm-aix-xcoff \
5; RUN:   %s -o - -verify-machineinstrs | FileCheck %s --check-prefix=AIX
6
7%struct.type8 = type { i32, i32 }
8%struct.type16 = type { i32, i32, i32, i32 }
9
10declare ptr @f0(ptr noundef byval(%struct.type8) align 8)
11declare ptr @f1(ptr noundef byval(%struct.type16) align 8)
12
13define void @bar1(i64 %a) nounwind {
14; LE-LABEL: bar1:
15; LE:       # %bb.0:
16; LE-NEXT:    mflr r0
17; LE-NEXT:    stdu r1, -48(r1)
18; LE-NEXT:    std r0, 64(r1)
19; LE-NEXT:    std r3, 40(r1)
20; LE-NEXT:    bl f0
21; LE-NEXT:    nop
22; LE-NEXT:    addi r1, r1, 48
23; LE-NEXT:    ld r0, 16(r1)
24; LE-NEXT:    mtlr r0
25; LE-NEXT:    blr
26;
27; AIX-LABEL: bar1:
28; AIX:       # %bb.0:
29; AIX-NEXT:    mflr r0
30; AIX-NEXT:    stdu r1, -128(r1)
31; AIX-NEXT:    std r0, 144(r1)
32; AIX-NEXT:    std r3, 120(r1)
33; AIX-NEXT:    bl .f0[PR]
34; AIX-NEXT:    nop
35; AIX-NEXT:    addi r1, r1, 128
36; AIX-NEXT:    ld r0, 16(r1)
37; AIX-NEXT:    mtlr r0
38; AIX-NEXT:    blr
39  %s = alloca %struct.type8, align 8
40  store i64 %a, ptr %s, align 8
41  %call = tail call ptr @f0(ptr noundef nonnull byval(%struct.type8) align 8 %s)
42  ret void
43}
44
45define void @bar2(i64 %a) nounwind {
46; LE-LABEL: bar2:
47; LE:       # %bb.0:
48; LE-NEXT:    mflr r0
49; LE-NEXT:    stdu r1, -48(r1)
50; LE-NEXT:    mr r4, r3
51; LE-NEXT:    std r0, 64(r1)
52; LE-NEXT:    std r3, 32(r1)
53; LE-NEXT:    std r3, 40(r1)
54; LE-NEXT:    bl f1
55; LE-NEXT:    nop
56; LE-NEXT:    addi r1, r1, 48
57; LE-NEXT:    ld r0, 16(r1)
58; LE-NEXT:    mtlr r0
59; LE-NEXT:    blr
60;
61; AIX-LABEL: bar2:
62; AIX:       # %bb.0:
63; AIX-NEXT:    mflr r0
64; AIX-NEXT:    stdu r1, -128(r1)
65; AIX-NEXT:    mr r4, r3
66; AIX-NEXT:    std r0, 144(r1)
67; AIX-NEXT:    std r3, 112(r1)
68; AIX-NEXT:    std r3, 120(r1)
69; AIX-NEXT:    bl .f1[PR]
70; AIX-NEXT:    nop
71; AIX-NEXT:    addi r1, r1, 128
72; AIX-NEXT:    ld r0, 16(r1)
73; AIX-NEXT:    mtlr r0
74; AIX-NEXT:    blr
75  %s = alloca %struct.type16, align 8
76  %index1 = getelementptr inbounds i64, ptr %s, i32 0
77  store i64 %a, ptr %index1, align 8
78  %index2 = getelementptr inbounds i64, ptr %s, i32 1
79  store i64 %a, ptr %index2, align 8
80  %call = tail call ptr @f1(ptr noundef nonnull byval(%struct.type16) align 8 %s)
81  ret void
82}
83
84