xref: /llvm-project/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll (revision 18fe0a0d9eb1f38e57cbf8d3fde2241e682a8eb6)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   --ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
5; RUN:   --ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s
6; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
7; RUN:   --ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
9; RUN:   --ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s
10
11; tw
12declare void @llvm.ppc.tw(i32 %a, i32 %b, i32 %c)
13define dso_local void @test__twlgt(i32 %a, i32 %b) {
14; CHECK-LABEL: test__twlgt:
15; CHECK:       # %bb.0:
16; CHECK-NEXT:    twlgt r3, r4
17; CHECK-NEXT:    blr
18  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 1)
19  ret void
20}
21
22define dso_local void @test__twllt(i32 %a, i32 %b) {
23; CHECK-LABEL: test__twllt:
24; CHECK:       # %bb.0:
25; CHECK-NEXT:    twllt r3, r4
26; CHECK-NEXT:    blr
27  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 2)
28  ret void
29}
30
31define dso_local void @test__tw3(i32 %a, i32 %b) {
32; CHECK-LABEL: test__tw3:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    tw 3, r3, r4
35; CHECK-NEXT:    blr
36  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 3)
37  ret void
38}
39
40define dso_local void @test__tweq(i32 %a, i32 %b) {
41; CHECK-LABEL: test__tweq:
42; CHECK:       # %bb.0:
43; CHECK-NEXT:    tweq r3, r4
44; CHECK-NEXT:    blr
45  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 4)
46  ret void
47}
48
49define dso_local void @test__twlge(i32 %a, i32 %b) {
50; CHECK-LABEL: test__twlge:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    tw 5, r3, r4
53; CHECK-NEXT:    blr
54  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 5)
55  ret void
56}
57
58define dso_local void @test__twlle(i32 %a, i32 %b) {
59; CHECK-LABEL: test__twlle:
60; CHECK:       # %bb.0:
61; CHECK-NEXT:    tw 6, r3, r4
62; CHECK-NEXT:    blr
63  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 6)
64  ret void
65}
66
67define dso_local void @test__twgt(i32 %a, i32 %b) {
68; CHECK-LABEL: test__twgt:
69; CHECK:       # %bb.0:
70; CHECK-NEXT:    twgt r3, r4
71; CHECK-NEXT:    blr
72  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 8)
73  ret void
74}
75
76define dso_local void @test__twge(i32 %a, i32 %b) {
77; CHECK-LABEL: test__twge:
78; CHECK:       # %bb.0:
79; CHECK-NEXT:    tw 12, r3, r4
80; CHECK-NEXT:    blr
81  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 12)
82  ret void
83}
84
85define dso_local void @test__twlt(i32 %a, i32 %b) {
86; CHECK-LABEL: test__twlt:
87; CHECK:       # %bb.0:
88; CHECK-NEXT:    twlt r3, r4
89; CHECK-NEXT:    blr
90  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 16)
91  ret void
92}
93
94define dso_local void @test__twle(i32 %a, i32 %b) {
95; CHECK-LABEL: test__twle:
96; CHECK:       # %bb.0:
97; CHECK-NEXT:    tw 20, r3, r4
98; CHECK-NEXT:    blr
99  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 20)
100  ret void
101}
102
103define dso_local void @test__twne24(i32 %a, i32 %b) {
104; CHECK-LABEL: test__twne24:
105; CHECK:       # %bb.0:
106; CHECK-NEXT:    twne r3, r4
107; CHECK-NEXT:    blr
108  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 24)
109  ret void
110}
111
112define dso_local void @test__twu(i32 %a, i32 %b) {
113; CHECK-LABEL: test__twu:
114; CHECK:       # %bb.0:
115; CHECK-NEXT:    twu r3, r4
116; CHECK-NEXT:    blr
117  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 31)
118  ret void
119}
120
121define dso_local void @test__tw_no_match(i32 %a, i32 %b) {
122; CHECK-LABEL: test__tw_no_match:
123; CHECK:       # %bb.0:
124; CHECK-NEXT:    tw 13, r3, r4
125; CHECK-NEXT:    blr
126  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 13)
127  ret void
128}
129
130; tw -> twi
131define dso_local void @test__twi_boundary_reg_imm(i32 %a) {
132; CHECK-LABEL: test__twi_boundary_reg_imm:
133; CHECK:       # %bb.0:
134; CHECK-NEXT:    twi 3, r3, 32767
135; CHECK-NEXT:    blr
136  call void @llvm.ppc.tw(i32 %a, i32 32767, i32 3)
137  ret void
138}
139
140define dso_local void @test__twi_boundary_imm_reg(i32 %a) {
141; CHECK-LABEL: test__twi_boundary_imm_reg:
142; CHECK:       # %bb.0:
143; CHECK-NEXT:    twi 3, r3, 32767
144; CHECK-NEXT:    blr
145  call void @llvm.ppc.tw(i32 32767, i32 %a, i32 3)
146  ret void
147}
148
149define dso_local void @test__twi_boundary1_reg_imm(i32 %a) {
150; CHECK-LABEL: test__twi_boundary1_reg_imm:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    twi 3, r3, -32768
153; CHECK-NEXT:    blr
154  call void @llvm.ppc.tw(i32 %a, i32 -32768, i32 3)
155  ret void
156}
157
158define dso_local void @test__twi_boundary1_imm_reg(i32 %a) {
159; CHECK-LABEL: test__twi_boundary1_imm_reg:
160; CHECK:       # %bb.0:
161; CHECK-NEXT:    twi 3, r3, -32768
162; CHECK-NEXT:    blr
163  call void @llvm.ppc.tw(i32 -32768, i32 %a, i32 3)
164  ret void
165}
166
167define dso_local void @test__tw_boundary2_reg_imm(i32 %a) {
168; CHECK-LABEL: test__tw_boundary2_reg_imm:
169; CHECK:       # %bb.0:
170; CHECK-NEXT:    lis r4, 0
171; CHECK-NEXT:    ori r4, r4, 32768
172; CHECK-NEXT:    tw 3, r3, r4
173; CHECK-NEXT:    blr
174  call void @llvm.ppc.tw(i32 %a, i32 32768, i32 3)
175  ret void
176}
177
178define dso_local void @test__tw_boundary2_imm_reg(i32 %a) {
179; CHECK-LABEL: test__tw_boundary2_imm_reg:
180; CHECK:       # %bb.0:
181; CHECK-NEXT:    lis r4, 0
182; CHECK-NEXT:    ori r4, r4, 32768
183; CHECK-NEXT:    tw 3, r4, r3
184; CHECK-NEXT:    blr
185  call void @llvm.ppc.tw(i32 32768, i32 %a, i32 3)
186  ret void
187}
188
189define dso_local void @test__tw_boundary3_reg_imm(i32 %a) {
190; CHECK-LABEL: test__tw_boundary3_reg_imm:
191; CHECK:       # %bb.0:
192; CHECK-NEXT:    lis r4, -1
193; CHECK-NEXT:    ori r4, r4, 32767
194; CHECK-NEXT:    tw 3, r3, r4
195; CHECK-NEXT:    blr
196  call void @llvm.ppc.tw(i32 %a, i32 -32769, i32 3)
197  ret void
198}
199
200define dso_local void @test__tw_boundary3_imm_reg(i32 %a) {
201; CHECK-LABEL: test__tw_boundary3_imm_reg:
202; CHECK:       # %bb.0:
203; CHECK-NEXT:    lis r4, -1
204; CHECK-NEXT:    ori r4, r4, 32767
205; CHECK-NEXT:    tw 3, r4, r3
206; CHECK-NEXT:    blr
207  call void @llvm.ppc.tw(i32 -32769, i32 %a, i32 3)
208  ret void
209}
210
211define dso_local void @test__twlgti_reg_imm(i32 %a) {
212; CHECK-LABEL: test__twlgti_reg_imm:
213; CHECK:       # %bb.0:
214; CHECK-NEXT:    twlgti r3, 0
215; CHECK-NEXT:    blr
216  call void @llvm.ppc.tw(i32 %a, i32 0, i32 1)
217  ret void
218}
219
220define dso_local void @test__twllti_imm_reg(i32 %a) {
221; CHECK-LABEL: test__twllti_imm_reg:
222; CHECK:       # %bb.0:
223; CHECK-NEXT:    twllti r3, 0
224; CHECK-NEXT:    blr
225  call void @llvm.ppc.tw(i32 0, i32 %a, i32 1)
226  ret void
227}
228
229define dso_local void @test__twllti_reg_imm(i32 %a) {
230; CHECK-LABEL: test__twllti_reg_imm:
231; CHECK:       # %bb.0:
232; CHECK-NEXT:    twllti r3, 1
233; CHECK-NEXT:    blr
234  call void @llvm.ppc.tw(i32 %a, i32 1, i32 2)
235  ret void
236}
237
238define dso_local void @test__twlgti_imm_reg(i32 %a) {
239; CHECK-LABEL: test__twlgti_imm_reg:
240; CHECK:       # %bb.0:
241; CHECK-NEXT:    twlgti r3, 1
242; CHECK-NEXT:    blr
243  call void @llvm.ppc.tw(i32 1, i32 %a, i32 2)
244  ret void
245}
246
247define dso_local void @test__tweqi_reg_imm(i32 %a) {
248; CHECK-LABEL: test__tweqi_reg_imm:
249; CHECK:       # %bb.0:
250; CHECK-NEXT:    tweqi r3, 2
251; CHECK-NEXT:    blr
252  call void @llvm.ppc.tw(i32 %a, i32 2, i32 4)
253  ret void
254}
255
256define dso_local void @test__tweqi_imm_reg(i32 %a) {
257; CHECK-LABEL: test__tweqi_imm_reg:
258; CHECK:       # %bb.0:
259; CHECK-NEXT:    tweqi r3, 2
260; CHECK-NEXT:    blr
261  call void @llvm.ppc.tw(i32 2, i32 %a, i32 4)
262  ret void
263}
264
265define dso_local void @test__twgti_reg_imm(i32 %a) {
266; CHECK-LABEL: test__twgti_reg_imm:
267; CHECK:       # %bb.0:
268; CHECK-NEXT:    twgti r3, 16
269; CHECK-NEXT:    blr
270  call void @llvm.ppc.tw(i32 %a, i32 16, i32 8)
271  ret void
272}
273
274define dso_local void @test__twlti_imm_reg(i32 %a) {
275; CHECK-LABEL: test__twlti_imm_reg:
276; CHECK:       # %bb.0:
277; CHECK-NEXT:    twlti r3, 16
278; CHECK-NEXT:    blr
279  call void @llvm.ppc.tw(i32 16, i32 %a, i32 8)
280  ret void
281}
282
283define dso_local void @test__twlti_reg_imm(i32 %a) {
284; CHECK-LABEL: test__twlti_reg_imm:
285; CHECK:       # %bb.0:
286; CHECK-NEXT:    twlti r3, 64
287; CHECK-NEXT:    blr
288  call void @llvm.ppc.tw(i32 %a, i32 64, i32 16)
289  ret void
290}
291
292define dso_local void @test__twgti_imm_reg(i32 %a) {
293; CHECK-LABEL: test__twgti_imm_reg:
294; CHECK:       # %bb.0:
295; CHECK-NEXT:    twgti r3, 64
296; CHECK-NEXT:    blr
297  call void @llvm.ppc.tw(i32 64, i32 %a, i32 16)
298  ret void
299}
300
301define dso_local void @test__twnei_reg_imm(i32 %a) {
302; CHECK-LABEL: test__twnei_reg_imm:
303; CHECK:       # %bb.0:
304; CHECK-NEXT:    twnei r3, 256
305; CHECK-NEXT:    blr
306  call void @llvm.ppc.tw(i32 %a, i32 256, i32 24)
307  ret void
308}
309
310define dso_local void @test__twnei_imm_reg(i32 %a) {
311; CHECK-LABEL: test__twnei_imm_reg:
312; CHECK:       # %bb.0:
313; CHECK-NEXT:    twnei r3, 256
314; CHECK-NEXT:    blr
315  call void @llvm.ppc.tw(i32 256, i32 %a, i32 24)
316  ret void
317}
318
319define dso_local void @test__twui_reg_imm(i32 %a) {
320; CHECK-LABEL: test__twui_reg_imm:
321; CHECK:       # %bb.0:
322; CHECK-NEXT:    twui r3, 512
323; CHECK-NEXT:    blr
324  call void @llvm.ppc.tw(i32 %a, i32 512, i32 31)
325  ret void
326}
327
328define dso_local void @test__twui_imm_imm(i32 %a) {
329; CHECK-LABEL: test__twui_imm_imm:
330; CHECK:       # %bb.0:
331; CHECK-NEXT:    twui r3, 512
332; CHECK-NEXT:    blr
333  call void @llvm.ppc.tw(i32 512, i32 %a, i32 31)
334  ret void
335}
336
337; trap
338declare void @llvm.ppc.trap(i32 %a)
339define dso_local void @test__trap(i32 %a) {
340; CHECK-LABEL: test__trap:
341; CHECK:       # %bb.0:
342; CHECK-NEXT:    twnei r3, 0
343; CHECK-NEXT:    blr
344  call void @llvm.ppc.trap(i32 %a)
345  ret void
346}
347