1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: --ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 5; RUN: --ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s 6; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \ 7; RUN: --ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s 8 9; tdw 10declare void @llvm.ppc.tdw(i64 %a, i64 %b, i32 immarg) 11define dso_local void @test__tdwlgt(i64 %a, i64 %b) { 12; CHECK-LABEL: test__tdwlgt: 13; CHECK: # %bb.0: 14; CHECK-NEXT: tdlgt r3, r4 15; CHECK-NEXT: blr 16 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 1) 17 ret void 18} 19 20define dso_local void @test__tdwllt(i64 %a, i64 %b) { 21; CHECK-LABEL: test__tdwllt: 22; CHECK: # %bb.0: 23; CHECK-NEXT: tdllt r3, r4 24; CHECK-NEXT: blr 25 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 2) 26 ret void 27} 28 29define dso_local void @test__tdw3(i64 %a, i64 %b) { 30; CHECK-LABEL: test__tdw3: 31; CHECK: # %bb.0: 32; CHECK-NEXT: td 3, r3, r4 33; CHECK-NEXT: blr 34 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 3) 35 ret void 36} 37define dso_local void @test__tdweq(i64 %a, i64 %b) { 38; CHECK-LABEL: test__tdweq: 39; CHECK: # %bb.0: 40; CHECK-NEXT: tdeq r3, r4 41; CHECK-NEXT: blr 42 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 4) 43 ret void 44} 45 46define dso_local void @test__tdwlge(i64 %a, i64 %b) { 47; CHECK-LABEL: test__tdwlge: 48; CHECK: # %bb.0: 49; CHECK-NEXT: td 5, r3, r4 50; CHECK-NEXT: blr 51 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 5) 52 ret void 53} 54 55define dso_local void @test__tdwlle(i64 %a, i64 %b) { 56; CHECK-LABEL: test__tdwlle: 57; CHECK: # %bb.0: 58; CHECK-NEXT: td 6, r3, r4 59; CHECK-NEXT: blr 60 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 6) 61 ret void 62} 63 64define dso_local void @test__tdwgt(i64 %a, i64 %b) { 65; CHECK-LABEL: test__tdwgt: 66; CHECK: # %bb.0: 67; CHECK-NEXT: tdgt r3, r4 68; CHECK-NEXT: blr 69 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 8) 70 ret void 71} 72 73define dso_local void @test__tdwge(i64 %a, i64 %b) { 74; CHECK-LABEL: test__tdwge: 75; CHECK: # %bb.0: 76; CHECK-NEXT: td 12, r3, r4 77; CHECK-NEXT: blr 78 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 12) 79 ret void 80} 81 82define dso_local void @test__tdwlt(i64 %a, i64 %b) { 83; CHECK-LABEL: test__tdwlt: 84; CHECK: # %bb.0: 85; CHECK-NEXT: tdlt r3, r4 86; CHECK-NEXT: blr 87 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 16) 88 ret void 89} 90 91define dso_local void @test__tdwle(i64 %a, i64 %b) { 92; CHECK-LABEL: test__tdwle: 93; CHECK: # %bb.0: 94; CHECK-NEXT: td 20, r3, r4 95; CHECK-NEXT: blr 96 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 20) 97 ret void 98} 99 100define dso_local void @test__tdwne24(i64 %a, i64 %b) { 101; CHECK-LABEL: test__tdwne24: 102; CHECK: # %bb.0: 103; CHECK-NEXT: tdne r3, r4 104; CHECK-NEXT: blr 105 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 24) 106 ret void 107} 108 109define dso_local void @test__tdw31(i64 %a, i64 %b) { 110; CHECK-LABEL: test__tdw31: 111; CHECK: # %bb.0: 112; CHECK-NEXT: tdu r3, r4 113; CHECK-NEXT: blr 114 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 31) 115 ret void 116} 117 118define dso_local void @test__tdw_no_match(i64 %a, i64 %b) { 119; CHECK-LABEL: test__tdw_no_match: 120; CHECK: # %bb.0: 121; CHECK-NEXT: td 13, r3, r4 122; CHECK-NEXT: blr 123 call void @llvm.ppc.tdw(i64 %a, i64 %b, i32 13) 124 ret void 125} 126 127; tdw -> tdi 128define dso_local void @test__tdi_reg_imm_boundary(i64 %a) { 129; CHECK-LABEL: test__tdi_reg_imm_boundary: 130; CHECK: # %bb.0: 131; CHECK-NEXT: tdi 3, r3, 32767 132; CHECK-NEXT: blr 133 call void @llvm.ppc.tdw(i64 %a, i64 32767, i32 3) 134 ret void 135} 136 137define dso_local void @test__tdi_imm_reg_boundary(i64 %a) { 138; CHECK-LABEL: test__tdi_imm_reg_boundary: 139; CHECK: # %bb.0: 140; CHECK-NEXT: tdi 3, r3, 32767 141; CHECK-NEXT: blr 142 call void @llvm.ppc.tdw(i64 32767, i64 %a, i32 3) 143 ret void 144} 145 146define dso_local void @test__tdi_reg_imm_boundary1(i64 %a) { 147; CHECK-LABEL: test__tdi_reg_imm_boundary1: 148; CHECK: # %bb.0: 149; CHECK-NEXT: tdi 3, r3, -32768 150; CHECK-NEXT: blr 151 call void @llvm.ppc.tdw(i64 %a, i64 -32768, i32 3) 152 ret void 153} 154 155define dso_local void @test__tdi_imm_reg_boundary1(i64 %a) { 156; CHECK-LABEL: test__tdi_imm_reg_boundary1: 157; CHECK: # %bb.0: 158; CHECK-NEXT: tdi 3, r3, -32768 159; CHECK-NEXT: blr 160 call void @llvm.ppc.tdw(i64 -32768, i64 %a, i32 3) 161 ret void 162} 163 164define dso_local void @test__td_reg_imm_boundary2(i64 %a) { 165; CHECK-LABEL: test__td_reg_imm_boundary2: 166; CHECK: # %bb.0: 167; CHECK-NEXT: li r4, 0 168; CHECK-NEXT: ori r4, r4, 32768 169; CHECK-NEXT: td 3, r4, r3 170; CHECK-NEXT: blr 171 call void @llvm.ppc.tdw(i64 32768, i64 %a, i32 3) 172 ret void 173} 174 175define dso_local void @test__td_imm_reg_boundary2(i64 %a) { 176; CHECK-LABEL: test__td_imm_reg_boundary2: 177; CHECK: # %bb.0: 178; CHECK-NEXT: li r4, 0 179; CHECK-NEXT: ori r4, r4, 32768 180; CHECK-NEXT: td 3, r3, r4 181; CHECK-NEXT: blr 182 call void @llvm.ppc.tdw(i64 %a, i64 32768, i32 3) 183 ret void 184} 185 186define dso_local void @test__td_reg_imm_boundary3(i64 %a) { 187; CHECK-LABEL: test__td_reg_imm_boundary3: 188; CHECK: # %bb.0: 189; CHECK-NEXT: lis r4, -1 190; CHECK-NEXT: ori r4, r4, 32767 191; CHECK-NEXT: td 3, r3, r4 192; CHECK-NEXT: blr 193 call void @llvm.ppc.tdw(i64 %a, i64 -32769, i32 3) 194 ret void 195} 196 197define dso_local void @test__td_imm_reg_boundary3(i64 %a) { 198; CHECK-LABEL: test__td_imm_reg_boundary3: 199; CHECK: # %bb.0: 200; CHECK-NEXT: lis r4, -1 201; CHECK-NEXT: ori r4, r4, 32767 202; CHECK-NEXT: td 3, r3, r4 203; CHECK-NEXT: blr 204 call void @llvm.ppc.tdw(i64 %a, i64 -32769, i32 3) 205 ret void 206} 207 208define dso_local void @test__tdlgti_reg_imm(i64 %a) { 209; CHECK-LABEL: test__tdlgti_reg_imm: 210; CHECK: # %bb.0: 211; CHECK-NEXT: tdlgti r3, 0 212; CHECK-NEXT: blr 213 call void @llvm.ppc.tdw(i64 %a, i64 0, i32 1) 214 ret void 215} 216 217define dso_local void @test__tdllti_imm_reg(i64 %a) { 218; CHECK-LABEL: test__tdllti_imm_reg: 219; CHECK: # %bb.0: 220; CHECK-NEXT: tdllti r3, 0 221; CHECK-NEXT: blr 222 call void @llvm.ppc.tdw(i64 0, i64 %a, i32 1) 223 ret void 224} 225 226define dso_local void @test__tdllti_reg_imm(i64 %a) { 227; CHECK-LABEL: test__tdllti_reg_imm: 228; CHECK: # %bb.0: 229; CHECK-NEXT: tdllti r3, 1 230; CHECK-NEXT: blr 231 call void @llvm.ppc.tdw(i64 %a, i64 1, i32 2) 232 ret void 233} 234 235define dso_local void @test__tdlgti_imm_reg(i64 %a) { 236; CHECK-LABEL: test__tdlgti_imm_reg: 237; CHECK: # %bb.0: 238; CHECK-NEXT: tdlgti r3, 1 239; CHECK-NEXT: blr 240 call void @llvm.ppc.tdw(i64 1, i64 %a, i32 2) 241 ret void 242} 243 244define dso_local void @test__tdeqi_reg_imm(i64 %a) { 245; CHECK-LABEL: test__tdeqi_reg_imm: 246; CHECK: # %bb.0: 247; CHECK-NEXT: tdeqi r3, 2 248; CHECK-NEXT: blr 249 call void @llvm.ppc.tdw(i64 %a, i64 2, i32 4) 250 ret void 251} 252 253define dso_local void @test__tdeqi_imm_reg(i64 %a) { 254; CHECK-LABEL: test__tdeqi_imm_reg: 255; CHECK: # %bb.0: 256; CHECK-NEXT: tdeqi r3, 2 257; CHECK-NEXT: blr 258 call void @llvm.ppc.tdw(i64 2, i64 %a, i32 4) 259 ret void 260} 261 262define dso_local void @test__tdgti_reg_imm(i64 %a) { 263; CHECK-LABEL: test__tdgti_reg_imm: 264; CHECK: # %bb.0: 265; CHECK-NEXT: tdgti r3, 16 266; CHECK-NEXT: blr 267 call void @llvm.ppc.tdw(i64 %a, i64 16, i32 8) 268 ret void 269} 270 271define dso_local void @test__tdlti_imm_reg(i64 %a) { 272; CHECK-LABEL: test__tdlti_imm_reg: 273; CHECK: # %bb.0: 274; CHECK-NEXT: tdlti r3, 16 275; CHECK-NEXT: blr 276 call void @llvm.ppc.tdw(i64 16, i64 %a, i32 8) 277 ret void 278} 279 280define dso_local void @test__tdlti_reg_imm(i64 %a) { 281; CHECK-LABEL: test__tdlti_reg_imm: 282; CHECK: # %bb.0: 283; CHECK-NEXT: tdlti r3, 64 284; CHECK-NEXT: blr 285 call void @llvm.ppc.tdw(i64 %a, i64 64, i32 16) 286 ret void 287} 288 289define dso_local void @test__tdgti_imm_reg(i64 %a) { 290; CHECK-LABEL: test__tdgti_imm_reg: 291; CHECK: # %bb.0: 292; CHECK-NEXT: tdgti r3, 64 293; CHECK-NEXT: blr 294 call void @llvm.ppc.tdw(i64 64, i64 %a, i32 16) 295 ret void 296} 297 298define dso_local void @test__tdnei_reg_imm(i64 %a) { 299; CHECK-LABEL: test__tdnei_reg_imm: 300; CHECK: # %bb.0: 301; CHECK-NEXT: tdnei r3, 256 302; CHECK-NEXT: blr 303 call void @llvm.ppc.tdw(i64 %a, i64 256, i32 24) 304 ret void 305} 306 307define dso_local void @test__tdnei_imm_reg(i64 %a) { 308; CHECK-LABEL: test__tdnei_imm_reg: 309; CHECK: # %bb.0: 310; CHECK-NEXT: tdnei r3, 256 311; CHECK-NEXT: blr 312 call void @llvm.ppc.tdw(i64 256, i64 %a, i32 24) 313 ret void 314} 315 316define dso_local void @test__tdui_reg_imm(i64 %a) { 317; CHECK-LABEL: test__tdui_reg_imm: 318; CHECK: # %bb.0: 319; CHECK-NEXT: tdui r3, 512 320; CHECK-NEXT: blr 321 call void @llvm.ppc.tdw(i64 %a, i64 512, i32 31) 322 ret void 323} 324 325define dso_local void @test__tdui_imm_reg(i64 %a) { 326; CHECK-LABEL: test__tdui_imm_reg: 327; CHECK: # %bb.0: 328; CHECK-NEXT: tdui r3, 512 329; CHECK-NEXT: blr 330 call void @llvm.ppc.tdw(i64 512, i64 %a, i32 31) 331 ret void 332} 333 334; trapd 335declare void @llvm.ppc.trapd(i64 %a) 336define dso_local void @test__trapd(i64 %a) { 337; CHECK-LABEL: test__trapd: 338; CHECK: # %bb.0: 339; CHECK-NEXT: tdnei r3, 0 340; CHECK-NEXT: blr 341 call void @llvm.ppc.trapd(i64 %a) 342 ret void 343} 344