1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \ 3; RUN: -mcpu=pwr9 < %s | FileCheck %s 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \ 5; RUN: -mcpu=pwr9 < %s | FileCheck %s 6; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \ 7; RUN: -mcpu=pwr9 < %s | FileCheck %s 8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \ 9; RUN: -mcpu=pwr9 < %s | FileCheck %s 10 11define i32 @test_builtin_ppc_compare_exp_eq(double %d) { 12; CHECK-LABEL: test_builtin_ppc_compare_exp_eq: 13; CHECK: # %bb.0: # %entry 14; CHECK-NEXT: xscmpexpdp 0, 1, 1 15; CHECK-NEXT: li 3, 0 16; CHECK-NEXT: li 4, 1 17; CHECK-NEXT: iseleq 3, 4, 3 18; CHECK-NEXT: blr 19entry: 20 %0 = tail call i32 @llvm.ppc.compare.exp.eq(double %d, double %d) 21 ret i32 %0 22} 23 24declare i32 @llvm.ppc.compare.exp.eq(double, double) 25 26define i32 @test_builtin_ppc_compare_exp_lt(double %d) { 27; CHECK-LABEL: test_builtin_ppc_compare_exp_lt: 28; CHECK: # %bb.0: # %entry 29; CHECK-NEXT: xscmpexpdp 0, 1, 1 30; CHECK-NEXT: li 3, 0 31; CHECK-NEXT: li 4, 1 32; CHECK-NEXT: isellt 3, 4, 3 33; CHECK-NEXT: blr 34entry: 35 %0 = tail call i32 @llvm.ppc.compare.exp.lt(double %d, double %d) 36 ret i32 %0 37} 38 39declare i32 @llvm.ppc.compare.exp.lt(double, double) 40 41define i32 @test_builtin_ppc_compare_exp_gt(double %d) { 42; CHECK-LABEL: test_builtin_ppc_compare_exp_gt: 43; CHECK: # %bb.0: # %entry 44; CHECK-NEXT: xscmpexpdp 0, 1, 1 45; CHECK-NEXT: li 3, 0 46; CHECK-NEXT: li 4, 1 47; CHECK-NEXT: iselgt 3, 4, 3 48; CHECK-NEXT: blr 49entry: 50 %0 = tail call i32 @llvm.ppc.compare.exp.gt(double %d, double %d) 51 ret i32 %0 52} 53 54declare i32 @llvm.ppc.compare.exp.gt(double, double) 55 56define i32 @test_builtin_ppc_compare_exp_uo(double %d) { 57; CHECK-LABEL: test_builtin_ppc_compare_exp_uo: 58; CHECK: # %bb.0: # %entry 59; CHECK-NEXT: xscmpexpdp 0, 1, 1 60; CHECK-NEXT: li 3, 0 61; CHECK-NEXT: li 4, 1 62; CHECK-NEXT: isel 3, 4, 3, 3 63; CHECK-NEXT: blr 64entry: 65 %0 = tail call i32 @llvm.ppc.compare.exp.uo(double %d, double %d) 66 ret i32 %0 67} 68 69declare i32 @llvm.ppc.compare.exp.uo(double, double) 70 71define i32 @test_builtin_ppc_test_data_class_d(double %d) { 72; CHECK-LABEL: test_builtin_ppc_test_data_class_d: 73; CHECK: # %bb.0: # %entry 74; CHECK-NEXT: xststdcdp 0, 1, 0 75; CHECK-NEXT: li 3, 0 76; CHECK-NEXT: li 4, 1 77; CHECK-NEXT: iseleq 3, 4, 3 78; CHECK-NEXT: blr 79entry: 80 %test_data_class = tail call i32 @llvm.ppc.test.data.class.f64(double %d, i32 0) 81 ret i32 %test_data_class 82} 83 84declare i32 @llvm.ppc.test.data.class.f64(double, i32 immarg) 85 86define i32 @test_builtin_ppc_test_data_class_f(float %f) { 87; CHECK-LABEL: test_builtin_ppc_test_data_class_f: 88; CHECK: # %bb.0: # %entry 89; CHECK-NEXT: xststdcsp 0, 1, 127 90; CHECK-NEXT: li 3, 0 91; CHECK-NEXT: li 4, 1 92; CHECK-NEXT: iseleq 3, 4, 3 93; CHECK-NEXT: blr 94entry: 95 %test_data_class = tail call i32 @llvm.ppc.test.data.class.f32(float %f, i32 127) 96 ret i32 %test_data_class 97} 98 99declare i32 @llvm.ppc.test.data.class.f32(float, i32 immarg) 100