xref: /llvm-project/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-stfiw.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   -mcpu=pwr8 < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
5; RUN:   -mcpu=pwr9 -mattr -vsx < %s | FileCheck %s --check-prefix=CHECK-NO-VSX
6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
7; RUN:   -mcpu=pwr9 < %s | FileCheck %s
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9; RUN:   -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-NO-VSX
10; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
11; RUN:   -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-32BIT
12; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
13; RUN:   -mcpu=pwr8 < %s | FileCheck %s
14
15declare void @llvm.ppc.stfiw(ptr, double)
16define dso_local void @test_stfiw(ptr %cia, double %da) {
17; CHECK-LABEL: test_stfiw:
18; CHECK:       # %bb.0: # %entry
19; CHECK-NEXT:    stxsiwx 1, 0, 3
20; CHECK-NEXT:    blr
21;
22; CHECK-NO-VSX-LABEL: test_stfiw:
23; CHECK-NO-VSX:       # %bb.0: # %entry
24; CHECK-NO-VSX-NEXT:    stfiwx 1, 0, 3
25; CHECK-NO-VSX-NEXT:    blr
26;
27; CHECK-32BIT-LABEL: test_stfiw:
28; CHECK-32BIT:       # %bb.0: # %entry
29; CHECK-32BIT-NEXT:    stfiwx 1, 0, 3
30; CHECK-32BIT-NEXT:    blr
31entry:
32  tail call void @llvm.ppc.stfiw(ptr %cia, double %da)
33  ret void
34}
35
36define dso_local void @test_xl_stfiw(ptr %cia, double %da) {
37; CHECK-LABEL: test_xl_stfiw:
38; CHECK:       # %bb.0: # %entry
39; CHECK-NEXT:    stxsiwx 1, 0, 3
40; CHECK-NEXT:    blr
41;
42; CHECK-NO-VSX-LABEL: test_xl_stfiw:
43; CHECK-NO-VSX:       # %bb.0: # %entry
44; CHECK-NO-VSX-NEXT:    stfiwx 1, 0, 3
45; CHECK-NO-VSX-NEXT:    blr
46;
47; CHECK-32BIT-LABEL: test_xl_stfiw:
48; CHECK-32BIT:       # %bb.0: # %entry
49; CHECK-32BIT-NEXT:    stfiwx 1, 0, 3
50; CHECK-32BIT-NEXT:    blr
51entry:
52  tail call void @llvm.ppc.stfiw(ptr %cia, double %da)
53  ret void
54}
55