1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr8 < %s | FileCheck %s 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 5; RUN: -mcpu=pwr7 < %s | FileCheck %s 6; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \ 7; RUN: -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-AIX 8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \ 9; RUN: -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-AIX64 10 11declare void @llvm.ppc.dcbtstt(ptr) 12declare void @llvm.ppc.dcbtt(ptr) 13 14@vpa = external local_unnamed_addr global ptr, align 8 15 16define dso_local void @test_dcbtstt() { 17; CHECK-LABEL: test_dcbtstt: 18; CHECK: # %bb.0: # %entry 19; CHECK-NEXT: addis 3, 2, .LC0@toc@ha 20; CHECK-NEXT: ld 3, .LC0@toc@l(3) 21; CHECK-NEXT: ld 3, 0(3) 22; CHECK-NEXT: dcbtstt 0, 3 23; CHECK-NEXT: blr 24; 25; CHECK-AIX-LABEL: test_dcbtstt: 26; CHECK-AIX: # %bb.0: # %entry 27; CHECK-AIX-NEXT: lwz 3, L..C0(2) # @vpa 28; CHECK-AIX-NEXT: lwz 3, 0(3) 29; CHECK-AIX-NEXT: dcbtst 0, 3, 16 30; CHECK-AIX-NEXT: blr 31; 32; CHECK-AIX64-LABEL: test_dcbtstt: 33; CHECK-AIX64: # %bb.0: # %entry 34; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @vpa 35; CHECK-AIX64-NEXT: ld 3, 0(3) 36; CHECK-AIX64-NEXT: dcbtst 0, 3, 16 37; CHECK-AIX64-NEXT: blr 38entry: 39 %0 = load ptr, ptr @vpa, align 8 40 tail call void @llvm.ppc.dcbtstt(ptr %0) 41 ret void 42} 43 44 45define dso_local void @test_dcbtt() { 46; CHECK-LABEL: test_dcbtt: 47; CHECK: # %bb.0: # %entry 48; CHECK-NEXT: addis 3, 2, .LC0@toc@ha 49; CHECK-NEXT: ld 3, .LC0@toc@l(3) 50; CHECK-NEXT: ld 3, 0(3) 51; CHECK-NEXT: dcbtt 0, 3 52; CHECK-NEXT: blr 53; 54; CHECK-AIX-LABEL: test_dcbtt: 55; CHECK-AIX: # %bb.0: # %entry 56; CHECK-AIX-NEXT: lwz 3, L..C0(2) # @vpa 57; CHECK-AIX-NEXT: lwz 3, 0(3) 58; CHECK-AIX-NEXT: dcbt 0, 3, 16 59; CHECK-AIX-NEXT: blr 60; 61; CHECK-AIX64-LABEL: test_dcbtt: 62; CHECK-AIX64: # %bb.0: # %entry 63; CHECK-AIX64-NEXT: ld 3, L..C0(2) # @vpa 64; CHECK-AIX64-NEXT: ld 3, 0(3) 65; CHECK-AIX64-NEXT: dcbt 0, 3, 16 66; CHECK-AIX64-NEXT: blr 67entry: 68 %0 = load ptr, ptr @vpa, align 8 69 tail call void @llvm.ppc.dcbtt(ptr %0) 70 ret void 71} 72