xref: /llvm-project/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-multiply.ll (revision 18c19414eb70578d4c487d6f4b0f438aead71d6a)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
5; RUN:   -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
6; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
7; RUN:   -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-32
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
9; RUN:   -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
10
11define dso_local signext i32 @test_builtin_ppc_mulhw(i32 %a, i32%b) {
12; CHECK-32-LABEL: test_builtin_ppc_mulhw:
13; CHECK-32:       # %bb.0: # %entry
14; CHECK-32-NEXT:    mulhw 3, 3, 4
15; CHECK-32-NEXT:    blr
16;
17; CHECK-64-LABEL: test_builtin_ppc_mulhw:
18; CHECK-64:       # %bb.0: # %entry
19; CHECK-64-NEXT:    mulhw 3, 3, 4
20; CHECK-64-NEXT:    extsw 3, 3
21; CHECK-64-NEXT:    blr
22entry:
23  %0 = call i32 @llvm.ppc.mulhw(i32 %a, i32 %b)
24  ret i32 %0
25}
26
27declare i32 @llvm.ppc.mulhw(i32, i32)
28
29define dso_local zeroext i32 @test_builtin_ppc_mulhwu(i32 %a, i32%b) {
30; CHECK-32-LABEL: test_builtin_ppc_mulhwu:
31; CHECK-32:       # %bb.0: # %entry
32; CHECK-32-NEXT:    mulhwu 3, 3, 4
33; CHECK-32-NEXT:    blr
34;
35; CHECK-64-LABEL: test_builtin_ppc_mulhwu:
36; CHECK-64:       # %bb.0: # %entry
37; CHECK-64-NEXT:    mulhwu 3, 3, 4
38; CHECK-64-NEXT:    clrldi 3, 3, 32
39; CHECK-64-NEXT:    blr
40entry:
41  %0 = call i32 @llvm.ppc.mulhwu(i32 %a, i32 %b)
42  ret i32 %0
43}
44
45declare i32 @llvm.ppc.mulhwu(i32, i32)
46