xref: /llvm-project/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.ll (revision a51712751c184ebe056718c938d2526693a31564)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s |\
3; RUN:   FileCheck %s --check-prefix=CHECK-PWR8
4; RUN: llc -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu \
5; RUN:   -mattr=-vsx < %s | FileCheck %s --check-prefix=CHECK-NOVSX
6; RUN: llc -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu \
7; RUN:   -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-PWR7
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix -mcpu=pwr7 \
9; RUN:   < %s | FileCheck %s --check-prefix=CHECK-PWR7
10; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix -mcpu=pwr8 < %s |\
11; RUN:   FileCheck %s --check-prefix=CHECK-PWR8
12
13define dso_local double @fmsub_t0(double %d, double %d2, double %d3) {
14; CHECK-PWR8-LABEL: fmsub_t0:
15; CHECK-PWR8:       # %bb.0: # %entry
16; CHECK-PWR8-NEXT:    xsmsubmdp 1, 2, 3
17; CHECK-PWR8-NEXT:    blr
18;
19; CHECK-NOVSX-LABEL: fmsub_t0:
20; CHECK-NOVSX:       # %bb.0: # %entry
21; CHECK-NOVSX-NEXT:    fmsub 1, 1, 2, 3
22; CHECK-NOVSX-NEXT:    blr
23;
24; CHECK-PWR7-LABEL: fmsub_t0:
25; CHECK-PWR7:       # %bb.0: # %entry
26; CHECK-PWR7-NEXT:    xsmsubmdp 1, 2, 3
27; CHECK-PWR7-NEXT:    blr
28entry:
29  %0 = tail call double @llvm.ppc.fmsub(double %d, double %d2, double %d3)
30  ret double %0
31}
32
33declare double @llvm.ppc.fmsub(double, double, double)
34
35define dso_local float @fmsubs_t0(float %f, float %f2, float %f3) {
36; CHECK-PWR8-LABEL: fmsubs_t0:
37; CHECK-PWR8:       # %bb.0: # %entry
38; CHECK-PWR8-NEXT:    xsmsubmsp 1, 2, 3
39; CHECK-PWR8-NEXT:    blr
40;
41; CHECK-NOVSX-LABEL: fmsubs_t0:
42; CHECK-NOVSX:       # %bb.0: # %entry
43; CHECK-NOVSX-NEXT:    fmsubs 1, 1, 2, 3
44; CHECK-NOVSX-NEXT:    blr
45;
46; CHECK-PWR7-LABEL: fmsubs_t0:
47; CHECK-PWR7:       # %bb.0: # %entry
48; CHECK-PWR7-NEXT:    fmsubs 1, 1, 2, 3
49; CHECK-PWR7-NEXT:    blr
50entry:
51  %0 = tail call float @llvm.ppc.fmsubs(float %f, float %f2, float %f3)
52  ret float %0
53}
54
55declare float @llvm.ppc.fmsubs(float, float, float)
56
57define dso_local double @fnmadd_t0(double %d, double %d2, double %d3) {
58; CHECK-PWR8-LABEL: fnmadd_t0:
59; CHECK-PWR8:       # %bb.0: # %entry
60; CHECK-PWR8-NEXT:    xsnmaddmdp 1, 2, 3
61; CHECK-PWR8-NEXT:    blr
62;
63; CHECK-NOVSX-LABEL: fnmadd_t0:
64; CHECK-NOVSX:       # %bb.0: # %entry
65; CHECK-NOVSX-NEXT:    fnmadd 1, 1, 2, 3
66; CHECK-NOVSX-NEXT:    blr
67;
68; CHECK-PWR7-LABEL: fnmadd_t0:
69; CHECK-PWR7:       # %bb.0: # %entry
70; CHECK-PWR7-NEXT:    xsnmaddmdp 1, 2, 3
71; CHECK-PWR7-NEXT:    blr
72entry:
73  %0 = tail call double @llvm.ppc.fnmadd(double %d, double %d2, double %d3)
74  ret double %0
75}
76
77declare double @llvm.ppc.fnmadd(double, double, double)
78
79define dso_local float @fnmadds_t0(float %f, float %f2, float %f3) {
80; CHECK-PWR8-LABEL: fnmadds_t0:
81; CHECK-PWR8:       # %bb.0: # %entry
82; CHECK-PWR8-NEXT:    xsnmaddmsp 1, 2, 3
83; CHECK-PWR8-NEXT:    blr
84;
85; CHECK-NOVSX-LABEL: fnmadds_t0:
86; CHECK-NOVSX:       # %bb.0: # %entry
87; CHECK-NOVSX-NEXT:    fnmadds 1, 1, 2, 3
88; CHECK-NOVSX-NEXT:    blr
89;
90; CHECK-PWR7-LABEL: fnmadds_t0:
91; CHECK-PWR7:       # %bb.0: # %entry
92; CHECK-PWR7-NEXT:    fnmadds 1, 1, 2, 3
93; CHECK-PWR7-NEXT:    blr
94entry:
95  %0 = tail call float @llvm.ppc.fnmadds(float %f, float %f2, float %f3)
96  ret float %0
97}
98
99declare float @llvm.ppc.fnmadds(float, float, float)
100
101define dso_local float @fnmsub_f32(float %f, float %f2, float %f3) {
102; CHECK-PWR8-LABEL: fnmsub_f32:
103; CHECK-PWR8:       # %bb.0: # %entry
104; CHECK-PWR8-NEXT:    xsnmsubasp 3, 1, 2
105; CHECK-PWR8-NEXT:    fmr 1, 3
106; CHECK-PWR8-NEXT:    blr
107;
108; CHECK-NOVSX-LABEL: fnmsub_f32:
109; CHECK-NOVSX:       # %bb.0: # %entry
110; CHECK-NOVSX-NEXT:    fnmsubs 1, 1, 2, 3
111; CHECK-NOVSX-NEXT:    blr
112;
113; CHECK-PWR7-LABEL: fnmsub_f32:
114; CHECK-PWR7:       # %bb.0: # %entry
115; CHECK-PWR7-NEXT:    fnmsubs 1, 1, 2, 3
116; CHECK-PWR7-NEXT:    blr
117entry:
118  %0 = tail call float @llvm.ppc.fnmsub.f32(float %f, float %f2, float %f3)
119  ret float %0
120}
121
122declare float @llvm.ppc.fnmsub.f32(float, float, float)
123
124define dso_local double @fnmsub_f64(double %f, double %f2, double %f3) {
125; CHECK-PWR8-LABEL: fnmsub_f64:
126; CHECK-PWR8:       # %bb.0: # %entry
127; CHECK-PWR8-NEXT:    xsnmsubadp 3, 1, 2
128; CHECK-PWR8-NEXT:    fmr 1, 3
129; CHECK-PWR8-NEXT:    blr
130;
131; CHECK-NOVSX-LABEL: fnmsub_f64:
132; CHECK-NOVSX:       # %bb.0: # %entry
133; CHECK-NOVSX-NEXT:    fnmsub 1, 1, 2, 3
134; CHECK-NOVSX-NEXT:    blr
135;
136; CHECK-PWR7-LABEL: fnmsub_f64:
137; CHECK-PWR7:       # %bb.0: # %entry
138; CHECK-PWR7-NEXT:    xsnmsubadp 3, 1, 2
139; CHECK-PWR7-NEXT:    fmr 1, 3
140; CHECK-PWR7-NEXT:    blr
141entry:
142  %0 = tail call double @llvm.ppc.fnmsub.f64(double %f, double %f2, double %f3)
143  ret double %0
144}
145
146declare double @llvm.ppc.fnmsub.f64(double, double, double)
147
148define dso_local <4 x float> @fnmsub_v4f32(<4 x float> %f, <4 x float> %f2, <4 x float> %f3) {
149; CHECK-PWR8-LABEL: fnmsub_v4f32:
150; CHECK-PWR8:       # %bb.0: # %entry
151; CHECK-PWR8-NEXT:    xvnmsubasp 36, 34, 35
152; CHECK-PWR8-NEXT:    vmr 2, 4
153; CHECK-PWR8-NEXT:    blr
154;
155; CHECK-NOVSX-LABEL: fnmsub_v4f32:
156; CHECK-NOVSX:       # %bb.0: # %entry
157; CHECK-NOVSX-NEXT:    fnmsubs 1, 1, 5, 9
158; CHECK-NOVSX-NEXT:    fnmsubs 2, 2, 6, 10
159; CHECK-NOVSX-NEXT:    fnmsubs 3, 3, 7, 11
160; CHECK-NOVSX-NEXT:    fnmsubs 4, 4, 8, 12
161; CHECK-NOVSX-NEXT:    blr
162;
163; CHECK-PWR7-LABEL: fnmsub_v4f32:
164; CHECK-PWR7:       # %bb.0: # %entry
165; CHECK-PWR7-NEXT:    xvnmsubasp 36, 34, 35
166; CHECK-PWR7-NEXT:    vmr 2, 4
167; CHECK-PWR7-NEXT:    blr
168entry:
169  %0 = tail call <4 x float> @llvm.ppc.fnmsub.v4f32(<4 x float> %f, <4 x float> %f2, <4 x float> %f3)
170  ret <4 x float> %0
171}
172
173declare <4 x float> @llvm.ppc.fnmsub.v4f32(<4 x float>, <4 x float>, <4 x float>)
174
175define dso_local <2 x double> @fnmsub_v2f64(<2 x double> %f, <2 x double> %f2, <2 x double> %f3) {
176; CHECK-PWR8-LABEL: fnmsub_v2f64:
177; CHECK-PWR8:       # %bb.0: # %entry
178; CHECK-PWR8-NEXT:    xvnmsubadp 36, 34, 35
179; CHECK-PWR8-NEXT:    vmr 2, 4
180; CHECK-PWR8-NEXT:    blr
181;
182; CHECK-NOVSX-LABEL: fnmsub_v2f64:
183; CHECK-NOVSX:       # %bb.0: # %entry
184; CHECK-NOVSX-NEXT:    fnmsub 1, 1, 3, 5
185; CHECK-NOVSX-NEXT:    fnmsub 2, 2, 4, 6
186; CHECK-NOVSX-NEXT:    blr
187;
188; CHECK-PWR7-LABEL: fnmsub_v2f64:
189; CHECK-PWR7:       # %bb.0: # %entry
190; CHECK-PWR7-NEXT:    xvnmsubadp 36, 34, 35
191; CHECK-PWR7-NEXT:    vmr 2, 4
192; CHECK-PWR7-NEXT:    blr
193entry:
194  %0 = tail call <2 x double> @llvm.ppc.fnmsub.v2f64(<2 x double> %f, <2 x double> %f2, <2 x double> %f3)
195  ret <2 x double> %0
196}
197
198declare <2 x double> @llvm.ppc.fnmsub.v2f64(<2 x double>, <2 x double>, <2 x double>)
199
200define dso_local double @fre(double %d) {
201; CHECK-PWR8-LABEL: fre:
202; CHECK-PWR8:       # %bb.0: # %entry
203; CHECK-PWR8-NEXT:    xsredp 1, 1
204; CHECK-PWR8-NEXT:    blr
205;
206; CHECK-NOVSX-LABEL: fre:
207; CHECK-NOVSX:       # %bb.0: # %entry
208; CHECK-NOVSX-NEXT:    fre 1, 1
209; CHECK-NOVSX-NEXT:    blr
210;
211; CHECK-PWR7-LABEL: fre:
212; CHECK-PWR7:       # %bb.0: # %entry
213; CHECK-PWR7-NEXT:    xsredp 1, 1
214; CHECK-PWR7-NEXT:    blr
215entry:
216  %0 = tail call double @llvm.ppc.fre(double %d)
217  ret double %0
218}
219
220declare double @llvm.ppc.fre(double)
221
222define dso_local float @fres(float %f) {
223; CHECK-PWR8-LABEL: fres:
224; CHECK-PWR8:       # %bb.0: # %entry
225; CHECK-PWR8-NEXT:    xsresp 1, 1
226; CHECK-PWR8-NEXT:    blr
227;
228; CHECK-NOVSX-LABEL: fres:
229; CHECK-NOVSX:       # %bb.0: # %entry
230; CHECK-NOVSX-NEXT:    fres 1, 1
231; CHECK-NOVSX-NEXT:    blr
232;
233; CHECK-PWR7-LABEL: fres:
234; CHECK-PWR7:       # %bb.0: # %entry
235; CHECK-PWR7-NEXT:    fres 1, 1
236; CHECK-PWR7-NEXT:    blr
237entry:
238  %0 = tail call float @llvm.ppc.fres(float %f)
239  ret float %0
240}
241
242declare float @llvm.ppc.fres(float)
243