xref: /llvm-project/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-load-store-reversed-64bit-only.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2) 
1; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
2; RUN:   -mcpu=pwr8 < %s | FileCheck %s
3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
4; RUN:   -mcpu=pwr7 < %s | FileCheck %s
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
6; RUN:   -mcpu=pwr7 < %s | FileCheck %s
7
8@ull = external global i64, align 8
9@ull_addr = external global ptr, align 8
10
11define dso_local void @test_builtin_ppc_store8r() {
12; CHECK-LABEL: test_builtin_ppc_store8r:
13; CHECK:         stdbrx 3, 0, 4
14; CHECK-NEXT:    blr
15;
16entry:
17  %0 = load i64, ptr @ull, align 8
18  %1 = load ptr, ptr @ull_addr, align 8
19  call void @llvm.ppc.store8r(i64 %0, ptr %1)
20  ret void
21}
22
23declare void @llvm.ppc.store8r(i64, ptr)
24
25define dso_local i64 @test_builtin_ppc_load8r() {
26; CHECK-LABEL: test_builtin_ppc_load8r:
27; CHECK:         ldbrx 3, 0, 3
28; CHECK-NEXT:    blr
29entry:
30  %0 = load ptr, ptr @ull_addr, align 8
31  %1 = call i64 @llvm.ppc.load8r(ptr %0)
32  ret i64 %1
33}
34
35declare i64 @llvm.ppc.load8r(ptr)
36