xref: /llvm-project/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fnabs.ll (revision c35ca3a1c78f693b749ad11742350b7fc6c5cd89)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -mcpu=pwr8 < %s | \
4; RUN: FileCheck %s --check-prefix=CHECK-DEFAULT
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix -mcpu=pwr8 \
6; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
7; RUN:   --check-prefix=CHECK-DEFAULT
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix -mcpu=pwr7 \
9; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
10; RUN:   --check-prefix=CHECK-DEFAULT
11; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix -mcpu=pwr7 \
12; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
13; RUN:   --check-prefix=CHECK-DEFAULT
14; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix -mcpu=pwr6 \
15; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -mattr=+vsx < %s | \
16; RUN: FileCheck %s --check-prefix=CHECK-DEFAULT
17
18; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
19; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -mcpu=pwr6 < %s | \
20; RUN: FileCheck %s --check-prefix=CHECK-NOVSX
21; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
22; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -mcpu=pwr6 < %s | \
23; RUN: FileCheck %s --check-prefix=CHECK-NOVSX
24; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
25; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -mcpu=pwr8 \
26; RUN:   -mattr=-vsx < %s | FileCheck %s --check-prefix=CHECK-NOVSX
27; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
28; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -mcpu=pwr8 \
29; RUN:   -mattr=-vsx < %s | FileCheck %s --check-prefix=CHECK-NOVSX
30
31declare double @llvm.ppc.fnabs(double)
32declare float @llvm.ppc.fnabss(float)
33
34define double @test_fnabs2(double %d) {
35; CHECK-DEFAULT-LABEL: test_fnabs2:
36; CHECK-DEFAULT:       # %bb.0: # %entry
37; CHECK-DEFAULT-NEXT:    xsnabsdp f1, f1
38; CHECK-DEFAULT-NEXT:    blr
39;
40; CHECK-NOVSX-LABEL: test_fnabs2:
41; CHECK-NOVSX:       # %bb.0: # %entry
42; CHECK-NOVSX-NEXT:    fnabs f1, f1
43; CHECK-NOVSX-NEXT:    blr
44entry:
45  %0 = tail call double @llvm.ppc.fnabs(double %d)
46  ret double %0
47}
48
49define float @test_fnabss(float %f) {
50; CHECK-DEFAULT-LABEL: test_fnabss:
51; CHECK-DEFAULT:       # %bb.0: # %entry
52; CHECK-DEFAULT-NEXT:    xsnabsdp f1, f1
53; CHECK-DEFAULT-NEXT:    blr
54;
55; CHECK-NOVSX-LABEL: test_fnabss:
56; CHECK-NOVSX:       # %bb.0: # %entry
57; CHECK-NOVSX-NEXT:    fnabs f1, f1
58; CHECK-NOVSX-NEXT:    blr
59entry:
60  %0 = tail call float @llvm.ppc.fnabss(float %f)
61  ret float %0
62}
63
64