1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \ 3; RUN: --ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s 4 5define i64 @test_cmpb(i64 %a, i64 %b) { 6; CHECK-LABEL: test_cmpb: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: cmpb r4, r4, r6 9; CHECK-NEXT: cmpb r3, r3, r5 10; CHECK-NEXT: blr 11entry: 12 %0 = trunc i64 %a to i32 13 %1 = trunc i64 %b to i32 14 %2 = lshr i64 %a, 32 15 %3 = trunc i64 %2 to i32 16 %4 = lshr i64 %b, 32 17 %5 = trunc i64 %4 to i32 18 %cmpb = tail call i32 @llvm.ppc.cmpb.i32.i32.i32(i32 %0, i32 %1) 19 %6 = zext i32 %cmpb to i64 20 %cmpb1 = tail call i32 @llvm.ppc.cmpb.i32.i32.i32(i32 %3, i32 %5) 21 %7 = zext i32 %cmpb1 to i64 22 %8 = shl nuw i64 %7, 32 23 %9 = or i64 %8, %6 24 ret i64 %9 25} 26 27declare i32 @llvm.ppc.cmpb.i32.i32.i32(i32, i32) 28