1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 5; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK 6; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \ 7; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-AIX 8 9; Function Attrs: nounwind uwtable 10define dso_local signext i32 @main() local_unnamed_addr { 11; CHECK-LABEL: main: 12; CHECK: # %bb.0: # %entry 13; CHECK-NEXT: li 3, -1 14; CHECK-NEXT: li 4, 0 15; CHECK-NEXT: std 3, -8(1) 16; CHECK-NEXT: addi 3, 1, -8 17; CHECK-NEXT: .p2align 4 18; CHECK-NEXT: .LBB0_1: # %do.body 19; CHECK-NEXT: # 20; CHECK-NEXT: #APP 21; CHECK-NEXT: ldarx 5, 0, 3 22; CHECK-NEXT: #NO_APP 23; CHECK-NEXT: stdcx. 4, 0, 3 24; CHECK-NEXT: bne 0, .LBB0_1 25; CHECK-NEXT: # %bb.2: # %do.end 26; CHECK-NEXT: ld 3, -8(1) 27; CHECK-NEXT: li 4, 55 28; CHECK-NEXT: cmpldi 3, 0 29; CHECK-NEXT: li 3, 66 30; CHECK-NEXT: iseleq 3, 4, 3 31; CHECK-NEXT: blr 32; 33; CHECK-AIX-LABEL: main: 34; CHECK-AIX: # %bb.0: # %entry 35; CHECK-AIX-NEXT: li 3, -1 36; CHECK-AIX-NEXT: li 4, 0 37; CHECK-AIX-NEXT: std 3, -8(1) 38; CHECK-AIX-NEXT: addi 3, 1, -8 39; CHECK-AIX-NEXT: .align 4 40; CHECK-AIX-NEXT: L..BB0_1: # %do.body 41; CHECK-AIX-NEXT: # 42; CHECK-AIX-NEXT: #APP 43; CHECK-AIX-NEXT: ldarx 5, 0, 3 44; CHECK-AIX-NEXT: #NO_APP 45; CHECK-AIX-NEXT: stdcx. 4, 0, 3 46; CHECK-AIX-NEXT: bne 0, L..BB0_1 47; CHECK-AIX-NEXT: # %bb.2: # %do.end 48; CHECK-AIX-NEXT: ld 3, -8(1) 49; CHECK-AIX-NEXT: li 4, 55 50; CHECK-AIX-NEXT: cmpldi 3, 0 51; CHECK-AIX-NEXT: li 3, 66 52; CHECK-AIX-NEXT: iseleq 3, 4, 3 53; CHECK-AIX-NEXT: blr 54entry: 55 %x64 = alloca i64, align 8 56 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %x64) 57 store i64 -1, ptr %x64, align 8 58 br label %do.body 59 60do.body: ; preds = %do.body, %entry 61 %0 = call i64 asm sideeffect "ldarx $0, ${1:y}", "=r,*Z,~{memory}"(ptr elementtype(i64) nonnull %x64) 62 %1 = call i32 @llvm.ppc.stdcx(ptr nonnull %x64, i64 0) 63 %tobool.not = icmp eq i32 %1, 0 64 br i1 %tobool.not, label %do.body, label %do.end 65 66do.end: ; preds = %do.body 67 %2 = load i64, ptr %x64, align 8 68 %cmp = icmp eq i64 %2, 0 69 %. = select i1 %cmp, i32 55, i32 66 70 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %x64) 71 ret i32 %. 72} 73 74; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn 75declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) 76 77; Function Attrs: nounwind writeonly 78declare i32 @llvm.ppc.stdcx(ptr, i64) 79 80; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn 81declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) 82