1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -verify-machineinstrs -mtriple powerpc64le -mcpu=pwr9 | FileCheck %s 3; RUN: llc < %s -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -vec-extabi -mcpu=pwr9 | FileCheck %s 4; RUN: opt < %s -passes="default<O3>" -S -mtriple powerpc64le -mcpu=pwr9 | FileCheck %s --check-prefix=OPT 5 6define i64 @raw() { 7; CHECK-LABEL: raw: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: darn 3, 2 10; CHECK-NEXT: blr 11entry: 12 %0 = call i64 @llvm.ppc.darnraw() 13 ret i64 %0 14} 15 16define i64 @conditioned() { 17; CHECK-LABEL: conditioned: 18; CHECK: # %bb.0: # %entry 19; CHECK-NEXT: darn 3, 1 20; CHECK-NEXT: blr 21entry: 22 %0 = call i64 @llvm.ppc.darn() 23 ret i64 %0 24} 25 26define signext i32 @word() { 27; CHECK-LABEL: word: 28; CHECK: # %bb.0: # %entry 29; CHECK-NEXT: darn 3, 0 30; CHECK-NEXT: extsw 3, 3 31; CHECK-NEXT: blr 32entry: 33 %0 = call i32 @llvm.ppc.darn32() 34 ret i32 %0 35} 36 37define i64 @darn_side_effect() { 38; CHECK-LABEL: darn_side_effect: 39; CHECK: # %bb.0: # %entry 40; CHECK-NEXT: darn 3, 2 41; CHECK-NEXT: darn 3, 1 42; CHECK-NEXT: blr 43 44; OPT-LABEL: @darn_side_effect 45; OPT: call i64 @llvm.ppc.darnraw() 46; OPT-NEXT: call i64 @llvm.ppc.darn() 47entry: 48 %0 = call i64 @llvm.ppc.darnraw() 49 %1 = call i64 @llvm.ppc.darn() 50 ret i64 %1 51} 52 53define void @darn_loop(ptr noundef %darn) { 54; OPT-LABEL: @darn_loop 55; OPT-COUNT-32: tail call i64 @llvm.ppc.darn() 56entry: 57 %inc = alloca i32, align 4 58 store i32 0, ptr %inc, align 4 59 br label %cond 60 61cond: 62 %0 = load i32, ptr %inc, align 4 63 %cmp = icmp ne i32 %0, 32 64 br i1 %cmp, label %body, label %end_loop 65 66body: 67 %1 = call i64 @llvm.ppc.darn() 68 %2 = load i32, ptr %inc, align 4 69 %idx = getelementptr inbounds i64, ptr %darn, i32 %2 70 store i64 %1, ptr %idx, align 8 71 br label %incr 72 73incr: 74 %3 = load i32, ptr %inc, align 4 75 %ninc = add nsw i32 %3, 1 76 store i32 %ninc, ptr %inc, align 4 77 br label %cond 78 79end_loop: 80 ret void 81} 82 83declare i64 @llvm.ppc.darn() 84declare i64 @llvm.ppc.darnraw() 85declare i32 @llvm.ppc.darn32() 86