xref: /llvm-project/llvm/test/CodeGen/PowerPC/builtins-bcd-assist.ll (revision 64510c1411aff754e1b92659987846aba3a14d53)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux \
3; RUN:   --ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
5; RUN:   --ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s
6; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
7; RUN:   --ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-AIX32
8
9define dso_local i64 @cdtbcd_test(i64 noundef %ll) {
10; CHECK-LABEL: cdtbcd_test:
11; CHECK:       # %bb.0: # %entry
12; CHECK-NEXT:    cdtbcd r3, r3
13; CHECK-NEXT:    clrldi r3, r3, 32
14; CHECK-NEXT:    blr
15; CHECK-AIX32-LABEL: cdtbcd_test:
16; CHECK-AIX32:       # %bb.0: # %entry
17; CHECK-AIX32-NEXT:    li r3, 0
18; CHECK-AIX32-NEXT:    cdtbcd r4, r4
19; CHECK-AIX32-NEXT:    blr
20entry:
21  %conv = trunc i64 %ll to i32
22  %0 = tail call i32 @llvm.ppc.cdtbcd(i32 %conv)
23  %conv1 = zext i32 %0 to i64
24  ret i64 %conv1
25}
26
27define dso_local zeroext i32 @cdtbcd_test_ui(i32 noundef zeroext %ui) {
28; CHECK-LABEL: cdtbcd_test_ui:
29; CHECK:       # %bb.0: # %entry
30; CHECK-NEXT:    cdtbcd r3, r3
31; CHECK-NEXT:    clrldi r3, r3, 32
32; CHECK-NEXT:    blr
33; CHECK-AIX32-LABEL: cdtbcd_test_ui:
34; CHECK-AIX32:       # %bb.0: # %entry
35; CHECK-AIX32-NEXT:    cdtbcd r3, r3
36; CHECK-AIX32-NEXT:    blr
37entry:
38  %0 = tail call i32 @llvm.ppc.cdtbcd(i32 %ui)
39  ret i32 %0
40}
41
42define dso_local i64 @cbcdtd_test(i64 noundef %ll) {
43; CHECK-LABEL: cbcdtd_test:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    cbcdtd r3, r3
46; CHECK-NEXT:    clrldi r3, r3, 32
47; CHECK-NEXT:    blr
48; CHECK-AIX32-LABEL: cbcdtd_test:
49; CHECK-AIX32:       # %bb.0: # %entry
50; CHECK-AIX32-NEXT:    li r3, 0
51; CHECK-AIX32-NEXT:    cbcdtd r4, r4
52; CHECK-AIX32-NEXT:    blr
53entry:
54  %conv = trunc i64 %ll to i32
55  %0 = tail call i32@llvm.ppc.cbcdtd(i32 %conv)
56  %conv1 = zext i32 %0 to i64
57  ret i64 %conv1
58}
59
60define dso_local zeroext i32 @cbcdtd_test_ui(i32 noundef zeroext %ui) {
61; CHECK-LABEL: cbcdtd_test_ui:
62; CHECK:       # %bb.0: # %entry
63; CHECK-NEXT:    cbcdtd r3, r3
64; CHECK-NEXT:    clrldi r3, r3, 32
65; CHECK-NEXT:    blr
66; CHECK-AIX32-LABEL: cbcdtd_test_ui:
67; CHECK-AIX32:       # %bb.0: # %entry
68; CHECK-AIX32-NEXT:    cbcdtd r3, r3
69; CHECK-AIX32-NEXT:    blr
70entry:
71  %0 = tail call i32 @llvm.ppc.cbcdtd(i32 %ui)
72  ret i32 %0
73}
74
75define dso_local i64 @addg6s_test(i64 noundef %ll, i64 noundef %ll2) {
76; CHECK-LABEL: addg6s_test:
77; CHECK:       bb.0: # %entry
78; CHECK-NEXT:    addg6s r3, r3, r4
79; CHECK-NEXT:    clrldi r3, r3, 32
80; CHECK-NEXT:    blr
81; CHECK-AIX32-LABEL: addg6s_test:
82; CHECK-AIX32:       # %bb.0: # %entry
83; CHECK-AIX32-NEXT:    li r3, 0
84; CHECK-AIX32-NEXT:    addg6s r4, r4, r6
85; CHECK-AIX32-NEXT:    blr
86entry:
87  %conv = trunc i64 %ll to i32
88  %conv1 = trunc i64 %ll2 to i32
89  %0 = tail call i32 @llvm.ppc.addg6s(i32 %conv, i32 %conv1)
90  %conv2 = zext i32 %0 to i64
91  ret i64 %conv2
92}
93
94define dso_local zeroext i32 @addg6s_test_ui(i32 noundef zeroext %ui, i32 noundef zeroext %ui2) {
95; CHECK-LABEL: addg6s_test_ui:
96; CHECK:       # %bb.0: # %entry
97; CHECK-NEXT:    addg6s r3, r3, r4
98; CHECK-NEXT:    clrldi r3, r3, 32
99; CHECK-NEXT:    blr
100; CHECK-AIX32-LABEL: addg6s_test_ui:
101; CHECK-AIX32:       # %bb.0: # %entry
102; CHECK-AIX32-NEXT:    addg6s r3, r3, r4
103; CHECK-AIX32-NEXT:    blr
104entry:
105  %0 = tail call i32 @llvm.ppc.addg6s(i32 %ui, i32 %ui2)
106  ret i32 %0
107}
108
109declare i32 @llvm.ppc.cdtbcd(i32)
110declare i32 @llvm.ppc.cbcdtd(i32)
111declare i32 @llvm.ppc.addg6s(i32, i32)
112