xref: /llvm-project/llvm/test/CodeGen/PowerPC/bswap64.ll (revision 2d9890775f523a7a7ed2d7d064273bf7e28ebf20)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown \
3; RUN:   -mcpu=pwr9 | FileCheck %s
4; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff \
5; RUN:   -mcpu=pwr9 -vec-extabi | FileCheck %s
6; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown \
7; RUN:   -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefix=NO-ALTIVEC
8; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff \
9; RUN:   -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefix=NO-ALTIVEC
10
11declare i64 @llvm.bswap.i64(i64)
12
13define i64 @bswap64(i64 %x) {
14; CHECK-LABEL: bswap64:
15; CHECK:       # %bb.0: # %entry
16; CHECK-NEXT:    mtvsrdd 34, 3, 3
17; CHECK-NEXT:    xxbrd 0, 34
18; CHECK-NEXT:    mffprd 3, 0
19; CHECK-NEXT:    blr
20;
21; NO-ALTIVEC-LABEL: bswap64:
22; NO-ALTIVEC:       # %bb.0: # %entry
23; NO-ALTIVEC-NEXT:    rotldi 5, 3, 16
24; NO-ALTIVEC-NEXT:    rotldi 4, 3, 8
25; NO-ALTIVEC-NEXT:    rldimi 4, 5, 8, 48
26; NO-ALTIVEC-NEXT:    rotldi 5, 3, 24
27; NO-ALTIVEC-NEXT:    rldimi 4, 5, 16, 40
28; NO-ALTIVEC-NEXT:    rotldi 5, 3, 32
29; NO-ALTIVEC-NEXT:    rldimi 4, 5, 24, 32
30; NO-ALTIVEC-NEXT:    rotldi 5, 3, 48
31; NO-ALTIVEC-NEXT:    rldimi 4, 5, 40, 16
32; NO-ALTIVEC-NEXT:    rotldi 5, 3, 56
33; NO-ALTIVEC-NEXT:    rldimi 4, 5, 48, 8
34; NO-ALTIVEC-NEXT:    rldimi 4, 3, 56, 0
35; NO-ALTIVEC-NEXT:    mr 3, 4
36; NO-ALTIVEC-NEXT:    blr
37entry:
38  %0 = call i64 @llvm.bswap.i64(i64 %x)
39  ret i64 %0
40}
41
42