1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=ppc32 | FileCheck %s --check-prefixes=X32 3; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=pwr7 | FileCheck %s --check-prefixes=X32,PWR7_32 4; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs < %s -mtriple=powerpc64-- -mcpu=ppc64 | FileCheck %s --check-prefixes=X64 5; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs < %s -mtriple=powerpc64-- -mcpu=pwr7 | FileCheck %s --check-prefixes=PWR7_64 6; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs < %s -mtriple=powerpc64-- -mcpu=a2 | FileCheck %s --check-prefixes=A2_64 7 8 9define void @STWBRX(i32 %i, ptr %ptr, i32 %off) { 10; X32-LABEL: STWBRX: 11; X32: # %bb.0: 12; X32-NEXT: stwbrx r3, r4, r5 13; X32-NEXT: blr 14; 15; X64-LABEL: STWBRX: 16; X64: # %bb.0: 17; X64-NEXT: extsw r5, r5 18; X64-NEXT: stwbrx r3, r4, r5 19; X64-NEXT: blr 20; 21; PWR7_64-LABEL: STWBRX: 22; PWR7_64: # %bb.0: 23; PWR7_64-NEXT: extsw r5, r5 24; PWR7_64-NEXT: stwbrx r3, r4, r5 25; PWR7_64-NEXT: blr 26; 27; A2_64-LABEL: STWBRX: 28; A2_64: # %bb.0: 29; A2_64-NEXT: extsw r5, r5 30; A2_64-NEXT: stwbrx r3, r4, r5 31; A2_64-NEXT: blr 32 %tmp1 = getelementptr i8, ptr %ptr, i32 %off 33 %tmp13 = tail call i32 @llvm.bswap.i32( i32 %i ) 34 store i32 %tmp13, ptr %tmp1 35 ret void 36} 37 38define i32 @LWBRX(ptr %ptr, i32 %off) { 39; X32-LABEL: LWBRX: 40; X32: # %bb.0: 41; X32-NEXT: lwbrx r3, r3, r4 42; X32-NEXT: blr 43; 44; X64-LABEL: LWBRX: 45; X64: # %bb.0: 46; X64-NEXT: extsw r4, r4 47; X64-NEXT: lwbrx r3, r3, r4 48; X64-NEXT: blr 49; 50; PWR7_64-LABEL: LWBRX: 51; PWR7_64: # %bb.0: 52; PWR7_64-NEXT: extsw r4, r4 53; PWR7_64-NEXT: lwbrx r3, r3, r4 54; PWR7_64-NEXT: blr 55; 56; A2_64-LABEL: LWBRX: 57; A2_64: # %bb.0: 58; A2_64-NEXT: extsw r4, r4 59; A2_64-NEXT: lwbrx r3, r3, r4 60; A2_64-NEXT: blr 61 %tmp1 = getelementptr i8, ptr %ptr, i32 %off 62 %tmp = load i32, ptr %tmp1 63 %tmp14 = tail call i32 @llvm.bswap.i32( i32 %tmp ) 64 ret i32 %tmp14 65} 66 67define void @STHBRX(i16 %s, ptr %ptr, i32 %off) { 68; X32-LABEL: STHBRX: 69; X32: # %bb.0: 70; X32-NEXT: sthbrx r3, r4, r5 71; X32-NEXT: blr 72; 73; X64-LABEL: STHBRX: 74; X64: # %bb.0: 75; X64-NEXT: extsw r5, r5 76; X64-NEXT: sthbrx r3, r4, r5 77; X64-NEXT: blr 78; 79; PWR7_64-LABEL: STHBRX: 80; PWR7_64: # %bb.0: 81; PWR7_64-NEXT: extsw r5, r5 82; PWR7_64-NEXT: sthbrx r3, r4, r5 83; PWR7_64-NEXT: blr 84; 85; A2_64-LABEL: STHBRX: 86; A2_64: # %bb.0: 87; A2_64-NEXT: extsw r5, r5 88; A2_64-NEXT: sthbrx r3, r4, r5 89; A2_64-NEXT: blr 90 %tmp1 = getelementptr i8, ptr %ptr, i32 %off 91 %tmp5 = call i16 @llvm.bswap.i16( i16 %s ) 92 store i16 %tmp5, ptr %tmp1 93 ret void 94} 95 96define i16 @LHBRX(ptr %ptr, i32 %off) { 97; X32-LABEL: LHBRX: 98; X32: # %bb.0: 99; X32-NEXT: lhbrx r3, r3, r4 100; X32-NEXT: blr 101; 102; X64-LABEL: LHBRX: 103; X64: # %bb.0: 104; X64-NEXT: extsw r4, r4 105; X64-NEXT: lhbrx r3, r3, r4 106; X64-NEXT: blr 107; 108; PWR7_64-LABEL: LHBRX: 109; PWR7_64: # %bb.0: 110; PWR7_64-NEXT: extsw r4, r4 111; PWR7_64-NEXT: lhbrx r3, r3, r4 112; PWR7_64-NEXT: blr 113; 114; A2_64-LABEL: LHBRX: 115; A2_64: # %bb.0: 116; A2_64-NEXT: extsw r4, r4 117; A2_64-NEXT: lhbrx r3, r3, r4 118; A2_64-NEXT: blr 119 %tmp1 = getelementptr i8, ptr %ptr, i32 %off 120 %tmp = load i16, ptr %tmp1 121 %tmp6 = call i16 @llvm.bswap.i16( i16 %tmp ) 122 ret i16 %tmp6 123} 124 125; TODO: combine the bswap feeding a store on subtargets 126; that do not have an STDBRX. 127define void @STDBRX(i64 %i, ptr %ptr, i64 %off) { 128; PWR7_32-LABEL: STDBRX: 129; PWR7_32: # %bb.0: 130; PWR7_32-NEXT: add r6, r5, r8 131; PWR7_32-NEXT: stwbrx r4, r5, r8 132; PWR7_32-NEXT: li r4, 4 133; PWR7_32-NEXT: stwbrx r3, r6, r4 134; PWR7_32-NEXT: blr 135; 136; X64-LABEL: STDBRX: 137; X64: # %bb.0: 138; X64-NEXT: rotldi r6, r3, 16 139; X64-NEXT: rotldi r7, r3, 8 140; X64-NEXT: rldimi r7, r6, 8, 48 141; X64-NEXT: rotldi r6, r3, 24 142; X64-NEXT: rldimi r7, r6, 16, 40 143; X64-NEXT: rotldi r6, r3, 32 144; X64-NEXT: rldimi r7, r6, 24, 32 145; X64-NEXT: rotldi r6, r3, 48 146; X64-NEXT: rldimi r7, r6, 40, 16 147; X64-NEXT: rotldi r6, r3, 56 148; X64-NEXT: rldimi r7, r6, 48, 8 149; X64-NEXT: rldimi r7, r3, 56, 0 150; X64-NEXT: stdx r7, r4, r5 151; X64-NEXT: blr 152; 153; PWR7_64-LABEL: STDBRX: 154; PWR7_64: # %bb.0: 155; PWR7_64-NEXT: stdbrx r3, r4, r5 156; PWR7_64-NEXT: blr 157; 158; A2_64-LABEL: STDBRX: 159; A2_64: # %bb.0: 160; A2_64-NEXT: stdbrx r3, r4, r5 161; A2_64-NEXT: blr 162 %tmp1 = getelementptr i8, ptr %ptr, i64 %off 163 %tmp13 = tail call i64 @llvm.bswap.i64( i64 %i ) 164 store i64 %tmp13, ptr %tmp1 165 ret void 166} 167 168define i64 @LDBRX(ptr %ptr, i64 %off) { 169; PWR7_32-LABEL: LDBRX: 170; PWR7_32: # %bb.0: 171; PWR7_32-NEXT: add r5, r3, r6 172; PWR7_32-NEXT: lwbrx r4, r3, r6 173; PWR7_32-NEXT: li r3, 4 174; PWR7_32-NEXT: lwbrx r3, r5, r3 175; PWR7_32-NEXT: blr 176; 177; X64-LABEL: LDBRX: 178; X64: # %bb.0: 179; X64-NEXT: li r6, 4 180; X64-NEXT: lwbrx r5, r3, r4 181; X64-NEXT: add r3, r3, r4 182; X64-NEXT: lwbrx r3, r3, r6 183; X64-NEXT: rldimi r5, r3, 32, 0 184; X64-NEXT: mr r3, r5 185; X64-NEXT: blr 186; 187; PWR7_64-LABEL: LDBRX: 188; PWR7_64: # %bb.0: 189; PWR7_64-NEXT: ldbrx r3, r3, r4 190; PWR7_64-NEXT: blr 191; 192; A2_64-LABEL: LDBRX: 193; A2_64: # %bb.0: 194; A2_64-NEXT: ldbrx r3, r3, r4 195; A2_64-NEXT: blr 196 %tmp1 = getelementptr i8, ptr %ptr, i64 %off 197 %tmp = load i64, ptr %tmp1 198 %tmp14 = tail call i64 @llvm.bswap.i64( i64 %tmp ) 199 ret i64 %tmp14 200} 201 202declare i16 @llvm.bswap.i16(i16) 203declare i32 @llvm.bswap.i32(i32) 204declare i64 @llvm.bswap.i64(i64) 205