1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \ 4; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 6; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names \ 7; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-P9 8 9define dso_local i64 @test_invalid(<16 x i8> %a) local_unnamed_addr #0 { 10; CHECK-LABEL: test_invalid: 11; CHECK: # %bb.0: # %entry 12; CHECK-NEXT: bcdsub. v2, v2, v2, 0 13; CHECK-NEXT: setbc r3, 4*cr6+un 14; CHECK-NEXT: blr 15; 16; CHECK-P9-LABEL: test_invalid: 17; CHECK-P9: # %bb.0: # %entry 18; CHECK-P9-NEXT: bcdsub. v2, v2, v2, 0 19; CHECK-P9-NEXT: mfocrf r3, 2 20; CHECK-P9-NEXT: rlwinm r3, r3, 28, 31, 31 21; CHECK-P9-NEXT: blr 22entry: 23 %0 = tail call i32 @llvm.ppc.bcdsub.p(i32 6, <16 x i8> %a, <16 x i8> %a) #2 24 %conv.i = sext i32 %0 to i64 25 ret i64 %conv.i 26} 27 28define dso_local <16 x i8> @test_add(<16 x i8> %a, <16 x i8> %b, i64 %ps) local_unnamed_addr #0 { 29; CHECK-LABEL: test_add: 30; CHECK: # %bb.0: # %entry 31; CHECK-NEXT: bcdadd. v2, v2, v3, 1 32; CHECK-NEXT: blr 33; 34; CHECK-P9-LABEL: test_add: 35; CHECK-P9: # %bb.0: # %entry 36; CHECK-P9-NEXT: bcdadd. v2, v2, v3, 1 37; CHECK-P9-NEXT: blr 38entry: 39 %0 = tail call <16 x i8> @llvm.ppc.bcdadd(<16 x i8> %a, <16 x i8> %b, i32 1) 40 ret <16 x i8> %0 41} 42 43define dso_local i64 @test_add_ofl(<16 x i8> %a, <16 x i8> %b, i64 %ps) local_unnamed_addr #0 { 44; CHECK-LABEL: test_add_ofl: 45; CHECK: # %bb.0: # %entry 46; CHECK-NEXT: bcdadd. v2, v2, v3, 0 47; CHECK-NEXT: setbc r3, 4*cr6+un 48; CHECK-NEXT: blr 49; 50; CHECK-P9-LABEL: test_add_ofl: 51; CHECK-P9: # %bb.0: # %entry 52; CHECK-P9-NEXT: bcdadd. v2, v2, v3, 0 53; CHECK-P9-NEXT: mfocrf r3, 2 54; CHECK-P9-NEXT: rlwinm r3, r3, 28, 31, 31 55; CHECK-P9-NEXT: blr 56entry: 57 %0 = tail call i32 @llvm.ppc.bcdadd.p(i32 6, <16 x i8> %a, <16 x i8> %b) #2 58 %conv.i = sext i32 %0 to i64 59 ret i64 %conv.i 60} 61 62define dso_local <16 x i8> @test_sub(<16 x i8> %a, <16 x i8> %b, i64 %ps) local_unnamed_addr #0 { 63; CHECK-LABEL: test_sub: 64; CHECK: # %bb.0: # %entry 65; CHECK-NEXT: bcdsub. v2, v2, v3, 0 66; CHECK-NEXT: blr 67; 68; CHECK-P9-LABEL: test_sub: 69; CHECK-P9: # %bb.0: # %entry 70; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0 71; CHECK-P9-NEXT: blr 72entry: 73 %0 = tail call <16 x i8> @llvm.ppc.bcdsub(<16 x i8> %a, <16 x i8> %b, i32 0) 74 ret <16 x i8> %0 75} 76 77define dso_local i64 @test_sub_ofl(<16 x i8> %a, <16 x i8> %b, i64 %ps) local_unnamed_addr #0 { 78; CHECK-LABEL: test_sub_ofl: 79; CHECK: # %bb.0: # %entry 80; CHECK-NEXT: bcdsub. v2, v2, v3, 0 81; CHECK-NEXT: setbc r3, 4*cr6+un 82; CHECK-NEXT: blr 83; 84; CHECK-P9-LABEL: test_sub_ofl: 85; CHECK-P9: # %bb.0: # %entry 86; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0 87; CHECK-P9-NEXT: mfocrf r3, 2 88; CHECK-P9-NEXT: rlwinm r3, r3, 28, 31, 31 89; CHECK-P9-NEXT: blr 90entry: 91 %0 = tail call i32 @llvm.ppc.bcdsub.p(i32 6, <16 x i8> %a, <16 x i8> %b) #2 92 %conv.i = sext i32 %0 to i64 93 ret i64 %conv.i 94} 95 96define dso_local i64 @test_cmplt(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 97; CHECK-LABEL: test_cmplt: 98; CHECK: # %bb.0: # %entry 99; CHECK-NEXT: bcdsub. v2, v2, v3, 0 100; CHECK-NEXT: setbc r3, 4*cr6+lt 101; CHECK-NEXT: blr 102; 103; CHECK-P9-LABEL: test_cmplt: 104; CHECK-P9: # %bb.0: # %entry 105; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0 106; CHECK-P9-NEXT: mfocrf r3, 2 107; CHECK-P9-NEXT: rlwinm r3, r3, 25, 31, 31 108; CHECK-P9-NEXT: blr 109entry: 110 %0 = tail call i32 @llvm.ppc.bcdsub.p(i32 2, <16 x i8> %a, <16 x i8> %b) #2 111 %conv.i = sext i32 %0 to i64 112 ret i64 %conv.i 113} 114 115define dso_local i64 @test_cmpgt(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 116; CHECK-LABEL: test_cmpgt: 117; CHECK: # %bb.0: # %entry 118; CHECK-NEXT: bcdsub. v2, v2, v3, 0 119; CHECK-NEXT: setbc r3, 4*cr6+gt 120; CHECK-NEXT: blr 121; 122; CHECK-P9-LABEL: test_cmpgt: 123; CHECK-P9: # %bb.0: # %entry 124; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0 125; CHECK-P9-NEXT: mfocrf r3, 2 126; CHECK-P9-NEXT: rlwinm r3, r3, 26, 31, 31 127; CHECK-P9-NEXT: blr 128entry: 129 %0 = tail call i32 @llvm.ppc.bcdsub.p(i32 4, <16 x i8> %a, <16 x i8> %b) #2 130 %conv.i = sext i32 %0 to i64 131 ret i64 %conv.i 132} 133 134define dso_local i64 @test_cmpeq(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 135; CHECK-LABEL: test_cmpeq: 136; CHECK: # %bb.0: # %entry 137; CHECK-NEXT: bcdsub. v2, v2, v3, 0 138; CHECK-NEXT: setbc r3, 4*cr6+eq 139; CHECK-NEXT: blr 140; 141; CHECK-P9-LABEL: test_cmpeq: 142; CHECK-P9: # %bb.0: # %entry 143; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0 144; CHECK-P9-NEXT: mfocrf r3, 2 145; CHECK-P9-NEXT: rlwinm r3, r3, 27, 31, 31 146; CHECK-P9-NEXT: blr 147entry: 148 %0 = tail call i32 @llvm.ppc.bcdsub.p(i32 0, <16 x i8> %a, <16 x i8> %b) #2 149 %conv.i = sext i32 %0 to i64 150 ret i64 %conv.i 151} 152 153define dso_local i64 @test_cmpge(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 154; CHECK-LABEL: test_cmpge: 155; CHECK: # %bb.0: # %entry 156; CHECK-NEXT: bcdsub. v2, v2, v3, 0 157; CHECK-NEXT: setbcr r3, 4*cr6+lt 158; CHECK-NEXT: blr 159; 160; CHECK-P9-LABEL: test_cmpge: 161; CHECK-P9: # %bb.0: # %entry 162; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0 163; CHECK-P9-NEXT: mfocrf r3, 2 164; CHECK-P9-NEXT: rlwinm r3, r3, 25, 31, 31 165; CHECK-P9-NEXT: xori r3, r3, 1 166; CHECK-P9-NEXT: blr 167entry: 168 %0 = tail call i32 @llvm.ppc.bcdsub.p(i32 3, <16 x i8> %a, <16 x i8> %b) #2 169 %conv.i = sext i32 %0 to i64 170 ret i64 %conv.i 171} 172 173define dso_local i64 @test_cmple(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { 174; CHECK-LABEL: test_cmple: 175; CHECK: # %bb.0: # %entry 176; CHECK-NEXT: bcdsub. v2, v2, v3, 0 177; CHECK-NEXT: setbcr r3, 4*cr6+gt 178; CHECK-NEXT: blr 179; 180; CHECK-P9-LABEL: test_cmple: 181; CHECK-P9: # %bb.0: # %entry 182; CHECK-P9-NEXT: bcdsub. v2, v2, v3, 0 183; CHECK-P9-NEXT: mfocrf r3, 2 184; CHECK-P9-NEXT: rlwinm r3, r3, 26, 31, 31 185; CHECK-P9-NEXT: xori r3, r3, 1 186; CHECK-P9-NEXT: blr 187entry: 188 %0 = tail call i32 @llvm.ppc.bcdsub.p(i32 5, <16 x i8> %a, <16 x i8> %b) #2 189 %conv.i = sext i32 %0 to i64 190 ret i64 %conv.i 191} 192 193declare i32 @llvm.ppc.bcdsub.p(i32 immarg, <16 x i8>, <16 x i8>) #1 194declare i32 @llvm.ppc.bcdadd.p(i32 immarg, <16 x i8>, <16 x i8>) #1 195declare <16 x i8> @llvm.ppc.bcdadd(<16 x i8>, <16 x i8>, i32 immarg) #1 196declare <16 x i8> @llvm.ppc.bcdsub(<16 x i8>, <16 x i8>, i32 immarg) #1 197