xref: /llvm-project/llvm/test/CodeGen/PowerPC/atomic-2.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; RUN: llc -verify-machineinstrs < %s -ppc-asm-full-reg-names -mtriple=ppc64-- | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
2; RUN: llc -verify-machineinstrs < %s -ppc-asm-full-reg-names -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
3; RUN: llc -verify-machineinstrs < %s -ppc-asm-full-reg-names -mtriple=ppc64-- -mcpu=pwr7 | FileCheck %s
4; RUN: llc -verify-machineinstrs < %s -ppc-asm-full-reg-names -mtriple=ppc64-- -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-P8U
5
6define i64 @exchange_and_add(ptr %mem, i64 %val) nounwind {
7; CHECK-LABEL: exchange_and_add:
8; CHECK: ldarx
9  %tmp = atomicrmw add ptr %mem, i64 %val monotonic
10; CHECK: stdcx.
11  ret i64 %tmp
12}
13
14define i8 @exchange_and_add8(ptr %mem, i8 %val) nounwind {
15; CHECK-LABEL: exchange_and_add8:
16; CHECK-BE: xori
17; CHECK-LE-NOT: xori
18; CHECK-P8U: lbarx
19  %tmp = atomicrmw add ptr %mem, i8 %val monotonic
20; CHECK-P8U: stbcx.
21  ret i8 %tmp
22}
23
24define i16 @exchange_and_add16(ptr %mem, i16 %val) nounwind {
25; CHECK-LABEL: exchange_and_add16:
26; CHECK-BE: xori
27; CHECK-LE-NOT: xori
28; CHECK-P8U: lharx
29  %tmp = atomicrmw add ptr %mem, i16 %val monotonic
30; CHECK-P8U: sthcx.
31  ret i16 %tmp
32}
33
34define i64 @exchange_and_cmp(ptr %mem) nounwind {
35; CHECK-LABEL: exchange_and_cmp:
36; CHECK: ldarx
37  %tmppair = cmpxchg ptr %mem, i64 0, i64 1 monotonic monotonic
38  %tmp = extractvalue { i64, i1 } %tmppair, 0
39; CHECK: stdcx.
40  ret i64 %tmp
41}
42
43define i8 @exchange_and_cmp8(ptr %mem) nounwind {
44; CHECK-LABEL: exchange_and_cmp8:
45; CHECK-BE: xori
46; CHECK-LE-NOT: xori
47; CHECK-P8U: lbarx
48  %tmppair = cmpxchg ptr %mem, i8 0, i8 1 monotonic monotonic
49  %tmp = extractvalue { i8, i1 } %tmppair, 0
50; CHECK-P8U: stbcx.
51  ret i8 %tmp
52}
53
54define i16 @exchange_and_cmp16(ptr %mem) nounwind {
55; CHECK-LABEL: exchange_and_cmp16:
56; CHECK-BE: xori
57; CHECK-LE-NOT: xori
58; CHECK-P8U: lharx
59  %tmppair = cmpxchg ptr %mem, i16 0, i16 1 monotonic monotonic
60  %tmp = extractvalue { i16, i1 } %tmppair, 0
61; CHECK-P8U: sthcx.
62  ret i16 %tmp
63}
64
65define i64 @exchange(ptr %mem, i64 %val) nounwind {
66; CHECK-LABEL: exchange:
67; CHECK: ldarx
68  %tmp = atomicrmw xchg ptr %mem, i64 1 monotonic
69; CHECK: stdcx.
70  ret i64 %tmp
71}
72
73define i8 @exchange8(ptr %mem, i8 %val) nounwind {
74; CHECK-LABEL: exchange8:
75; CHECK-BE: xori
76; CHECK-LE-NOT: xori
77; CHECK-P8U: lbarx
78  %tmp = atomicrmw xchg ptr %mem, i8 1 monotonic
79; CHECK-P8U: stbcx.
80  ret i8 %tmp
81}
82
83define i16 @exchange16(ptr %mem, i16 %val) nounwind {
84; CHECK-LABEL: exchange16:
85; CHECK-BE: xori
86; CHECK-LE-NOT: xori
87; CHECK-P8U: lharx
88  %tmp = atomicrmw xchg ptr %mem, i16 1 monotonic
89; CHECK-P8U: sthcx.
90  ret i16 %tmp
91}
92
93define void @atomic_store(ptr %mem, i64 %val) nounwind {
94entry:
95; CHECK: @atomic_store
96  store atomic i64 %val, ptr %mem release, align 64
97; CHECK: lwsync
98; CHECK-NOT: stdcx
99; CHECK: std
100  ret void
101}
102
103define i64 @atomic_load(ptr %mem) nounwind {
104entry:
105; CHECK: @atomic_load
106  %tmp = load atomic i64, ptr %mem acquire, align 64
107; CHECK-NOT: ldarx
108; CHECK: ld [[VAL:r[0-9]+]]
109; CHECK: cmpd [[CR:cr[0-9]+]], [[VAL]], [[VAL]]
110; CHECK: bne- [[CR]], .+4
111; CHECK: isync
112  ret i64 %tmp
113}
114
115