1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \ 3; RUN: -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | \ 4; RUN: FileCheck %s 5 6;; Fixed vector arguments to variadic functions are passed differently than 7;; either arguments to non-variadic functions or arguments passed through 8;; ellipses. 9define double @callee(i32 signext %count, <4 x i32> %vsi, double %next, ...) { 10 ; CHECK-LABEL: name: callee 11 ; CHECK: bb.0.entry: 12 ; CHECK: liveins: $x8, $x9, $x10 13 ; CHECK: [[COPY:%[0-9]+]]:g8rc = COPY $x10 14 ; CHECK: [[COPY1:%[0-9]+]]:g8rc = COPY $x9 15 ; CHECK: [[COPY2:%[0-9]+]]:g8rc = COPY $x8 16 ; CHECK: STD [[COPY2]], 0, %fixed-stack.0 :: (store (s64) into %fixed-stack.0) 17 ; CHECK: STD [[COPY1]], 8, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 8) 18 ; CHECK: STD [[COPY]], 16, %fixed-stack.0 :: (store (s64)) 19 ; CHECK: LIFETIME_START %stack.0.arg_list 20 ; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = ADDI8 %fixed-stack.0, 0 21 ; CHECK: STD killed [[ADDI8_]], 0, %stack.0.arg_list :: (store (s64) into %ir.arg_list) 22 ; CHECK: [[ADDI8_1:%[0-9]+]]:g8rc = ADDI8 %fixed-stack.0, 15 23 ; CHECK: [[RLDICR:%[0-9]+]]:g8rc_and_g8rc_nox0 = RLDICR killed [[ADDI8_1]], 0, 59 24 ; CHECK: [[LFD:%[0-9]+]]:f8rc = LFD 16, killed [[RLDICR]] :: (load (s64) from %ir.argp.next, align 16) 25 ; CHECK: LIFETIME_END %stack.0.arg_list 26 ; CHECK: $f1 = COPY [[LFD]] 27 ; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $f1 28entry: 29 %arg_list = alloca ptr, align 8 30 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %arg_list) 31 call void @llvm.va_start(ptr nonnull %arg_list) 32 %argp.cur = load ptr, ptr %arg_list, align 8 33 %0 = ptrtoint ptr %argp.cur to i64 34 %1 = add i64 %0, 15 35 %2 = and i64 %1, -16 36 %argp.cur.aligned = inttoptr i64 %2 to ptr 37 %argp.next = getelementptr inbounds i8, ptr %argp.cur.aligned, i64 16 38 %argp.next3 = getelementptr inbounds i8, ptr %argp.cur.aligned, i64 24 39 store ptr %argp.next3, ptr %arg_list, align 8 40 %3 = load double, ptr %argp.next, align 16 41 call void @llvm.va_end(ptr nonnull %arg_list) 42 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %arg_list) 43 ret double %3 44} 45 46declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) 47 48declare void @llvm.va_start(ptr) 49 50declare void @llvm.va_end(ptr) 51 52declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) 53