xref: /llvm-project/llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll (revision 53c37f300dd1b450671f2aee4cc649c380adb5ad) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs \
3; RUN:          -mcpu=pwr8 -vec-extabi | FileCheck %s
4
5; The build[csilf] functions simply test the scalar_to_vector handling with
6; direct moves. This corresponds to the "insertelement" instruction. Subsequent
7; to this, there will be a splat corresponding to the shufflevector.
8
9@d = common global double 0.000000e+00, align 8
10
11; Function Attrs: norecurse nounwind readnone
12define <16 x i8> @buildc(i8 zeroext %a) {
13; CHECK-LABEL: buildc:
14; CHECK:       # %bb.0: # %entry
15; CHECK-NEXT:    mtvsrwz 34, 3
16; CHECK-NEXT:    vspltb 2, 2, 7
17; CHECK-NEXT:    blr
18entry:
19  %splat.splatinsert = insertelement <16 x i8> undef, i8 %a, i32 0
20  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer
21  ret <16 x i8> %splat.splat
22}
23
24; Function Attrs: norecurse nounwind readnone
25define <8 x i16> @builds(i16 zeroext %a) {
26; CHECK-LABEL: builds:
27; CHECK:       # %bb.0: # %entry
28; CHECK-NEXT:    sth 3, -16(1)
29; CHECK-NEXT:    addi 3, 1, -16
30; CHECK-NEXT:    lxvw4x 34, 0, 3
31; CHECK-NEXT:    vsplth 2, 2, 0
32; CHECK-NEXT:    blr
33entry:
34  %splat.splatinsert = insertelement <8 x i16> undef, i16 %a, i32 0
35  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer
36  ret <8 x i16> %splat.splat
37}
38
39; Function Attrs: norecurse nounwind readnone
40define <4 x i32> @buildi(i32 zeroext %a) {
41; CHECK-LABEL: buildi:
42; CHECK:       # %bb.0: # %entry
43; CHECK-NEXT:    stw 3, -16(1)
44; CHECK-NEXT:    addi 3, 1, -16
45; CHECK-NEXT:    lxvw4x 0, 0, 3
46; CHECK-NEXT:    xxspltw 34, 0, 0
47; CHECK-NEXT:    blr
48entry:
49  %splat.splatinsert = insertelement <4 x i32> undef, i32 %a, i32 0
50  %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
51  ret <4 x i32> %splat.splat
52}
53
54; Function Attrs: norecurse nounwind readnone
55define <2 x i64> @buildl(i64 %a) {
56; CHECK-LABEL: buildl:
57; CHECK:       # %bb.0: # %entry
58; CHECK-NEXT:    stw 3, -32(1)
59; CHECK-NEXT:    lwz 3, L..C0(2) # %const.0
60; CHECK-NEXT:    stw 4, -16(1)
61; CHECK-NEXT:    lxvw4x 34, 0, 3
62; CHECK-NEXT:    addi 3, 1, -16
63; CHECK-NEXT:    lxvw4x 35, 0, 3
64; CHECK-NEXT:    addi 3, 1, -32
65; CHECK-NEXT:    lxvw4x 36, 0, 3
66; CHECK-NEXT:    vperm 2, 4, 3, 2
67; CHECK-NEXT:    blr
68entry:
69  %splat.splatinsert = insertelement <2 x i64> undef, i64 %a, i32 0
70  %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer
71  ret <2 x i64> %splat.splat
72}
73
74; Function Attrs: norecurse nounwind readnone
75define <4 x float> @buildf(float %a) {
76; CHECK-LABEL: buildf:
77; CHECK:       # %bb.0: # %entry
78; CHECK-NEXT:    xscvdpspn 0, 1
79; CHECK-NEXT:    xxspltw 34, 0, 1
80; CHECK-NEXT:    blr
81entry:
82  %splat.splatinsert = insertelement <4 x float> undef, float %a, i32 0
83  %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer
84  ret <4 x float> %splat.splat
85}
86
87; The optimization to remove stack operations from PPCDAGToDAGISel::Select
88; should still trigger for v2f64, producing an lxvdsx.
89; Function Attrs: norecurse nounwind readonly
90define <2 x double> @buildd() {
91; CHECK-LABEL: buildd:
92; CHECK:       # %bb.0: # %entry
93; CHECK-NEXT:    lwz 3, L..C1(2) # @d
94; CHECK-NEXT:    lxvdsx 34, 0, 3
95; CHECK-NEXT:    blr
96entry:
97  %0 = load double, ptr @d, align 8
98  %splat.splatinsert = insertelement <2 x double> undef, double %0, i32 0
99  %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer
100  ret <2 x double> %splat.splat
101}
102
103; Function Attrs: norecurse nounwind readnone
104define signext i8 @getsc0(<16 x i8> %vsc) {
105; CHECK-LABEL: getsc0:
106; CHECK:       # %bb.0: # %entry
107; CHECK-NEXT:    addi 3, 1, -16
108; CHECK-NEXT:    stxvw4x 34, 0, 3
109; CHECK-NEXT:    lbz 3, -16(1)
110; CHECK-NEXT:    extsb 3, 3
111; CHECK-NEXT:    blr
112entry:
113  %vecext = extractelement <16 x i8> %vsc, i32 0
114  ret i8 %vecext
115}
116
117; Function Attrs: norecurse nounwind readnone
118define signext i8 @getsc1(<16 x i8> %vsc) {
119; CHECK-LABEL: getsc1:
120; CHECK:       # %bb.0: # %entry
121; CHECK-NEXT:    addi 3, 1, -16
122; CHECK-NEXT:    stxvw4x 34, 0, 3
123; CHECK-NEXT:    lbz 3, -15(1)
124; CHECK-NEXT:    extsb 3, 3
125; CHECK-NEXT:    blr
126entry:
127  %vecext = extractelement <16 x i8> %vsc, i32 1
128  ret i8 %vecext
129}
130
131; Function Attrs: norecurse nounwind readnone
132define signext i8 @getsc2(<16 x i8> %vsc) {
133; CHECK-LABEL: getsc2:
134; CHECK:       # %bb.0: # %entry
135; CHECK-NEXT:    addi 3, 1, -16
136; CHECK-NEXT:    stxvw4x 34, 0, 3
137; CHECK-NEXT:    lbz 3, -14(1)
138; CHECK-NEXT:    extsb 3, 3
139; CHECK-NEXT:    blr
140entry:
141  %vecext = extractelement <16 x i8> %vsc, i32 2
142  ret i8 %vecext
143}
144
145; Function Attrs: norecurse nounwind readnone
146define signext i8 @getsc3(<16 x i8> %vsc) {
147; CHECK-LABEL: getsc3:
148; CHECK:       # %bb.0: # %entry
149; CHECK-NEXT:    addi 3, 1, -16
150; CHECK-NEXT:    stxvw4x 34, 0, 3
151; CHECK-NEXT:    lbz 3, -13(1)
152; CHECK-NEXT:    extsb 3, 3
153; CHECK-NEXT:    blr
154entry:
155  %vecext = extractelement <16 x i8> %vsc, i32 3
156  ret i8 %vecext
157}
158
159; Function Attrs: norecurse nounwind readnone
160define signext i8 @getsc4(<16 x i8> %vsc) {
161; CHECK-LABEL: getsc4:
162; CHECK:       # %bb.0: # %entry
163; CHECK-NEXT:    addi 3, 1, -16
164; CHECK-NEXT:    stxvw4x 34, 0, 3
165; CHECK-NEXT:    lbz 3, -12(1)
166; CHECK-NEXT:    extsb 3, 3
167; CHECK-NEXT:    blr
168entry:
169  %vecext = extractelement <16 x i8> %vsc, i32 4
170  ret i8 %vecext
171}
172
173; Function Attrs: norecurse nounwind readnone
174define signext i8 @getsc5(<16 x i8> %vsc) {
175; CHECK-LABEL: getsc5:
176; CHECK:       # %bb.0: # %entry
177; CHECK-NEXT:    addi 3, 1, -16
178; CHECK-NEXT:    stxvw4x 34, 0, 3
179; CHECK-NEXT:    lbz 3, -11(1)
180; CHECK-NEXT:    extsb 3, 3
181; CHECK-NEXT:    blr
182entry:
183  %vecext = extractelement <16 x i8> %vsc, i32 5
184  ret i8 %vecext
185}
186
187; Function Attrs: norecurse nounwind readnone
188define signext i8 @getsc6(<16 x i8> %vsc) {
189; CHECK-LABEL: getsc6:
190; CHECK:       # %bb.0: # %entry
191; CHECK-NEXT:    addi 3, 1, -16
192; CHECK-NEXT:    stxvw4x 34, 0, 3
193; CHECK-NEXT:    lbz 3, -10(1)
194; CHECK-NEXT:    extsb 3, 3
195; CHECK-NEXT:    blr
196entry:
197  %vecext = extractelement <16 x i8> %vsc, i32 6
198  ret i8 %vecext
199}
200
201; Function Attrs: norecurse nounwind readnone
202define signext i8 @getsc7(<16 x i8> %vsc) {
203; CHECK-LABEL: getsc7:
204; CHECK:       # %bb.0: # %entry
205; CHECK-NEXT:    addi 3, 1, -16
206; CHECK-NEXT:    stxvw4x 34, 0, 3
207; CHECK-NEXT:    lbz 3, -9(1)
208; CHECK-NEXT:    extsb 3, 3
209; CHECK-NEXT:    blr
210entry:
211  %vecext = extractelement <16 x i8> %vsc, i32 7
212  ret i8 %vecext
213}
214
215; Function Attrs: norecurse nounwind readnone
216define signext i8 @getsc8(<16 x i8> %vsc) {
217; CHECK-LABEL: getsc8:
218; CHECK:       # %bb.0: # %entry
219; CHECK-NEXT:    addi 3, 1, -16
220; CHECK-NEXT:    stxvw4x 34, 0, 3
221; CHECK-NEXT:    lbz 3, -8(1)
222; CHECK-NEXT:    extsb 3, 3
223; CHECK-NEXT:    blr
224entry:
225  %vecext = extractelement <16 x i8> %vsc, i32 8
226  ret i8 %vecext
227}
228
229; Function Attrs: norecurse nounwind readnone
230define signext i8 @getsc9(<16 x i8> %vsc) {
231; CHECK-LABEL: getsc9:
232; CHECK:       # %bb.0: # %entry
233; CHECK-NEXT:    addi 3, 1, -16
234; CHECK-NEXT:    stxvw4x 34, 0, 3
235; CHECK-NEXT:    lbz 3, -7(1)
236; CHECK-NEXT:    extsb 3, 3
237; CHECK-NEXT:    blr
238entry:
239  %vecext = extractelement <16 x i8> %vsc, i32 9
240  ret i8 %vecext
241}
242
243; Function Attrs: norecurse nounwind readnone
244define signext i8 @getsc10(<16 x i8> %vsc) {
245; CHECK-LABEL: getsc10:
246; CHECK:       # %bb.0: # %entry
247; CHECK-NEXT:    addi 3, 1, -16
248; CHECK-NEXT:    stxvw4x 34, 0, 3
249; CHECK-NEXT:    lbz 3, -6(1)
250; CHECK-NEXT:    extsb 3, 3
251; CHECK-NEXT:    blr
252entry:
253  %vecext = extractelement <16 x i8> %vsc, i32 10
254  ret i8 %vecext
255}
256
257; Function Attrs: norecurse nounwind readnone
258define signext i8 @getsc11(<16 x i8> %vsc) {
259; CHECK-LABEL: getsc11:
260; CHECK:       # %bb.0: # %entry
261; CHECK-NEXT:    addi 3, 1, -16
262; CHECK-NEXT:    stxvw4x 34, 0, 3
263; CHECK-NEXT:    lbz 3, -5(1)
264; CHECK-NEXT:    extsb 3, 3
265; CHECK-NEXT:    blr
266entry:
267  %vecext = extractelement <16 x i8> %vsc, i32 11
268  ret i8 %vecext
269}
270
271; Function Attrs: norecurse nounwind readnone
272define signext i8 @getsc12(<16 x i8> %vsc) {
273; CHECK-LABEL: getsc12:
274; CHECK:       # %bb.0: # %entry
275; CHECK-NEXT:    addi 3, 1, -16
276; CHECK-NEXT:    stxvw4x 34, 0, 3
277; CHECK-NEXT:    lbz 3, -4(1)
278; CHECK-NEXT:    extsb 3, 3
279; CHECK-NEXT:    blr
280entry:
281  %vecext = extractelement <16 x i8> %vsc, i32 12
282  ret i8 %vecext
283}
284
285; Function Attrs: norecurse nounwind readnone
286define signext i8 @getsc13(<16 x i8> %vsc) {
287; CHECK-LABEL: getsc13:
288; CHECK:       # %bb.0: # %entry
289; CHECK-NEXT:    addi 3, 1, -16
290; CHECK-NEXT:    stxvw4x 34, 0, 3
291; CHECK-NEXT:    lbz 3, -3(1)
292; CHECK-NEXT:    extsb 3, 3
293; CHECK-NEXT:    blr
294entry:
295  %vecext = extractelement <16 x i8> %vsc, i32 13
296  ret i8 %vecext
297}
298
299; Function Attrs: norecurse nounwind readnone
300define signext i8 @getsc14(<16 x i8> %vsc) {
301; CHECK-LABEL: getsc14:
302; CHECK:       # %bb.0: # %entry
303; CHECK-NEXT:    addi 3, 1, -16
304; CHECK-NEXT:    stxvw4x 34, 0, 3
305; CHECK-NEXT:    lbz 3, -2(1)
306; CHECK-NEXT:    extsb 3, 3
307; CHECK-NEXT:    blr
308entry:
309  %vecext = extractelement <16 x i8> %vsc, i32 14
310  ret i8 %vecext
311}
312
313; Function Attrs: norecurse nounwind readnone
314define signext i8 @getsc15(<16 x i8> %vsc) {
315; CHECK-LABEL: getsc15:
316; CHECK:       # %bb.0: # %entry
317; CHECK-NEXT:    addi 3, 1, -16
318; CHECK-NEXT:    stxvw4x 34, 0, 3
319; CHECK-NEXT:    lbz 3, -1(1)
320; CHECK-NEXT:    extsb 3, 3
321; CHECK-NEXT:    blr
322entry:
323  %vecext = extractelement <16 x i8> %vsc, i32 15
324  ret i8 %vecext
325}
326
327; Function Attrs: norecurse nounwind readnone
328define zeroext i8 @getuc0(<16 x i8> %vuc) {
329; CHECK-LABEL: getuc0:
330; CHECK:       # %bb.0: # %entry
331; CHECK-NEXT:    addi 3, 1, -16
332; CHECK-NEXT:    stxvw4x 34, 0, 3
333; CHECK-NEXT:    lbz 3, -16(1)
334; CHECK-NEXT:    blr
335entry:
336  %vecext = extractelement <16 x i8> %vuc, i32 0
337  ret i8 %vecext
338}
339
340; Function Attrs: norecurse nounwind readnone
341define zeroext i8 @getuc1(<16 x i8> %vuc) {
342; CHECK-LABEL: getuc1:
343; CHECK:       # %bb.0: # %entry
344; CHECK-NEXT:    addi 3, 1, -16
345; CHECK-NEXT:    stxvw4x 34, 0, 3
346; CHECK-NEXT:    lbz 3, -15(1)
347; CHECK-NEXT:    blr
348entry:
349  %vecext = extractelement <16 x i8> %vuc, i32 1
350  ret i8 %vecext
351}
352
353; Function Attrs: norecurse nounwind readnone
354define zeroext i8 @getuc2(<16 x i8> %vuc) {
355; CHECK-LABEL: getuc2:
356; CHECK:       # %bb.0: # %entry
357; CHECK-NEXT:    addi 3, 1, -16
358; CHECK-NEXT:    stxvw4x 34, 0, 3
359; CHECK-NEXT:    lbz 3, -14(1)
360; CHECK-NEXT:    blr
361entry:
362  %vecext = extractelement <16 x i8> %vuc, i32 2
363  ret i8 %vecext
364}
365
366; Function Attrs: norecurse nounwind readnone
367define zeroext i8 @getuc3(<16 x i8> %vuc) {
368; CHECK-LABEL: getuc3:
369; CHECK:       # %bb.0: # %entry
370; CHECK-NEXT:    addi 3, 1, -16
371; CHECK-NEXT:    stxvw4x 34, 0, 3
372; CHECK-NEXT:    lbz 3, -13(1)
373; CHECK-NEXT:    blr
374entry:
375  %vecext = extractelement <16 x i8> %vuc, i32 3
376  ret i8 %vecext
377}
378
379; Function Attrs: norecurse nounwind readnone
380define zeroext i8 @getuc4(<16 x i8> %vuc) {
381; CHECK-LABEL: getuc4:
382; CHECK:       # %bb.0: # %entry
383; CHECK-NEXT:    addi 3, 1, -16
384; CHECK-NEXT:    stxvw4x 34, 0, 3
385; CHECK-NEXT:    lbz 3, -12(1)
386; CHECK-NEXT:    blr
387entry:
388  %vecext = extractelement <16 x i8> %vuc, i32 4
389  ret i8 %vecext
390}
391
392; Function Attrs: norecurse nounwind readnone
393define zeroext i8 @getuc5(<16 x i8> %vuc) {
394; CHECK-LABEL: getuc5:
395; CHECK:       # %bb.0: # %entry
396; CHECK-NEXT:    addi 3, 1, -16
397; CHECK-NEXT:    stxvw4x 34, 0, 3
398; CHECK-NEXT:    lbz 3, -11(1)
399; CHECK-NEXT:    blr
400entry:
401  %vecext = extractelement <16 x i8> %vuc, i32 5
402  ret i8 %vecext
403}
404
405; Function Attrs: norecurse nounwind readnone
406define zeroext i8 @getuc6(<16 x i8> %vuc) {
407; CHECK-LABEL: getuc6:
408; CHECK:       # %bb.0: # %entry
409; CHECK-NEXT:    addi 3, 1, -16
410; CHECK-NEXT:    stxvw4x 34, 0, 3
411; CHECK-NEXT:    lbz 3, -10(1)
412; CHECK-NEXT:    blr
413entry:
414  %vecext = extractelement <16 x i8> %vuc, i32 6
415  ret i8 %vecext
416}
417
418; Function Attrs: norecurse nounwind readnone
419define zeroext i8 @getuc7(<16 x i8> %vuc) {
420; CHECK-LABEL: getuc7:
421; CHECK:       # %bb.0: # %entry
422; CHECK-NEXT:    addi 3, 1, -16
423; CHECK-NEXT:    stxvw4x 34, 0, 3
424; CHECK-NEXT:    lbz 3, -9(1)
425; CHECK-NEXT:    blr
426entry:
427  %vecext = extractelement <16 x i8> %vuc, i32 7
428  ret i8 %vecext
429}
430
431; Function Attrs: norecurse nounwind readnone
432define zeroext i8 @getuc8(<16 x i8> %vuc) {
433; CHECK-LABEL: getuc8:
434; CHECK:       # %bb.0: # %entry
435; CHECK-NEXT:    addi 3, 1, -16
436; CHECK-NEXT:    stxvw4x 34, 0, 3
437; CHECK-NEXT:    lbz 3, -8(1)
438; CHECK-NEXT:    blr
439entry:
440  %vecext = extractelement <16 x i8> %vuc, i32 8
441  ret i8 %vecext
442}
443
444; Function Attrs: norecurse nounwind readnone
445define zeroext i8 @getuc9(<16 x i8> %vuc) {
446; CHECK-LABEL: getuc9:
447; CHECK:       # %bb.0: # %entry
448; CHECK-NEXT:    addi 3, 1, -16
449; CHECK-NEXT:    stxvw4x 34, 0, 3
450; CHECK-NEXT:    lbz 3, -7(1)
451; CHECK-NEXT:    blr
452entry:
453  %vecext = extractelement <16 x i8> %vuc, i32 9
454  ret i8 %vecext
455}
456
457; Function Attrs: norecurse nounwind readnone
458define zeroext i8 @getuc10(<16 x i8> %vuc) {
459; CHECK-LABEL: getuc10:
460; CHECK:       # %bb.0: # %entry
461; CHECK-NEXT:    addi 3, 1, -16
462; CHECK-NEXT:    stxvw4x 34, 0, 3
463; CHECK-NEXT:    lbz 3, -6(1)
464; CHECK-NEXT:    blr
465entry:
466  %vecext = extractelement <16 x i8> %vuc, i32 10
467  ret i8 %vecext
468}
469
470; Function Attrs: norecurse nounwind readnone
471define zeroext i8 @getuc11(<16 x i8> %vuc) {
472; CHECK-LABEL: getuc11:
473; CHECK:       # %bb.0: # %entry
474; CHECK-NEXT:    addi 3, 1, -16
475; CHECK-NEXT:    stxvw4x 34, 0, 3
476; CHECK-NEXT:    lbz 3, -5(1)
477; CHECK-NEXT:    blr
478entry:
479  %vecext = extractelement <16 x i8> %vuc, i32 11
480  ret i8 %vecext
481}
482
483; Function Attrs: norecurse nounwind readnone
484define zeroext i8 @getuc12(<16 x i8> %vuc) {
485;
486; CHECK-LABEL: getuc12:
487; CHECK:       # %bb.0: # %entry
488; CHECK-NEXT:    addi 3, 1, -16
489; CHECK-NEXT:    stxvw4x 34, 0, 3
490; CHECK-NEXT:    lbz 3, -4(1)
491; CHECK-NEXT:    blr
492entry:
493  %vecext = extractelement <16 x i8> %vuc, i32 12
494  ret i8 %vecext
495}
496
497; Function Attrs: norecurse nounwind readnone
498define zeroext i8 @getuc13(<16 x i8> %vuc) {
499; CHECK-LABEL: getuc13:
500; CHECK:       # %bb.0: # %entry
501; CHECK-NEXT:    addi 3, 1, -16
502; CHECK-NEXT:    stxvw4x 34, 0, 3
503; CHECK-NEXT:    lbz 3, -3(1)
504; CHECK-NEXT:    blr
505entry:
506  %vecext = extractelement <16 x i8> %vuc, i32 13
507  ret i8 %vecext
508}
509
510; Function Attrs: norecurse nounwind readnone
511define zeroext i8 @getuc14(<16 x i8> %vuc) {
512; CHECK-LABEL: getuc14:
513; CHECK:       # %bb.0: # %entry
514; CHECK-NEXT:    addi 3, 1, -16
515; CHECK-NEXT:    stxvw4x 34, 0, 3
516; CHECK-NEXT:    lbz 3, -2(1)
517; CHECK-NEXT:    blr
518entry:
519  %vecext = extractelement <16 x i8> %vuc, i32 14
520  ret i8 %vecext
521}
522
523; Function Attrs: norecurse nounwind readnone
524define zeroext i8 @getuc15(<16 x i8> %vuc) {
525; CHECK-LABEL: getuc15:
526; CHECK:       # %bb.0: # %entry
527; CHECK-NEXT:    addi 3, 1, -16
528; CHECK-NEXT:    stxvw4x 34, 0, 3
529; CHECK-NEXT:    lbz 3, -1(1)
530; CHECK-NEXT:    blr
531entry:
532  %vecext = extractelement <16 x i8> %vuc, i32 15
533  ret i8 %vecext
534}
535
536; Function Attrs: norecurse nounwind readnone
537define signext i8 @getvelsc(<16 x i8> %vsc, i32 signext %i) {
538; CHECK-LABEL: getvelsc:
539; CHECK:       # %bb.0: # %entry
540; CHECK-NEXT:    addi 4, 1, -16
541; CHECK-NEXT:    clrlwi 3, 3, 28
542; CHECK-NEXT:    stxvw4x 34, 0, 4
543; CHECK-NEXT:    lbzx 3, 4, 3
544; CHECK-NEXT:    extsb 3, 3
545; CHECK-NEXT:    blr
546entry:
547  %vecext = extractelement <16 x i8> %vsc, i32 %i
548  ret i8 %vecext
549}
550
551; Function Attrs: norecurse nounwind readnone
552define zeroext i8 @getveluc(<16 x i8> %vuc, i32 signext %i) {
553; CHECK-LABEL: getveluc:
554; CHECK:       # %bb.0: # %entry
555; CHECK-NEXT:    addi 4, 1, -16
556; CHECK-NEXT:    clrlwi 3, 3, 28
557; CHECK-NEXT:    stxvw4x 34, 0, 4
558; CHECK-NEXT:    lbzx 3, 4, 3
559; CHECK-NEXT:    blr
560entry:
561  %vecext = extractelement <16 x i8> %vuc, i32 %i
562  ret i8 %vecext
563}
564
565; Function Attrs: norecurse nounwind readnone
566define signext i16 @getss0(<8 x i16> %vss) {
567; CHECK-LABEL: getss0:
568; CHECK:       # %bb.0: # %entry
569; CHECK-NEXT:    addi 3, 1, -16
570; CHECK-NEXT:    stxvw4x 34, 0, 3
571; CHECK-NEXT:    lha 3, -16(1)
572; CHECK-NEXT:    blr
573entry:
574  %vecext = extractelement <8 x i16> %vss, i32 0
575  ret i16 %vecext
576}
577
578; Function Attrs: norecurse nounwind readnone
579define signext i16 @getss1(<8 x i16> %vss) {
580; CHECK-LABEL: getss1:
581; CHECK:       # %bb.0: # %entry
582; CHECK-NEXT:    addi 3, 1, -16
583; CHECK-NEXT:    stxvw4x 34, 0, 3
584; CHECK-NEXT:    lha 3, -14(1)
585; CHECK-NEXT:    blr
586entry:
587  %vecext = extractelement <8 x i16> %vss, i32 1
588  ret i16 %vecext
589}
590
591; Function Attrs: norecurse nounwind readnone
592define signext i16 @getss2(<8 x i16> %vss) {
593; CHECK-LABEL: getss2:
594; CHECK:       # %bb.0: # %entry
595; CHECK-NEXT:    addi 3, 1, -16
596; CHECK-NEXT:    stxvw4x 34, 0, 3
597; CHECK-NEXT:    lha 3, -12(1)
598; CHECK-NEXT:    blr
599entry:
600  %vecext = extractelement <8 x i16> %vss, i32 2
601  ret i16 %vecext
602}
603
604; Function Attrs: norecurse nounwind readnone
605define signext i16 @getss3(<8 x i16> %vss) {
606; CHECK-LABEL: getss3:
607; CHECK:       # %bb.0: # %entry
608; CHECK-NEXT:    addi 3, 1, -16
609; CHECK-NEXT:    stxvw4x 34, 0, 3
610; CHECK-NEXT:    lha 3, -10(1)
611; CHECK-NEXT:    blr
612entry:
613  %vecext = extractelement <8 x i16> %vss, i32 3
614  ret i16 %vecext
615}
616
617; Function Attrs: norecurse nounwind readnone
618define signext i16 @getss4(<8 x i16> %vss) {
619; CHECK-LABEL: getss4:
620; CHECK:       # %bb.0: # %entry
621; CHECK-NEXT:    addi 3, 1, -16
622; CHECK-NEXT:    stxvw4x 34, 0, 3
623; CHECK-NEXT:    lha 3, -8(1)
624; CHECK-NEXT:    blr
625entry:
626  %vecext = extractelement <8 x i16> %vss, i32 4
627  ret i16 %vecext
628}
629
630; Function Attrs: norecurse nounwind readnone
631define signext i16 @getss5(<8 x i16> %vss) {
632; CHECK-LABEL: getss5:
633; CHECK:       # %bb.0: # %entry
634; CHECK-NEXT:    addi 3, 1, -16
635; CHECK-NEXT:    stxvw4x 34, 0, 3
636; CHECK-NEXT:    lha 3, -6(1)
637; CHECK-NEXT:    blr
638entry:
639  %vecext = extractelement <8 x i16> %vss, i32 5
640  ret i16 %vecext
641}
642
643; Function Attrs: norecurse nounwind readnone
644define signext i16 @getss6(<8 x i16> %vss) {
645; CHECK-LABEL: getss6:
646; CHECK:       # %bb.0: # %entry
647; CHECK-NEXT:    addi 3, 1, -16
648; CHECK-NEXT:    stxvw4x 34, 0, 3
649; CHECK-NEXT:    lha 3, -4(1)
650; CHECK-NEXT:    blr
651entry:
652  %vecext = extractelement <8 x i16> %vss, i32 6
653  ret i16 %vecext
654}
655
656; Function Attrs: norecurse nounwind readnone
657define signext i16 @getss7(<8 x i16> %vss) {
658; CHECK-LABEL: getss7:
659; CHECK:       # %bb.0: # %entry
660; CHECK-NEXT:    addi 3, 1, -16
661; CHECK-NEXT:    stxvw4x 34, 0, 3
662; CHECK-NEXT:    lha 3, -2(1)
663; CHECK-NEXT:    blr
664entry:
665  %vecext = extractelement <8 x i16> %vss, i32 7
666  ret i16 %vecext
667}
668
669; Function Attrs: norecurse nounwind readnone
670define zeroext i16 @getus0(<8 x i16> %vus) {
671; CHECK-LABEL: getus0:
672; CHECK:       # %bb.0: # %entry
673; CHECK-NEXT:    addi 3, 1, -16
674; CHECK-NEXT:    stxvw4x 34, 0, 3
675; CHECK-NEXT:    lhz 3, -16(1)
676; CHECK-NEXT:    blr
677entry:
678  %vecext = extractelement <8 x i16> %vus, i32 0
679  ret i16 %vecext
680}
681
682; Function Attrs: norecurse nounwind readnone
683define zeroext i16 @getus1(<8 x i16> %vus) {
684; CHECK-LABEL: getus1:
685; CHECK:       # %bb.0: # %entry
686; CHECK-NEXT:    addi 3, 1, -16
687; CHECK-NEXT:    stxvw4x 34, 0, 3
688; CHECK-NEXT:    lhz 3, -14(1)
689; CHECK-NEXT:    blr
690entry:
691  %vecext = extractelement <8 x i16> %vus, i32 1
692  ret i16 %vecext
693}
694
695; Function Attrs: norecurse nounwind readnone
696define zeroext i16 @getus2(<8 x i16> %vus) {
697; CHECK-LABEL: getus2:
698; CHECK:       # %bb.0: # %entry
699; CHECK-NEXT:    addi 3, 1, -16
700; CHECK-NEXT:    stxvw4x 34, 0, 3
701; CHECK-NEXT:    lhz 3, -12(1)
702; CHECK-NEXT:    blr
703entry:
704  %vecext = extractelement <8 x i16> %vus, i32 2
705  ret i16 %vecext
706}
707
708; Function Attrs: norecurse nounwind readnone
709define zeroext i16 @getus3(<8 x i16> %vus) {
710; CHECK-LABEL: getus3:
711; CHECK:       # %bb.0: # %entry
712; CHECK-NEXT:    addi 3, 1, -16
713; CHECK-NEXT:    stxvw4x 34, 0, 3
714; CHECK-NEXT:    lhz 3, -10(1)
715; CHECK-NEXT:    blr
716entry:
717  %vecext = extractelement <8 x i16> %vus, i32 3
718  ret i16 %vecext
719}
720
721; Function Attrs: norecurse nounwind readnone
722define zeroext i16 @getus4(<8 x i16> %vus) {
723; CHECK-LABEL: getus4:
724; CHECK:       # %bb.0: # %entry
725; CHECK-NEXT:    addi 3, 1, -16
726; CHECK-NEXT:    stxvw4x 34, 0, 3
727; CHECK-NEXT:    lhz 3, -8(1)
728; CHECK-NEXT:    blr
729entry:
730  %vecext = extractelement <8 x i16> %vus, i32 4
731  ret i16 %vecext
732}
733
734; Function Attrs: norecurse nounwind readnone
735define zeroext i16 @getus5(<8 x i16> %vus) {
736; CHECK-LABEL: getus5:
737; CHECK:       # %bb.0: # %entry
738; CHECK-NEXT:    addi 3, 1, -16
739; CHECK-NEXT:    stxvw4x 34, 0, 3
740; CHECK-NEXT:    lhz 3, -6(1)
741; CHECK-NEXT:    blr
742entry:
743  %vecext = extractelement <8 x i16> %vus, i32 5
744  ret i16 %vecext
745}
746
747; Function Attrs: norecurse nounwind readnone
748define zeroext i16 @getus6(<8 x i16> %vus) {
749; CHECK-LABEL: getus6:
750; CHECK:       # %bb.0: # %entry
751; CHECK-NEXT:    addi 3, 1, -16
752; CHECK-NEXT:    stxvw4x 34, 0, 3
753; CHECK-NEXT:    lhz 3, -4(1)
754; CHECK-NEXT:    blr
755entry:
756  %vecext = extractelement <8 x i16> %vus, i32 6
757  ret i16 %vecext
758}
759
760; Function Attrs: norecurse nounwind readnone
761define zeroext i16 @getus7(<8 x i16> %vus) {
762; CHECK-LABEL: getus7:
763; CHECK:       # %bb.0: # %entry
764; CHECK-NEXT:    addi 3, 1, -16
765; CHECK-NEXT:    stxvw4x 34, 0, 3
766; CHECK-NEXT:    lhz 3, -2(1)
767; CHECK-NEXT:    blr
768entry:
769  %vecext = extractelement <8 x i16> %vus, i32 7
770  ret i16 %vecext
771}
772
773; Function Attrs: norecurse nounwind readnone
774define signext i16 @getvelss(<8 x i16> %vss, i32 signext %i) {
775; CHECK-LABEL: getvelss:
776; CHECK:       # %bb.0: # %entry
777; CHECK-NEXT:    addi 4, 1, -16
778; CHECK-NEXT:    rlwinm 3, 3, 1, 28, 30
779; CHECK-NEXT:    stxvw4x 34, 0, 4
780; CHECK-NEXT:    lhax 3, 4, 3
781; CHECK-NEXT:    blr
782entry:
783  %vecext = extractelement <8 x i16> %vss, i32 %i
784  ret i16 %vecext
785}
786
787; Function Attrs: norecurse nounwind readnone
788define zeroext i16 @getvelus(<8 x i16> %vus, i32 signext %i) {
789; CHECK-LABEL: getvelus:
790; CHECK:       # %bb.0: # %entry
791; CHECK-NEXT:    addi 4, 1, -16
792; CHECK-NEXT:    rlwinm 3, 3, 1, 28, 30
793; CHECK-NEXT:    stxvw4x 34, 0, 4
794; CHECK-NEXT:    lhzx 3, 4, 3
795; CHECK-NEXT:    blr
796entry:
797  %vecext = extractelement <8 x i16> %vus, i32 %i
798  ret i16 %vecext
799}
800
801; Function Attrs: norecurse nounwind readnone
802define signext i32 @getsi0(<4 x i32> %vsi) {
803; CHECK-LABEL: getsi0:
804; CHECK:       # %bb.0: # %entry
805; CHECK-NEXT:    addi 3, 1, -16
806; CHECK-NEXT:    stxvw4x 34, 0, 3
807; CHECK-NEXT:    lwz 3, -16(1)
808; CHECK-NEXT:    blr
809entry:
810  %vecext = extractelement <4 x i32> %vsi, i32 0
811  ret i32 %vecext
812}
813
814; Function Attrs: norecurse nounwind readnone
815define signext i32 @getsi1(<4 x i32> %vsi) {
816; CHECK-LABEL: getsi1:
817; CHECK:       # %bb.0: # %entry
818; CHECK-NEXT:    addi 3, 1, -16
819; CHECK-NEXT:    stxvw4x 34, 0, 3
820; CHECK-NEXT:    lwz 3, -12(1)
821; CHECK-NEXT:    blr
822entry:
823  %vecext = extractelement <4 x i32> %vsi, i32 1
824  ret i32 %vecext
825}
826
827; Function Attrs: norecurse nounwind readnone
828define signext i32 @getsi2(<4 x i32> %vsi) {
829; CHECK-LABEL: getsi2:
830; CHECK:       # %bb.0: # %entry
831; CHECK-NEXT:    addi 3, 1, -16
832; CHECK-NEXT:    stxvw4x 34, 0, 3
833; CHECK-NEXT:    lwz 3, -8(1)
834; CHECK-NEXT:    blr
835entry:
836  %vecext = extractelement <4 x i32> %vsi, i32 2
837  ret i32 %vecext
838}
839
840; Function Attrs: norecurse nounwind readnone
841define signext i32 @getsi3(<4 x i32> %vsi) {
842; CHECK-LABEL: getsi3:
843; CHECK:       # %bb.0: # %entry
844; CHECK-NEXT:    addi 3, 1, -16
845; CHECK-NEXT:    stxvw4x 34, 0, 3
846; CHECK-NEXT:    lwz 3, -4(1)
847; CHECK-NEXT:    blr
848entry:
849  %vecext = extractelement <4 x i32> %vsi, i32 3
850  ret i32 %vecext
851}
852
853; Function Attrs: norecurse nounwind readnone
854define zeroext i32 @getui0(<4 x i32> %vui) {
855; CHECK-LABEL: getui0:
856; CHECK:       # %bb.0: # %entry
857; CHECK-NEXT:    addi 3, 1, -16
858; CHECK-NEXT:    stxvw4x 34, 0, 3
859; CHECK-NEXT:    lwz 3, -16(1)
860; CHECK-NEXT:    blr
861entry:
862  %vecext = extractelement <4 x i32> %vui, i32 0
863  ret i32 %vecext
864}
865
866; Function Attrs: norecurse nounwind readnone
867define zeroext i32 @getui1(<4 x i32> %vui) {
868; CHECK-LABEL: getui1:
869; CHECK:       # %bb.0: # %entry
870; CHECK-NEXT:    addi 3, 1, -16
871; CHECK-NEXT:    stxvw4x 34, 0, 3
872; CHECK-NEXT:    lwz 3, -12(1)
873; CHECK-NEXT:    blr
874entry:
875  %vecext = extractelement <4 x i32> %vui, i32 1
876  ret i32 %vecext
877}
878
879; Function Attrs: norecurse nounwind readnone
880define zeroext i32 @getui2(<4 x i32> %vui) {
881; CHECK-LABEL: getui2:
882; CHECK:       # %bb.0: # %entry
883; CHECK-NEXT:    addi 3, 1, -16
884; CHECK-NEXT:    stxvw4x 34, 0, 3
885; CHECK-NEXT:    lwz 3, -8(1)
886; CHECK-NEXT:    blr
887entry:
888  %vecext = extractelement <4 x i32> %vui, i32 2
889  ret i32 %vecext
890}
891
892; Function Attrs: norecurse nounwind readnone
893define zeroext i32 @getui3(<4 x i32> %vui) {
894; CHECK-LABEL: getui3:
895; CHECK:       # %bb.0: # %entry
896; CHECK-NEXT:    addi 3, 1, -16
897; CHECK-NEXT:    stxvw4x 34, 0, 3
898; CHECK-NEXT:    lwz 3, -4(1)
899; CHECK-NEXT:    blr
900entry:
901  %vecext = extractelement <4 x i32> %vui, i32 3
902  ret i32 %vecext
903}
904
905; Function Attrs: norecurse nounwind readnone
906define signext i32 @getvelsi(<4 x i32> %vsi, i32 signext %i) {
907; CHECK-LABEL: getvelsi:
908; CHECK:       # %bb.0: # %entry
909; CHECK-NEXT:    addi 4, 1, -16
910; CHECK-NEXT:    rlwinm 3, 3, 2, 28, 29
911; CHECK-NEXT:    stxvw4x 34, 0, 4
912; CHECK-NEXT:    lwzx 3, 4, 3
913; CHECK-NEXT:    blr
914entry:
915  %vecext = extractelement <4 x i32> %vsi, i32 %i
916  ret i32 %vecext
917}
918
919; Function Attrs: norecurse nounwind readnone
920define zeroext i32 @getvelui(<4 x i32> %vui, i32 signext %i) {
921; CHECK-LABEL: getvelui:
922; CHECK:       # %bb.0: # %entry
923; CHECK-NEXT:    addi 4, 1, -16
924; CHECK-NEXT:    rlwinm 3, 3, 2, 28, 29
925; CHECK-NEXT:    stxvw4x 34, 0, 4
926; CHECK-NEXT:    lwzx 3, 4, 3
927; CHECK-NEXT:    blr
928entry:
929  %vecext = extractelement <4 x i32> %vui, i32 %i
930  ret i32 %vecext
931}
932
933; Function Attrs: norecurse nounwind readnone
934define i64 @getsl0(<2 x i64> %vsl) {
935; CHECK-LABEL: getsl0:
936; CHECK:       # %bb.0: # %entry
937; CHECK-NEXT:    addi 3, 1, -16
938; CHECK-NEXT:    stxvw4x 34, 0, 3
939; CHECK-NEXT:    lwz 3, -16(1)
940; CHECK-NEXT:    lwz 4, -12(1)
941; CHECK-NEXT:    blr
942entry:
943  %vecext = extractelement <2 x i64> %vsl, i32 0
944  ret i64 %vecext
945}
946
947; Function Attrs: norecurse nounwind readnone
948define i64 @getsl1(<2 x i64> %vsl) {
949; CHECK-LABEL: getsl1:
950; CHECK:       # %bb.0: # %entry
951; CHECK-NEXT:    addi 3, 1, -16
952; CHECK-NEXT:    stxvw4x 34, 0, 3
953; CHECK-NEXT:    lwz 3, -8(1)
954; CHECK-NEXT:    lwz 4, -4(1)
955; CHECK-NEXT:    blr
956entry:
957  %vecext = extractelement <2 x i64> %vsl, i32 1
958  ret i64 %vecext
959}
960
961; Function Attrs: norecurse nounwind readnone
962define i64 @getul0(<2 x i64> %vul) {
963; CHECK-LABEL: getul0:
964; CHECK:       # %bb.0: # %entry
965; CHECK-NEXT:    addi 3, 1, -16
966; CHECK-NEXT:    stxvw4x 34, 0, 3
967; CHECK-NEXT:    lwz 3, -16(1)
968; CHECK-NEXT:    lwz 4, -12(1)
969; CHECK-NEXT:    blr
970entry:
971  %vecext = extractelement <2 x i64> %vul, i32 0
972  ret i64 %vecext
973}
974
975; Function Attrs: norecurse nounwind readnone
976define i64 @getul1(<2 x i64> %vul) {
977; CHECK-LABEL: getul1:
978; CHECK:       # %bb.0: # %entry
979; CHECK-NEXT:    addi 3, 1, -16
980; CHECK-NEXT:    stxvw4x 34, 0, 3
981; CHECK-NEXT:    lwz 3, -8(1)
982; CHECK-NEXT:    lwz 4, -4(1)
983; CHECK-NEXT:    blr
984entry:
985  %vecext = extractelement <2 x i64> %vul, i32 1
986  ret i64 %vecext
987}
988
989; Function Attrs: norecurse nounwind readnone
990define i64 @getvelsl(<2 x i64> %vsl, i32 signext %i) {
991; CHECK-LABEL: getvelsl:
992; CHECK:       # %bb.0: # %entry
993; CHECK-NEXT:    add 5, 3, 3
994; CHECK-NEXT:    addi 4, 1, -16
995; CHECK-NEXT:    rlwinm 3, 5, 2, 28, 29
996; CHECK-NEXT:    addi 5, 5, 1
997; CHECK-NEXT:    stxvw4x 34, 0, 4
998; CHECK-NEXT:    rlwinm 5, 5, 2, 28, 29
999; CHECK-NEXT:    lwzx 3, 4, 3
1000; CHECK-NEXT:    lwzx 4, 4, 5
1001; CHECK-NEXT:    blr
1002entry:
1003  %vecext = extractelement <2 x i64> %vsl, i32 %i
1004  ret i64 %vecext
1005}
1006
1007; Function Attrs: norecurse nounwind readnone
1008define i64 @getvelul(<2 x i64> %vul, i32 signext %i) {
1009; CHECK-LABEL: getvelul:
1010; CHECK:       # %bb.0: # %entry
1011; CHECK-NEXT:    add 5, 3, 3
1012; CHECK-NEXT:    addi 4, 1, -16
1013; CHECK-NEXT:    rlwinm 3, 5, 2, 28, 29
1014; CHECK-NEXT:    addi 5, 5, 1
1015; CHECK-NEXT:    stxvw4x 34, 0, 4
1016; CHECK-NEXT:    rlwinm 5, 5, 2, 28, 29
1017; CHECK-NEXT:    lwzx 3, 4, 3
1018; CHECK-NEXT:    lwzx 4, 4, 5
1019; CHECK-NEXT:    blr
1020entry:
1021  %vecext = extractelement <2 x i64> %vul, i32 %i
1022  ret i64 %vecext
1023}
1024
1025; Function Attrs: norecurse nounwind readnone
1026define float @getf0(<4 x float> %vf) {
1027; CHECK-LABEL: getf0:
1028; CHECK:       # %bb.0: # %entry
1029; CHECK-NEXT:    xscvspdpn 1, 34
1030; CHECK-NEXT:    blr
1031entry:
1032  %vecext = extractelement <4 x float> %vf, i32 0
1033  ret float %vecext
1034}
1035
1036; Function Attrs: norecurse nounwind readnone
1037define float @getf1(<4 x float> %vf) {
1038; CHECK-LABEL: getf1:
1039; CHECK:       # %bb.0: # %entry
1040; CHECK-NEXT:    xxsldwi 0, 34, 34, 1
1041; CHECK-NEXT:    xscvspdpn 1, 0
1042; CHECK-NEXT:    blr
1043entry:
1044  %vecext = extractelement <4 x float> %vf, i32 1
1045  ret float %vecext
1046}
1047
1048; Function Attrs: norecurse nounwind readnone
1049define float @getf2(<4 x float> %vf) {
1050; CHECK-LABEL: getf2:
1051; CHECK:       # %bb.0: # %entry
1052; CHECK-NEXT:    xxswapd 0, 34
1053; CHECK-NEXT:    xscvspdpn 1, 0
1054; CHECK-NEXT:    blr
1055entry:
1056  %vecext = extractelement <4 x float> %vf, i32 2
1057  ret float %vecext
1058}
1059
1060; Function Attrs: norecurse nounwind readnone
1061define float @getf3(<4 x float> %vf) {
1062; CHECK-LABEL: getf3:
1063; CHECK:       # %bb.0: # %entry
1064; CHECK-NEXT:    xxsldwi 0, 34, 34, 3
1065; CHECK-NEXT:    xscvspdpn 1, 0
1066; CHECK-NEXT:    blr
1067entry:
1068  %vecext = extractelement <4 x float> %vf, i32 3
1069  ret float %vecext
1070}
1071
1072; Function Attrs: norecurse nounwind readnone
1073define float @getvelf(<4 x float> %vf, i32 signext %i) {
1074; CHECK-LABEL: getvelf:
1075; CHECK:       # %bb.0: # %entry
1076; CHECK-NEXT:    slwi 3, 3, 2
1077; CHECK-NEXT:    lvsl 3, 0, 3
1078; CHECK-NEXT:    vperm 2, 2, 2, 3
1079; CHECK-NEXT:    xscvspdpn 1, 34
1080; CHECK-NEXT:    blr
1081entry:
1082   %vecext = extractelement <4 x float> %vf, i32 %i
1083   ret float %vecext
1084}
1085
1086; Function Attrs: norecurse nounwind readnone
1087define double @getd0(<2 x double> %vd) {
1088; CHECK-LABEL: getd0:
1089; CHECK:       # %bb.0: # %entry
1090; CHECK-NEXT:    xxlor 1, 34, 34
1091; CHECK-NEXT:    blr
1092entry:
1093  %vecext = extractelement <2 x double> %vd, i32 0
1094  ret double %vecext
1095}
1096
1097; Function Attrs: norecurse nounwind readnone
1098define double @getd1(<2 x double> %vd) {
1099; CHECK-LABEL: getd1:
1100; CHECK:       # %bb.0: # %entry
1101; CHECK-NEXT:    xxswapd 1, 34
1102; CHECK-NEXT:    blr
1103entry:
1104  %vecext = extractelement <2 x double> %vd, i32 1
1105  ret double %vecext
1106}
1107
1108; Function Attrs: norecurse nounwind readnone
1109define double @getveld(<2 x double> %vd, i32 signext %i) {
1110; CHECK-LABEL: getveld:
1111; CHECK:       # %bb.0: # %entry
1112; CHECK-NEXT:    andi. 3, 3, 1
1113; CHECK-NEXT:    slwi 3, 3, 3
1114; CHECK-NEXT:    lvsl 3, 0, 3
1115; CHECK-NEXT:    vperm 2, 2, 2, 3
1116; CHECK-NEXT:    xxlor 1, 34, 34
1117; CHECK-NEXT:    blr
1118entry:
1119  %vecext = extractelement <2 x double> %vd, i32 %i
1120  ret double %vecext
1121}
1122