1; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ 2; RUN: -filetype=obj -code-model=large -o %t.o < %s 3; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefixes=RELOC %s 4; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s 5 6; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ 7; RUN: -filetype=obj -code-model=large -o %t64.o < %s 8; RUN: llvm-readobj --relocs --expand-relocs %t64.o | FileCheck --check-prefixes=RELOC64 %s 9; RUN: llvm-objdump -D -r --symbol-description %t64.o | FileCheck --check-prefix=DIS64 %s 10 11@a = global i32 2, align 4 12@b = global i32 10, align 4 13@c = global i32 11, align 4 14 15define i32 @foo() { 16entry: 17 %0 = load i32, ptr @a, align 4 18 %1 = load i32, ptr @b, align 4 19 %add = add nsw i32 %0, %1 20 %2 = load i32, ptr @c, align 4 21 %add1 = add nsw i32 %add, %2 22 ret i32 %add1 23} 24 25; RELOC: Section (index: {{[0-9]+}}) .text { 26; RELOC-NEXT: Relocation { 27; RELOC-NEXT: Virtual Address: 0x2 28; RELOC-NEXT: Symbol: a ([[#INDX:]]) 29; RELOC-NEXT: IsSigned: No 30; RELOC-NEXT: FixupBitValue: 0 31; RELOC-NEXT: Length: 16 32; RELOC-NEXT: Type: R_TOCU (0x30) 33; RELOC-NEXT: } 34; RELOC-NEXT: Relocation { 35; RELOC-NEXT: Virtual Address: 0x6 36; RELOC-NEXT: Symbol: a ([[#INDX]]) 37; RELOC-NEXT: IsSigned: No 38; RELOC-NEXT: FixupBitValue: 0 39; RELOC-NEXT: Length: 16 40; RELOC-NEXT: Type: R_TOCL (0x31) 41; RELOC-NEXT: } 42; RELOC-NEXT: Relocation { 43; RELOC-NEXT: Virtual Address: 0xE 44; RELOC-NEXT: Symbol: b ([[#INDX+2]]) 45; RELOC-NEXT: IsSigned: No 46; RELOC-NEXT: FixupBitValue: 0 47; RELOC-NEXT: Length: 16 48; RELOC-NEXT: Type: R_TOCU (0x30) 49; RELOC-NEXT: } 50; RELOC-NEXT: Relocation { 51; RELOC-NEXT: Virtual Address: 0x12 52; RELOC-NEXT: Symbol: b ([[#INDX+2]]) 53; RELOC-NEXT: IsSigned: No 54; RELOC-NEXT: FixupBitValue: 0 55; RELOC-NEXT: Length: 16 56; RELOC-NEXT: Type: R_TOCL (0x31) 57; RELOC-NEXT: } 58; RELOC-NEXT: Relocation { 59; RELOC-NEXT: Virtual Address: 0x1A 60; RELOC-NEXT: Symbol: c ([[#INDX+4]]) 61; RELOC-NEXT: IsSigned: No 62; RELOC-NEXT: FixupBitValue: 0 63; RELOC-NEXT: Length: 16 64; RELOC-NEXT: Type: R_TOCU (0x30) 65; RELOC-NEXT: } 66; RELOC-NEXT: Relocation { 67; RELOC-NEXT: Virtual Address: 0x1E 68; RELOC-NEXT: Symbol: c ([[#INDX+4]]) 69; RELOC-NEXT: IsSigned: No 70; RELOC-NEXT: FixupBitValue: 0 71; RELOC-NEXT: Length: 16 72; RELOC-NEXT: Type: R_TOCL (0x31) 73; RELOC-NEXT: } 74 75; DIS: Disassembly of section .text: 76; DIS-EMPTY: 77; DIS-NEXT: 00000000 (idx: {{[0-9]+}}) .foo: 78; DIS-NEXT: 0: 3c 62 00 00 addis 3, 2, 0 79; DIS-NEXT: 00000002: R_TOCU (idx: [[#INDX:]]) a[TE] 80; DIS-NEXT: 4: 80 63 00 00 lwz 3, 0(3) 81; DIS-NEXT: 00000006: R_TOCL (idx: [[#INDX]]) a[TE] 82; DIS-NEXT: 8: 80 63 00 00 lwz 3, 0(3) 83; DIS-NEXT: c: 3c 82 00 00 addis 4, 2, 0 84; DIS-NEXT: 0000000e: R_TOCU (idx: [[#INDX+2]]) b[TE] 85; DIS-NEXT: 10: 80 84 00 04 lwz 4, 4(4) 86; DIS-NEXT: 00000012: R_TOCL (idx: [[#INDX+2]]) b[TE] 87; DIS-NEXT: 14: 80 84 00 00 lwz 4, 0(4) 88; DIS-NEXT: 18: 3c a2 00 00 addis 5, 2, 0 89; DIS-NEXT: 0000001a: R_TOCU (idx: [[#INDX+4]]) c[TE] 90; DIS-NEXT: 1c: 80 a5 00 08 lwz 5, 8(5) 91; DIS-NEXT: 0000001e: R_TOCL (idx: [[#INDX+4]]) c[TE] 92; DIS-NEXT: 20: 7c 63 22 14 add 3, 3, 4 93; DIS-NEXT: 24: 80 a5 00 00 lwz 5, 0(5) 94; DIS-NEXT: 28: 7c 63 2a 14 add 3, 3, 5 95; DIS-NEXT: 2c: 4e 80 00 20 blr 96 97; RELOC64: Section (index: {{[0-9]+}}) .text { 98; RELOC64-NEXT: Relocation { 99; RELOC64-NEXT: Virtual Address: 0x2 100; RELOC64-NEXT: Symbol: a ([[#INDX:]]) 101; RELOC64-NEXT: IsSigned: No 102; RELOC64-NEXT: FixupBitValue: 0 103; RELOC64-NEXT: Length: 16 104; RELOC64-NEXT: Type: R_TOCU (0x30) 105; RELOC64-NEXT: } 106; RELOC64-NEXT: Relocation { 107; RELOC64-NEXT: Virtual Address: 0x6 108; RELOC64-NEXT: Symbol: b ([[#INDX+2]]) 109; RELOC64-NEXT: IsSigned: No 110; RELOC64-NEXT: FixupBitValue: 0 111; RELOC64-NEXT: Length: 16 112; RELOC64-NEXT: Type: R_TOCU (0x30) 113; RELOC64-NEXT: } 114; RELOC64-NEXT: Relocation { 115; RELOC64-NEXT: Virtual Address: 0xA 116; RELOC64-NEXT: Symbol: c ([[#INDX+4]]) 117; RELOC64-NEXT: IsSigned: No 118; RELOC64-NEXT: FixupBitValue: 0 119; RELOC64-NEXT: Length: 16 120; RELOC64-NEXT: Type: R_TOCU (0x30) 121; RELOC64-NEXT: } 122; RELOC64-NEXT: Relocation { 123; RELOC64-NEXT: Virtual Address: 0xE 124; RELOC64-NEXT: Symbol: a ([[#INDX]]) 125; RELOC64-NEXT: IsSigned: No 126; RELOC64-NEXT: FixupBitValue: 0 127; RELOC64-NEXT: Length: 16 128; RELOC64-NEXT: Type: R_TOCL (0x31) 129; RELOC64-NEXT: } 130; RELOC64-NEXT: Relocation { 131; RELOC64-NEXT: Virtual Address: 0x12 132; RELOC64-NEXT: Symbol: b ([[#INDX+2]]) 133; RELOC64-NEXT: IsSigned: No 134; RELOC64-NEXT: FixupBitValue: 0 135; RELOC64-NEXT: Length: 16 136; RELOC64-NEXT: Type: R_TOCL (0x31) 137; RELOC64-NEXT: } 138; RELOC64-NEXT: Relocation { 139; RELOC64-NEXT: Virtual Address: 0x16 140; RELOC64-NEXT: Symbol: c ([[#INDX+4]]) 141; RELOC64-NEXT: IsSigned: No 142; RELOC64-NEXT: FixupBitValue: 0 143; RELOC64-NEXT: Length: 16 144; RELOC64-NEXT: Type: R_TOCL (0x31) 145; RELOC64-NEXT: } 146; RELOC64-NEXT: } 147 148; DIS64: Disassembly of section .text: 149; DIS64-EMPTY: 150; DIS64-NEXT: 0000000000000000 (idx: {{[0-9]+}}) .foo: 151; DIS64-NEXT: 0: 3c 62 00 00 addis 3, 2, 0 152; DIS64-NEXT: 0000000000000002: R_TOCU (idx: [[#INDX:]]) a[TE] 153; DIS64-NEXT: 4: 3c 82 00 00 addis 4, 2, 0 154; DIS64-NEXT: 0000000000000006: R_TOCU (idx: [[#INDX+2]]) b[TE] 155; DIS64-NEXT: 8: 3c a2 00 00 addis 5, 2, 0 156; DIS64-NEXT: 000000000000000a: R_TOCU (idx: [[#INDX+4]]) c[TE] 157; DIS64-NEXT: c: e8 63 00 00 ld 3, 0(3) 158; DIS64-NEXT: 000000000000000e: R_TOCL (idx: [[#INDX]]) a[TE] 159; DIS64-NEXT: 10: e8 84 00 08 ld 4, 8(4) 160; DIS64-NEXT: 0000000000000012: R_TOCL (idx: [[#INDX+2]]) b[TE] 161; DIS64-NEXT: 14: e8 a5 00 10 ld 5, 16(5) 162; DIS64-NEXT: 0000000000000016: R_TOCL (idx: [[#INDX+4]]) c[TE] 163; DIS64-NEXT: 18: 80 63 00 00 lwz 3, 0(3) 164; DIS64-NEXT: 1c: 80 84 00 00 lwz 4, 0(4) 165; DIS64-NEXT: 20: 80 a5 00 00 lwz 5, 0(5) 166; DIS64-NEXT: 24: 7c 63 22 14 add 3, 3, 4 167; DIS64-NEXT: 28: 7c 63 2a 14 add 3, 3, 5 168; DIS64-NEXT: 2c: 4e 80 00 20 blr 169