xref: /llvm-project/llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \
2; RUN:     -vec-extabi -mtriple powerpc-ibm-aix-xcoff < %s | \
3; RUN:   FileCheck %s --check-prefix=32BIT
4
5; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -vec-extabi \
6; RUN:     -stop-after=machine-cp -mtriple powerpc-ibm-aix-xcoff < %s | \
7; RUN:   FileCheck %s --check-prefix=MIR32
8
9; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \
10; RUN:     -vec-extabi -mtriple powerpc64-ibm-aix-xcoff < %s | \
11; RUN:   FileCheck %s --check-prefix=64BIT
12
13; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -vec-extabi \
14; RUN:     -stop-after=machine-cp -mtriple powerpc64-ibm-aix-xcoff < %s | \
15; RUN:   FileCheck %s --check-prefix=MIR64
16
17%struct.Test = type { double, double, double, double }
18
19define double @test(i32 signext %r3, i32 signext %r4, double %fpr1, double %fpr2, <2 x double> %v2, <2 x double> %v3, <2 x double> %v4, <2 x double> %v5, <2 x double> %v6, <2 x double> %v7, <2 x double> %v8, <2 x double> %v9, <2 x double> %v10, <2 x double> %v11, <2 x double> %v12, <2 x double> %v13, <2 x double> %vSpill, double %fpr3, double %fpr4, double %fpr5, double %fpr6, double %fpr7, double %fpr8, double %fpr9, double %fpr10, double %fpr11, double %fpr12, double %fpr13, i32 signext %gprSpill, ptr nocapture readonly byval(%struct.Test) align 4 %t) {
20entry:
21  %vecext = extractelement <2 x double> %vSpill, i32 0
22  %0 = load double, ptr %t, align 4
23  %add = fadd double %vecext, %0
24  ret double %add
25}
26
27; 32BIT-LABEL: .test:
28; 32BIT-DAG:     lfd {{[0-9]+}}, 48(1)
29; 32BIT-DAG:     lfd {{[0-9]+}}, 156(1)
30
31; MIR32: name:            test
32; MIR32: fixedStack:
33; MIR32:   - { id: 0, type: default, offset: 156, size: 32, alignment: 4, stack-id: default,
34; MIR32:       isImmutable: false, isAliased: true, callee-saved-register: '', callee-saved-restored: true,
35; MIR32:       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
36; MIR32:   - { id: 1, type: default, offset: 152, size: 4, alignment: 8, stack-id: default,
37; MIR32:       isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
38; MIR32:       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
39; MIR32:   - { id: 2, type: default, offset: 48, size: 16, alignment: 16, stack-id: default,
40; MIR32:       isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
41; MIR32:       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
42
43; MIR32:  renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.2
44; MIR32:  renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.0
45
46; 64BIT-LABEL: .test:
47; 64BIT-DAG:     lfd {{[0-9]+}}, 80(1)
48; 64BIT-DAG:     lfd {{[0-9]+}}, 192(1)
49
50; MIR64: name:            test
51; MIR64: fixedStack:
52; MIR64:   - { id: 0, type: default, offset: 192, size: 32, alignment: 16, stack-id: default,
53; MIR64:       isImmutable: false, isAliased: true, callee-saved-register: '', callee-saved-restored: true,
54; MIR64:       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
55; MIR64:   - { id: 1, type: default, offset: 188, size: 4, alignment: 4, stack-id: default,
56; MIR64:       isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
57; MIR64:       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
58; MIR64:   - { id: 2, type: default, offset: 80, size: 16, alignment: 16, stack-id: default,
59; MIR64:       isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
60; MIR64:       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
61
62; MIR64:  renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.2
63; MIR64:  renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.0
64