xref: /llvm-project/llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large.ll (revision b1acb7a315e903ee340a33dbc9b2b61b0450bb67) 
1; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
2; RUN:     -xcoff-traceback-table=false --code-model=large -filetype=obj -o %t.o < %s
3; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
4; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
5; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
6
7@ThreadLocalVarInit = thread_local(localexec) global i64 1, align 8
8@VarInit = global i64 87, align 8
9@IThreadLocalVarUninit = internal thread_local(localexec) global i64 0, align 8
10@IThreadLocalVarUninit2 = internal thread_local(localexec) global i64 0, align 8
11declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
12
13define void @storeITLUninit(i64 noundef %x) {
14entry:
15  %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit)
16  store i64 %x, ptr %0, align 8
17  ret void
18}
19
20define i64 @loadTLInit() {
21entry:
22  %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @ThreadLocalVarInit)
23  %1 = load i64, ptr %0, align 8
24  %2 = load i64, ptr @VarInit, align 8
25  %add = add nsw i64 %2, %1
26  ret i64 %add
27}
28
29define signext i64 @loadTLUninit() {
30entry:
31  %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit)
32  store i64 1, ptr %0, align 8
33  %1 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit2)
34  %2 = load i64, ptr %1, align 8
35  %add = add nsw i64 %2, 1
36  ret i64 %add
37}
38
39; RELOC:      File:
40; RELOC-NEXT: Format: aix5coff64-rs6000
41; RELOC-NEXT: Arch: powerpc64
42; RELOC-NEXT: AddressSize: 64bit
43; RELOC-NEXT: Relocations [
44; RELOC:       Virtual Address: 0x2
45; RELOC-NEXT:       Symbol: IThreadLocalVarUninit ([[#NFA+19]])
46; RELOC-NEXT:       IsSigned: No
47; RELOC-NEXT:       FixupBitValue: 0
48; RELOC-NEXT:       Length: 16
49; RELOC-NEXT:       Type: R_TOCU (0x30)
50; RELOC-NEXT:     }
51; RELOC:       Virtual Address: 0x6
52; RELOC-NEXT:       Symbol: IThreadLocalVarUninit ([[#NFA+19]])
53; RELOC-NEXT:       IsSigned: No
54; RELOC-NEXT:       FixupBitValue: 0
55; RELOC-NEXT:       Length: 16
56; RELOC-NEXT:       Type: R_TOCL (0x31)
57; RELOC-NEXT:     }
58; RELOC:       Virtual Address: 0x12
59; RELOC-NEXT:       Symbol: ThreadLocalVarInit ([[#NFA+21]])
60; RELOC-NEXT:       IsSigned: No
61; RELOC-NEXT:       FixupBitValue: 0
62; RELOC-NEXT:       Length: 16
63; RELOC-NEXT:       Type: R_TOCU (0x30)
64; RELOC-NEXT:     }
65; RELOC:       Virtual Address: 0x1A
66; RELOC-NEXT:       Symbol: ThreadLocalVarInit ([[#NFA+21]])
67; RELOC-NEXT:       IsSigned: No
68; RELOC-NEXT:       FixupBitValue: 0
69; RELOC-NEXT:       Length: 16
70; RELOC-NEXT:       Type: R_TOCL (0x31)
71; RELOC-NEXT:     }
72; RELOC:       Virtual Address: 0x42
73; RELOC-NEXT:       Symbol: IThreadLocalVarUninit2 ([[#NFA+25]])
74; RELOC-NEXT:       IsSigned: No
75; RELOC-NEXT:       FixupBitValue: 0
76; RELOC-NEXT:       Length: 16
77; RELOC-NEXT:       Type: R_TOCU (0x30)
78; RELOC-NEXT:     }
79; RELOC:       Virtual Address: 0x46
80; RELOC-NEXT:       Symbol: IThreadLocalVarUninit2 ([[#NFA+25]])
81; RELOC-NEXT:       IsSigned: No
82; RELOC-NEXT:       FixupBitValue: 0
83; RELOC-NEXT:       Length: 16
84; RELOC-NEXT:       Type: R_TOCL (0x31)
85; RELOC-NEXT:     }
86; RELOC:       Virtual Address: 0xA8
87; RELOC-NEXT:       Symbol: IThreadLocalVarUninit ([[#NFA+29]])
88; RELOC-NEXT:       IsSigned: No
89; RELOC-NEXT:       FixupBitValue: 0
90; RELOC-NEXT:       Length: 64
91; RELOC-NEXT:       Type: R_TLS_LE (0x23)
92; RELOC-NEXT:     }
93; RELOC:       Virtual Address: 0xB0
94; RELOC-NEXT:       Symbol: ThreadLocalVarInit ([[#NFA+27]])
95; RELOC-NEXT:       IsSigned: No
96; RELOC-NEXT:       FixupBitValue: 0
97; RELOC-NEXT:       Length: 64
98; RELOC-NEXT:       Type: R_TLS_LE (0x23)
99; RELOC-NEXT:     }
100; RELOC:       Virtual Address: 0xC0
101; RELOC-NEXT:       Symbol: IThreadLocalVarUninit2 ([[#NFA+31]])
102; RELOC-NEXT:       IsSigned: No
103; RELOC-NEXT:       FixupBitValue: 0
104; RELOC-NEXT:       Length: 64
105; RELOC-NEXT:       Type: R_TLS_LE (0x23)
106; RELOC-NEXT:     }
107
108; SYM:      File:
109; SYM-NEXT: Format: aix5coff64-rs6000
110; SYM-NEXT: Arch: powerpc64
111; SYM-NEXT: AddressSize: 64bit
112; SYM-NEXT: Symbols [
113; SYM:     Index: [[#NFA+19]]
114; SYM-NEXT:     Name: IThreadLocalVarUninit
115; SYM-NEXT:     Value (RelocatableAddress): 0xA8
116; SYM-NEXT:     Section: .data
117; SYM-NEXT:     Type: 0x0
118; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
119; SYM-NEXT:     NumberOfAuxEntries: 1
120; SYM-NEXT:     CSECT Auxiliary Entry {
121; SYM-NEXT:       Index: [[#NFA+20]]
122; SYM-NEXT:       SectionLen: 8
123; SYM-NEXT:       ParameterHashIndex: 0x0
124; SYM-NEXT:       TypeChkSectNum: 0x0
125; SYM-NEXT:       SymbolAlignmentLog2: 3
126; SYM-NEXT:       SymbolType: XTY_SD (0x1)
127; SYM-NEXT:       StorageMappingClass: XMC_TE (0x16)
128; SYM-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
129; SYM-NEXT:     }
130; SYM-NEXT:   }
131; SYM:     Index: [[#NFA+21]]
132; SYM-NEXT:     Name: ThreadLocalVarInit
133; SYM-NEXT:     Value (RelocatableAddress): 0xB0
134; SYM-NEXT:     Section: .data
135; SYM-NEXT:     Type: 0x0
136; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
137; SYM-NEXT:     NumberOfAuxEntries: 1
138; SYM-NEXT:     CSECT Auxiliary Entry {
139; SYM-NEXT:       Index: [[#NFA+22]]
140; SYM-NEXT:       SectionLen: 8
141; SYM-NEXT:       ParameterHashIndex: 0x0
142; SYM-NEXT:       TypeChkSectNum: 0x0
143; SYM-NEXT:       SymbolAlignmentLog2: 3
144; SYM-NEXT:       SymbolType: XTY_SD (0x1)
145; SYM-NEXT:       StorageMappingClass: XMC_TE (0x16)
146; SYM-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
147; SYM-NEXT:     }
148; SYM:     Index: [[#NFA+25]]
149; SYM-NEXT:     Name: IThreadLocalVarUninit2
150; SYM-NEXT:     Value (RelocatableAddress): 0xC0
151; SYM-NEXT:     Section: .data
152; SYM-NEXT:     Type: 0x0
153; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
154; SYM-NEXT:     NumberOfAuxEntries: 1
155; SYM-NEXT:     CSECT Auxiliary Entry {
156; SYM-NEXT:       Index: [[#NFA+26]]
157; SYM-NEXT:       SectionLen: 8
158; SYM-NEXT:       ParameterHashIndex: 0x0
159; SYM-NEXT:       TypeChkSectNum: 0x0
160; SYM-NEXT:       SymbolAlignmentLog2: 3
161; SYM-NEXT:       SymbolType: XTY_SD (0x1)
162; SYM-NEXT:       StorageMappingClass: XMC_TE (0x16)
163; SYM-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
164; SYM-NEXT:     }
165; SYM-NEXT:   }
166; SYM:     Index: [[#NFA+27]]
167; SYM-NEXT:     Name: ThreadLocalVarInit
168; SYM-NEXT:     Value (RelocatableAddress): 0x0
169; SYM-NEXT:     Section: .tdata
170; SYM-NEXT:     Type: 0x0
171; SYM-NEXT:     StorageClass: C_EXT (0x2)
172; SYM-NEXT:     NumberOfAuxEntries: 1
173; SYM-NEXT:     CSECT Auxiliary Entry {
174; SYM-NEXT:       Index: [[#NFA+28]]
175; SYM-NEXT:       SectionLen: 8
176; SYM-NEXT:       ParameterHashIndex: 0x0
177; SYM-NEXT:       TypeChkSectNum: 0x0
178; SYM-NEXT:       SymbolAlignmentLog2: 3
179; SYM-NEXT:       SymbolType: XTY_SD (0x1)
180; SYM-NEXT:       StorageMappingClass: XMC_TL (0x14)
181; SYM-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
182; SYM-NEXT:     }
183; SYM-NEXT:   }
184; SYM:     Index: [[#NFA+29]]
185; SYM-NEXT:     Name: IThreadLocalVarUninit
186; SYM-NEXT:     Value (RelocatableAddress): 0x8
187; SYM-NEXT:     Section: .tbss
188; SYM-NEXT:     Type: 0x0
189; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
190; SYM-NEXT:     NumberOfAuxEntries: 1
191; SYM-NEXT:     CSECT Auxiliary Entry {
192; SYM-NEXT:       Index: [[#NFA+30]]
193; SYM-NEXT:       SectionLen: 8
194; SYM-NEXT:       ParameterHashIndex: 0x0
195; SYM-NEXT:       TypeChkSectNum: 0x0
196; SYM-NEXT:       SymbolAlignmentLog2: 3
197; SYM-NEXT:       SymbolType: XTY_CM (0x3)
198; SYM-NEXT:       StorageMappingClass: XMC_UL (0x15)
199; SYM-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
200; SYM-NEXT:     }
201; SYM-NEXT:   }
202; SYM:     Index: [[#NFA+31]]
203; SYM-NEXT:     Name: IThreadLocalVarUninit2
204; SYM-NEXT:     Value (RelocatableAddress): 0x10
205; SYM-NEXT:     Section: .tbss
206; SYM-NEXT:     Type: 0x0
207; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
208; SYM-NEXT:     NumberOfAuxEntries: 1
209; SYM-NEXT:     CSECT Auxiliary Entry {
210; SYM-NEXT:       Index: [[#NFA+32]]
211; SYM-NEXT:       SectionLen: 8
212; SYM-NEXT:       ParameterHashIndex: 0x0
213; SYM-NEXT:       TypeChkSectNum: 0x0
214; SYM-NEXT:       SymbolAlignmentLog2: 3
215; SYM-NEXT:       SymbolType: XTY_CM (0x3)
216; SYM-NEXT:       StorageMappingClass: XMC_UL (0x15)
217; SYM-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
218; SYM-NEXT:     }
219; SYM-NEXT:   }
220
221; DIS:      file format aix5coff64-rs6000
222; DIS:      Disassembly of section .text:
223; DIS:      0000000000000000 (idx: [[#NFA+3]]) .storeITLUninit:
224; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 4, 2, 0
225; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU	(idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]
226; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 4, 0(4)
227; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL	(idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]
228; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                stdx 3, 13, 4
229; DIS-NEXT:                                       blr
230; DIS:      0000000000000010 (idx: [[#NFA+5]]) .loadTLInit:
231; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
232; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU       (idx: [[#NFA+21]]) ThreadLocalVarInit[TE]
233; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 4, 2, 0
234; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU       (idx: [[#NFA+23]]) VarInit[TE]
235; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 3, 8(3)
236; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL       (idx: [[#NFA+21]]) ThreadLocalVarInit[TE]
237; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 4, 16(4)
238; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL       (idx: [[#NFA+23]]) VarInit[TE]
239; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                ldx 3, 13, 3
240; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 4, 0(4)
241; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                add 3, 4, 3
242; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                blr
243; DIS:      0000000000000030 (idx: [[#NFA+7]]) .loadTLUninit:
244; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
245; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU       (idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]
246; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                li 4, 1
247; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 3, 0(3)
248; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL       (idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]
249; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                stdx 4, 13, 3
250; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
251; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU       (idx: [[#NFA+25]]) IThreadLocalVarUninit2[TE]
252; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 3, 24(3)
253; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL       (idx: [[#NFA+25]]) IThreadLocalVarUninit2[TE]
254; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                ldx 3, 13, 3
255; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addi 3, 3, 1
256; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                blr
257
258; DIS:      Disassembly of section .data:
259; DIS:      0000000000000058 (idx: [[#NFA+9]]) VarInit[RW]:
260; DIS-NEXT:       58: 00 00 00 00
261; DIS-NEXT:       5c: 00 00 00 57
262; DIS:      0000000000000060 (idx: [[#NFA+11]]) storeITLUninit[DS]:
263; DIS-NEXT:       60: 00 00 00 00
264; DIS-NEXT: 0000000000000060:  R_POS        (idx: [[#NFA+3]]) .storeITLUninit
265; DIS-NEXT:       64: 00 00 00 00
266; DIS-NEXT:       68: 00 00 00 00
267; DIS-NEXT: 0000000000000068:  R_POS        (idx: [[#NFA+17]]) TOC[TC0]
268; DIS-NEXT:       6c: 00 00 00 a8
269; DIS:      0000000000000078 (idx: [[#NFA+13]]) loadTLInit[DS]:
270; DIS-NEXT:       78: 00 00 00 00
271; DIS-NEXT: 0000000000000078:  R_POS        (idx: [[#NFA+5]]) .loadTLInit
272; DIS-NEXT:       7c: 00 00 00 10
273; DIS-NEXT:       80: 00 00 00 00
274; DIS-NEXT: 0000000000000080:  R_POS        (idx: [[#NFA+17]]) TOC[TC0]
275; DIS-NEXT:       84: 00 00 00 a8
276; DIS:      0000000000000090 (idx: [[#NFA+15]]) loadTLUninit[DS]:
277; DIS-NEXT:       90: 00 00 00 00
278; DIS-NEXT: 0000000000000090:  R_POS        (idx: [[#NFA+7]]) .loadTLUninit
279; DIS-NEXT:       94: 00 00 00 30
280; DIS-NEXT:       98: 00 00 00 00
281; DIS-NEXT: 0000000000000098:  R_POS        (idx: [[#NFA+17]]) TOC[TC0]
282; DIS-NEXT:       9c: 00 00 00 a8
283; DIS:      00000000000000a8 (idx: [[#NFA+19]]) IThreadLocalVarUninit[TE]:
284; DIS-NEXT:       a8: 00 00 00 00
285; DIS-NEXT: 00000000000000a8:  R_TLS_LE     (idx: [[#NFA+29]]) IThreadLocalVarUninit[UL]
286; DIS-NEXT:       ac: 00 00 00 08
287; DIS:      00000000000000b0 (idx: [[#NFA+21]]) ThreadLocalVarInit[TE]:
288; DIS-NEXT:       b0: 00 00 00 00
289; DIS-NEXT: 00000000000000b0:  R_TLS_LE     (idx: [[#NFA+27]]) ThreadLocalVarInit[TL]
290; DIS-NEXT:       b4: 00 00 00 00
291; DIS:      00000000000000b8 (idx: [[#NFA+23]]) VarInit[TE]:
292; DIS-NEXT:       b8: 00 00 00 00
293; DIS-NEXT: 00000000000000b8:  R_POS        (idx: [[#NFA+9]]) VarInit[RW]
294; DIS-NEXT:       bc: 00 00 00 58
295; DIS:      00000000000000c0 (idx: [[#NFA+25]]) IThreadLocalVarUninit2[TE]:
296; DIS-NEXT:       c0: 00 00 00 00
297; DIS-NEXT: 00000000000000c0:  R_TLS_LE     (idx: [[#NFA+31]]) IThreadLocalVarUninit2[UL]
298; DIS-NEXT:       c4: 00 00 00 10
299
300; DIS:      Disassembly of section .tdata:
301; DIS:      0000000000000000 (idx: [[#NFA+27]]) ThreadLocalVarInit[TL]:
302; DIS-NEXT:        0: 00 00 00 00
303; DIS-NEXT:        4: 00 00 00 01
304
305; DIS:      Disassembly of section .tbss:
306; DIS:      0000000000000008 (idx: [[#NFA+29]]) IThreadLocalVarUninit[UL]:
307; DIS-NEXT: ...
308; DIS:      0000000000000010 (idx: [[#NFA+31]]) IThreadLocalVarUninit2[UL]:
309; DIS-NEXT: ...
310
311