1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \ 3; RUN: -mtriple powerpc64-ibm-aix-xcoff -mattr=-aix-small-local-exec-tls \ 4; RUN: < %s | FileCheck %s --check-prefixes=COMMONCM,SMALLCM64 5; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \ 6; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large \ 7; RUN: -mattr=-aix-small-local-exec-tls < %s | \ 8; RUN: FileCheck %s --check-prefixes=COMMONCM,LARGECM64 9 10; Test that the 'aix-small-tls' global variable attribute generates the 11; optimized small-local-exec TLS sequence. Global variables without this 12; attribute should still generate a TOC-based local-exec access sequence. 13 14declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) 15 16@a = thread_local(localexec) global [87 x i8] zeroinitializer, align 1 #0 17@a_noattr = thread_local(localexec) global [87 x i8] zeroinitializer, align 1 18@b = thread_local(localexec) global [87 x i16] zeroinitializer, align 2 #0 19@b_noattr = thread_local(localexec) global [87 x i16] zeroinitializer, align 2 20@c = thread_local(localexec) global [87 x i32] zeroinitializer, align 4 #0 21@c_noattr = thread_local(localexec) global [87 x i32] zeroinitializer, align 4 22@d = thread_local(localexec) global [87 x i64] zeroinitializer, align 8 #0 23@d_noattr = thread_local(localexec) global [87 x i64] zeroinitializer, align 8 #0 24 25@e = thread_local(localexec) global [87 x double] zeroinitializer, align 8 #0 26@e_noattr = thread_local(localexec) global [87 x double] zeroinitializer, align 8 27@f = thread_local(localexec) global [87 x float] zeroinitializer, align 4 #0 28@f_noattr = thread_local(localexec) global [87 x float] zeroinitializer, align 4 29 30define nonnull ptr @AddrTest1() { 31; COMMONCM-LABEL: AddrTest1: 32; COMMONCM: # %bb.0: # %entry 33; COMMONCM-NEXT: addi r3, r13, a[TL]@le+1 34; COMMONCM-NEXT: blr 35entry: 36 %tls0 = tail call align 1 ptr @llvm.threadlocal.address.p0(ptr align 1 @a) 37 %arrayidx = getelementptr inbounds [87 x i8], ptr %tls0, i64 0, i64 1 38 ret ptr %arrayidx 39} 40 41define nonnull ptr @AddrTest1_NoAttr() { 42; SMALLCM64-LABEL: AddrTest1_NoAttr: 43; SMALLCM64: # %bb.0: # %entry 44; SMALLCM64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @a_noattr 45; SMALLCM64-NEXT: add r3, r13, r3 46; SMALLCM64-NEXT: addi r3, r3, 1 47; SMALLCM64-NEXT: blr 48; 49; LARGECM64-LABEL: AddrTest1_NoAttr: 50; LARGECM64: # %bb.0: # %entry 51; LARGECM64-NEXT: addis r3, L..C0@u(r2) 52; LARGECM64-NEXT: ld r3, L..C0@l(r3) 53; LARGECM64-NEXT: add r3, r13, r3 54; LARGECM64-NEXT: addi r3, r3, 1 55; LARGECM64-NEXT: blr 56entry: 57 %tls0 = tail call align 1 ptr @llvm.threadlocal.address.p0(ptr align 1 @a_noattr) 58 %arrayidx = getelementptr inbounds [87 x i8], ptr %tls0, i64 0, i64 1 59 ret ptr %arrayidx 60} 61 62define nonnull ptr @AddrTest2() { 63; COMMONCM-LABEL: AddrTest2: 64; COMMONCM: # %bb.0: # %entry 65; COMMONCM-NEXT: addi r3, r13, b[TL]@le+4 66; COMMONCM-NEXT: blr 67entry: 68 %tls0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @b) 69 %arrayidx = getelementptr inbounds [87 x i16], ptr %tls0, i64 0, i64 2 70 ret ptr %arrayidx 71} 72 73define nonnull ptr @AddrTest2_NoAttr() { 74; SMALLCM64-LABEL: AddrTest2_NoAttr: 75; SMALLCM64: # %bb.0: # %entry 76; SMALLCM64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @b_noattr 77; SMALLCM64-NEXT: add r3, r13, r3 78; SMALLCM64-NEXT: addi r3, r3, 4 79; SMALLCM64-NEXT: blr 80; 81; LARGECM64-LABEL: AddrTest2_NoAttr: 82; LARGECM64: # %bb.0: # %entry 83; LARGECM64-NEXT: addis r3, L..C1@u(r2) 84; LARGECM64-NEXT: ld r3, L..C1@l(r3) 85; LARGECM64-NEXT: add r3, r13, r3 86; LARGECM64-NEXT: addi r3, r3, 4 87; LARGECM64-NEXT: blr 88entry: 89 %tls0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @b_noattr) 90 %arrayidx = getelementptr inbounds [87 x i16], ptr %tls0, i64 0, i64 2 91 ret ptr %arrayidx 92} 93 94define nonnull ptr @AddrTest3() { 95; COMMONCM-LABEL: AddrTest3: 96; COMMONCM: # %bb.0: # %entry 97; COMMONCM-NEXT: addi r3, r13, c[TL]@le+12 98; COMMONCM-NEXT: blr 99entry: 100 %tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @c) 101 %arrayidx = getelementptr inbounds [87 x i32], ptr %tls0, i64 0, i64 3 102 ret ptr %arrayidx 103} 104 105define nonnull ptr @AddrTest3_NoAttr() { 106; SMALLCM64-LABEL: AddrTest3_NoAttr: 107; SMALLCM64: # %bb.0: # %entry 108; SMALLCM64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @c_noattr 109; SMALLCM64-NEXT: add r3, r13, r3 110; SMALLCM64-NEXT: addi r3, r3, 12 111; SMALLCM64-NEXT: blr 112; 113; LARGECM64-LABEL: AddrTest3_NoAttr: 114; LARGECM64: # %bb.0: # %entry 115; LARGECM64-NEXT: addis r3, L..C2@u(r2) 116; LARGECM64-NEXT: ld r3, L..C2@l(r3) 117; LARGECM64-NEXT: add r3, r13, r3 118; LARGECM64-NEXT: addi r3, r3, 12 119; LARGECM64-NEXT: blr 120entry: 121 %tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @c_noattr) 122 %arrayidx = getelementptr inbounds [87 x i32], ptr %tls0, i64 0, i64 3 123 ret ptr %arrayidx 124} 125 126define nonnull ptr @AddrTest4() { 127; COMMONCM-LABEL: AddrTest4: 128; COMMONCM: # %bb.0: # %entry 129; COMMONCM-NEXT: addi r3, r13, c[TL]@le+56 130; COMMONCM-NEXT: blr 131entry: 132 %tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @c) 133 %arrayidx = getelementptr inbounds [87 x i64], ptr %tls0, i64 0, i64 7 134 ret ptr %arrayidx 135} 136 137define nonnull ptr @AddrTest4_NoAttr() { 138; SMALLCM64-LABEL: AddrTest4_NoAttr: 139; SMALLCM64: # %bb.0: # %entry 140; SMALLCM64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @c_noattr 141; SMALLCM64-NEXT: add r3, r13, r3 142; SMALLCM64-NEXT: addi r3, r3, 56 143; SMALLCM64-NEXT: blr 144; 145; LARGECM64-LABEL: AddrTest4_NoAttr: 146; LARGECM64: # %bb.0: # %entry 147; LARGECM64-NEXT: addis r3, L..C2@u(r2) 148; LARGECM64-NEXT: ld r3, L..C2@l(r3) 149; LARGECM64-NEXT: add r3, r13, r3 150; LARGECM64-NEXT: addi r3, r3, 56 151; LARGECM64-NEXT: blr 152entry: 153 %tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @c_noattr) 154 %arrayidx = getelementptr inbounds [87 x i64], ptr %tls0, i64 0, i64 7 155 ret ptr %arrayidx 156} 157 158define nonnull ptr @AddrTest5() { 159; COMMONCM-LABEL: AddrTest5: 160; COMMONCM: # %bb.0: # %entry 161; COMMONCM-NEXT: addi r3, r13, e[TL]@le+48 162; COMMONCM-NEXT: blr 163entry: 164 %tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @e) 165 %arrayidx = getelementptr inbounds [87 x double], ptr %tls0, i64 0, i64 6 166 ret ptr %arrayidx 167} 168 169define nonnull ptr @AddrTest5_NoAttr() { 170; SMALLCM64-LABEL: AddrTest5_NoAttr: 171; SMALLCM64: # %bb.0: # %entry 172; SMALLCM64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @e_noattr 173; SMALLCM64-NEXT: add r3, r13, r3 174; SMALLCM64-NEXT: addi r3, r3, 48 175; SMALLCM64-NEXT: blr 176; 177; LARGECM64-LABEL: AddrTest5_NoAttr: 178; LARGECM64: # %bb.0: # %entry 179; LARGECM64-NEXT: addis r3, L..C3@u(r2) 180; LARGECM64-NEXT: ld r3, L..C3@l(r3) 181; LARGECM64-NEXT: add r3, r13, r3 182; LARGECM64-NEXT: addi r3, r3, 48 183; LARGECM64-NEXT: blr 184entry: 185 %tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @e_noattr) 186 %arrayidx = getelementptr inbounds [87 x double], ptr %tls0, i64 0, i64 6 187 ret ptr %arrayidx 188} 189 190define nonnull ptr @AddrTest6() { 191; COMMONCM-LABEL: AddrTest6: 192; COMMONCM: # %bb.0: # %entry 193; COMMONCM-NEXT: addi r3, r13, f[TL]@le+16 194; COMMONCM-NEXT: blr 195entry: 196 %tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @f) 197 %arrayidx = getelementptr inbounds [87 x float], ptr %tls0, i64 0, i64 4 198 ret ptr %arrayidx 199} 200 201define nonnull ptr @AddrTest6_NoAttr() { 202; SMALLCM64-LABEL: AddrTest6_NoAttr: 203; SMALLCM64: # %bb.0: # %entry 204; SMALLCM64-NEXT: ld r3, L..C4(r2) # target-flags(ppc-tprel) @f_noattr 205; SMALLCM64-NEXT: add r3, r13, r3 206; SMALLCM64-NEXT: addi r3, r3, 16 207; SMALLCM64-NEXT: blr 208; 209; LARGECM64-LABEL: AddrTest6_NoAttr: 210; LARGECM64: # %bb.0: # %entry 211; LARGECM64-NEXT: addis r3, L..C4@u(r2) 212; LARGECM64-NEXT: ld r3, L..C4@l(r3) 213; LARGECM64-NEXT: add r3, r13, r3 214; LARGECM64-NEXT: addi r3, r3, 16 215; LARGECM64-NEXT: blr 216entry: 217 %tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @f_noattr) 218 %arrayidx = getelementptr inbounds [87 x float], ptr %tls0, i64 0, i64 4 219 ret ptr %arrayidx 220} 221 222attributes #0 = { "aix-small-tls" } 223