xref: /llvm-project/llvm/test/CodeGen/PowerPC/aix-small-tls-globalvarattr-funcattr.ll (revision 6bbccd2516c3a843809a8303da48abce58a88855)
1; RUN: llc  -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
2; RUN:      -mtriple powerpc64-ibm-aix-xcoff < %s \
3; RUN:      | FileCheck %s --check-prefixes=COMMONCM,CHECK-SMALLCM64
4; RUN: llc  -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
5; RUN:      -mtriple powerpc64-ibm-aix-xcoff --code-model=large \
6; RUN:      < %s | FileCheck %s --check-prefixes=COMMONCM,CHECK-LARGECM64
7
8@mySmallTLS = thread_local(localexec) global [7800 x i64] zeroinitializer, align 8 #0
9@mySmallTLS2 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8 #0
10@mySmallTLS3 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8
11declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
12
13; All accesses use a "faster" local-exec sequence directly off the thread pointer,
14; except for mySmallTLS, as this variable is over the 32KB size limit.
15define i64 @StoreLargeAccess1() #1 {
16; COMMONCM-LABEL:    StoreLargeAccess1:
17; COMMONCM-NEXT:     # %bb.0: # %entry
18; CHECK-SMALLCM64:                    ld r3, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
19; CHECK-SMALLCM64-NEXT:               li r4, 0
20; CHECK-SMALLCM64-NEXT:               li r5, 23
21; CHECK-LARGECM64:                    addis r3, L..C0@u(r2)
22; CHECK-LARGECM64-NEXT:               li r4, 0
23; CHECK-LARGECM64-NEXT:               li r5, 23
24; CHECK-LARGECM64-NEXT:               ld r3, L..C0@l(r3)
25; COMMONCM:                           ori r4, r4, 53328
26; COMMONCM-NEXT:                      add r3, r13, r3
27; COMMONCM-NEXT:                      stdx r5, r3, r4
28; COMMONCM-NEXT:                      li r3, 55
29; COMMONCM-NEXT:                      li r4, 64
30; COMMONCM-NEXT:                      std r3, (mySmallTLS2[TL]@le+696)-65536(r13)
31; COMMONCM-NEXT:                      li r3, 142
32; COMMONCM-NEXT:                      std r4, (mySmallTLS3[TL]@le+20000)-131072(r13)
33; COMMONCM-NEXT:                      blr
34entry:
35  %tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS)
36  %arrayidx = getelementptr inbounds i8, ptr %tls0, i32 53328
37  store i64 23, ptr %arrayidx, align 8
38  %tls1 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS2)
39  %arrayidx1 = getelementptr inbounds i8, ptr %tls1, i32 696
40  store i64 55, ptr %arrayidx1, align 8
41  %tls2 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS3)
42  %arrayidx2 = getelementptr inbounds i8, ptr %tls2, i32 20000
43  store i64 64, ptr %arrayidx2, align 8
44  %load1 = load i64, ptr %arrayidx, align 8
45  %load2 = load i64, ptr %arrayidx1, align 8
46  %add1 = add i64 %load1, 64
47  %add2 = add i64 %add1, %load2
48  ret i64 %add2
49}
50
51; Since this function does not have the 'aix-small-local-exec-tls` attribute,
52; only some local-exec variables should have the small-local-exec TLS access
53; sequence (as opposed to all of them).
54define i64 @StoreLargeAccess2() {
55; COMMONCM-LABEL:    StoreLargeAccess2:
56; COMMONCM-NEXT:     # %bb.0: # %entry
57; CHECK-SMALLCM64:         ld r5, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
58; CHECK-SMALLCM64-NEXT:    li r3, 0
59; CHECK-SMALLCM64-NEXT:    li r4, 23
60; CHECK-SMALLCM64-NEXT:    ori r3, r3, 53328
61; CHECK-SMALLCM64-NEXT:    add r5, r13, r5
62; CHECK-SMALLCM64-NEXT:    stdx r4, r5, r3
63; CHECK-SMALLCM64-NEXT:    ld r5, L..C1(r2) # target-flags(ppc-tprel) @mySmallTLS3
64; CHECK-SMALLCM64-NEXT:    li r3, 55
65; CHECK-SMALLCM64-NEXT:    li r4, 64
66; CHECK-SMALLCM64-NEXT:    std r3, mySmallTLS2[TL]@le+696(r13)
67; CHECK-SMALLCM64-NEXT:    add r3, r13, r5
68; CHECK-SMALLCM64-NEXT:    std r4, 20000(r3)
69; CHECK-SMALLCM64-NEXT:    li r3, 142
70; CHECK-LARGECM64:         addis r3, L..C0@u(r2)
71; CHECK-LARGECM64-NEXT:    li r4, 0
72; CHECK-LARGECM64-NEXT:    li r5, 23
73; CHECK-LARGECM64-NEXT:    ld r3, L..C0@l(r3)
74; CHECK-LARGECM64-NEXT:    ori r4, r4, 53328
75; CHECK-LARGECM64-NEXT:    add r3, r13, r3
76; CHECK-LARGECM64-NEXT:    stdx r5, r3, r4
77; CHECK-LARGECM64-NEXT:    addis r3, L..C1@u(r2)
78; CHECK-LARGECM64-NEXT:    li r5, 64
79; CHECK-LARGECM64-NEXT:    li r4, 55
80; CHECK-LARGECM64-NEXT:    ld r3, L..C1@l(r3)
81; CHECK-LARGECM64-NEXT:    std r4, mySmallTLS2[TL]@le+696(r13)
82; CHECK-LARGECM64-NEXT:    add r3, r13, r3
83; CHECK-LARGECM64-NEXT:    std r5, 20000(r3)
84; CHECK-LARGECM64-NEXT:    li r3, 142
85; COMMONCM-NEXT:           blr
86;
87entry:
88  %tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS)
89  %arrayidx = getelementptr inbounds i8, ptr %tls0, i32 53328
90  store i64 23, ptr %arrayidx, align 8
91  %tls1 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS2)
92  %arrayidx1 = getelementptr inbounds i8, ptr %tls1, i32 696
93  store i64 55, ptr %arrayidx1, align 8
94  %tls2 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS3)
95  %arrayidx2 = getelementptr inbounds i8, ptr %tls2, i32 20000
96  store i64 64, ptr %arrayidx2, align 8
97  %load1 = load i64, ptr %arrayidx, align 8
98  %load2 = load i64, ptr %arrayidx1, align 8
99  %add1 = add i64 %load1, 64
100  %add2 = add i64 %add1, %load2
101  ret i64 %add2
102}
103
104attributes #0 = { "aix-small-tls" }
105attributes #1 = { "target-features"="+aix-small-local-exec-tls" }
106