1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ 3; RUN: -mattr=+aix-shared-lib-tls-model-opt --code-model=large < %s | FileCheck %s --check-prefixes=OPT 4; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ 5; RUN: -mattr=+aix-small-local-dynamic-tls --code-model=large < %s | FileCheck %s --check-prefixes=SMALL 6; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ 7; RUN: -mattr=+aix-shared-lib-tls-model-opt -mattr=+aix-small-local-dynamic-tls \ 8; RUN: --code-model=large < %s | FileCheck %s --check-prefixes=BOTH 9 10@VarTLSLD1 = internal thread_local(localdynamic) global i32 42, align 4 11 12define i32 @Single_LD(i32 %P, i32 %Q) { 13; OPT-LABEL: Single_LD: 14; OPT: # %bb.0: # %entry 15; OPT-NEXT: and 4, 3, 4 16; OPT-NEXT: addis 3, L..C0@u(2) 17; OPT-NEXT: ld 3, L..C0@l(3) 18; OPT-NEXT: cmpwi 4, -1 19; OPT-NEXT: lwzx 3, 13, 3 20; OPT-NEXT: blr 21; 22; SMALL-LABEL: Single_LD: 23; SMALL: # %bb.0: # %entry 24; SMALL-NEXT: mflr 0 25; SMALL-NEXT: stdu 1, -48(1) 26; SMALL-NEXT: and 6, 3, 4 27; SMALL-NEXT: addis 3, L..C0@u(2) 28; SMALL-NEXT: std 0, 64(1) 29; SMALL-NEXT: ld 3, L..C0@l(3) 30; SMALL-NEXT: bla .__tls_get_mod[PR] 31; SMALL-NEXT: cmpwi 6, -1 32; SMALL-NEXT: lwz 3, VarTLSLD1[TL]@ld(3) 33; SMALL-NEXT: addi 1, 1, 48 34; SMALL-NEXT: ld 0, 16(1) 35; SMALL-NEXT: mtlr 0 36; SMALL-NEXT: blr 37; 38; BOTH-LABEL: Single_LD: 39; BOTH: # %bb.0: # %entry 40; BOTH-NEXT: and 4, 3, 4 41; BOTH-NEXT: addis 3, L..C0@u(2) 42; BOTH-NEXT: ld 3, L..C0@l(3) 43; BOTH-NEXT: cmpwi 4, -1 44; BOTH-NEXT: lwzx 3, 13, 3 45; BOTH-NEXT: blr 46entry: 47 %a = icmp slt i32 %P, 0 48 %b = icmp slt i32 %Q, 0 49 %c = and i1 %a, %b 50 %tls1 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @VarTLSLD1) 51 %load1 = load i32, ptr %tls1, align 4 52 br i1 %c, label %bb1, label %return 53 54bb1: 55 %tls2 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @VarTLSLD1) 56 %load2 = load i32, ptr %tls2, align 4 57 ret i32 %load2 58 59return: 60 ret i32 %load1 61} 62 63; OPT-LABEL: .toc 64; OPT-LABEL: L..C0: 65; OPT-NEXT: .tc VarTLSLD1[TE],VarTLSLD1[TL]@ie 66 67; SMALL-LABEL: .toc 68; SMALL-LABEL: L..C0: 69; SMALL-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml 70; SMALL-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML" 71 72; BOTH-LABEL: .toc 73; BOTH-LABEL: L..C0: 74; BOTH-NEXT: .tc VarTLSLD1[TE],VarTLSLD1[TL]@ie 75