1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -ppc-vsr-nums-as-vr \ 3; RUN: -ppc-asm-full-reg-names -global-isel -o - < %s | FileCheck %s 4 5; Test returning vectors in functions 6define <16 x i8> @test_ret_v16i8(<16 x i8> %a){ 7; CHECK-LABEL: test_ret_v16i8: 8; CHECK: # %bb.0: 9; CHECK-NEXT: blr 10 ret <16 x i8> %a 11} 12 13define <8 x i16> @test_ret_v8i16(<8 x i16> %a){ 14; CHECK-LABEL: test_ret_v8i16: 15; CHECK: # %bb.0: 16; CHECK-NEXT: blr 17 ret <8 x i16> %a 18} 19 20define <4 x i32> @test_ret_v4i32(<4 x i32> %a){ 21; CHECK-LABEL: test_ret_v4i32: 22; CHECK: # %bb.0: 23; CHECK-NEXT: blr 24 ret <4 x i32> %a 25} 26 27define <2 x i64> @test_ret_v2i64(<2 x i64> %a){ 28; CHECK-LABEL: test_ret_v2i64: 29; CHECK: # %bb.0: 30; CHECK-NEXT: blr 31 ret <2 x i64> %a 32} 33 34define <4 x float> @test_ret_v4f32(<4 x float> %a){ 35; CHECK-LABEL: test_ret_v4f32: 36; CHECK: # %bb.0: 37; CHECK-NEXT: blr 38 ret <4 x float> %a 39} 40 41define <2 x double> @test_ret_v2f64(<2 x double> %a){ 42; CHECK-LABEL: test_ret_v2f64: 43; CHECK: # %bb.0: 44; CHECK-NEXT: blr 45 ret <2 x double> %a 46} 47 48; Test simple bitcasting of vectors 49define <16 x i8> @test_bitcast_v16i8_v16i8(<16 x i8> %a){ 50; CHECK-LABEL: test_bitcast_v16i8_v16i8: 51; CHECK: # %bb.0: 52; CHECK-NEXT: blr 53 %res = bitcast <16 x i8> %a to <16 x i8> 54 ret <16 x i8> %res 55} 56 57define <16 x i8> @test_bitcast_v16i8_v8i16(<8 x i16> %a){ 58; CHECK-LABEL: test_bitcast_v16i8_v8i16: 59; CHECK: # %bb.0: 60; CHECK-NEXT: blr 61 %res = bitcast <8 x i16> %a to <16 x i8> 62 ret <16 x i8> %res 63} 64 65define <16 x i8> @test_bitcast_v16i8_v4i32(<4 x i32> %a){ 66; CHECK-LABEL: test_bitcast_v16i8_v4i32: 67; CHECK: # %bb.0: 68; CHECK-NEXT: blr 69 %res = bitcast <4 x i32> %a to <16 x i8> 70 ret <16 x i8> %res 71} 72 73define <16 x i8> @test_bitcast_v16i8_v2i64(<2 x i64> %a){ 74; CHECK-LABEL: test_bitcast_v16i8_v2i64: 75; CHECK: # %bb.0: 76; CHECK-NEXT: blr 77 %res = bitcast <2 x i64> %a to <16 x i8> 78 ret <16 x i8> %res 79} 80 81define <16 x i8> @test_bitcast_v16i8_v4f32(<4 x float> %a){ 82; CHECK-LABEL: test_bitcast_v16i8_v4f32: 83; CHECK: # %bb.0: 84; CHECK-NEXT: blr 85 %res = bitcast <4 x float> %a to <16 x i8> 86 ret <16 x i8> %res 87} 88 89define <16 x i8> @test_bitcast_v16i8_v2f64(<2 x double> %a){ 90; CHECK-LABEL: test_bitcast_v16i8_v2f64: 91; CHECK: # %bb.0: 92; CHECK-NEXT: blr 93 %res = bitcast <2 x double> %a to <16 x i8> 94 ret <16 x i8> %res 95} 96 97define <8 x i16> @test_bitcast_v8i16_v16i8(<16 x i8> %a) { 98; CHECK-LABEL: test_bitcast_v8i16_v16i8: 99; CHECK: # %bb.0: 100; CHECK-NEXT: blr 101 %res = bitcast <16 x i8> %a to <8 x i16> 102 ret <8 x i16> %res 103} 104 105define <8 x i16> @test_bitcast_v8i16_v8i16(<8 x i16> %a) { 106; CHECK-LABEL: test_bitcast_v8i16_v8i16: 107; CHECK: # %bb.0: 108; CHECK-NEXT: blr 109 %res = bitcast <8 x i16> %a to <8 x i16> 110 ret <8 x i16> %res 111} 112 113define <8 x i16> @test_bitcast_v8i16_v4i32(<4 x i32> %a) { 114; CHECK-LABEL: test_bitcast_v8i16_v4i32: 115; CHECK: # %bb.0: 116; CHECK-NEXT: blr 117 %res = bitcast <4 x i32> %a to <8 x i16> 118 ret <8 x i16> %res 119} 120 121define <8 x i16> @test_bitcast_v8i16_v2i64(<2 x i64> %a) { 122; CHECK-LABEL: test_bitcast_v8i16_v2i64: 123; CHECK: # %bb.0: 124; CHECK-NEXT: blr 125 %res = bitcast <2 x i64> %a to <8 x i16> 126 ret <8 x i16> %res 127} 128 129define <8 x i16> @test_bitcast_v8i16_v4f32(<4 x float> %a){ 130; CHECK-LABEL: test_bitcast_v8i16_v4f32: 131; CHECK: # %bb.0: 132; CHECK-NEXT: blr 133 %res = bitcast <4 x float> %a to <8 x i16> 134 ret <8 x i16> %res 135} 136 137define <8 x i16> @test_bitcast_v8i16_v2f64(<2 x double> %a){ 138; CHECK-LABEL: test_bitcast_v8i16_v2f64: 139; CHECK: # %bb.0: 140; CHECK-NEXT: blr 141 %res = bitcast <2 x double> %a to <8 x i16> 142 ret <8 x i16> %res 143} 144 145define <4 x i32> @test_bitcast_v4i32_v16i8(<16 x i8> %a) { 146; CHECK-LABEL: test_bitcast_v4i32_v16i8: 147; CHECK: # %bb.0: 148; CHECK-NEXT: blr 149 %res = bitcast <16 x i8> %a to <4 x i32> 150 ret <4 x i32> %res 151} 152 153define <4 x i32> @test_bitcast_v4i32_v8i16(<8 x i16> %a) { 154; CHECK-LABEL: test_bitcast_v4i32_v8i16: 155; CHECK: # %bb.0: 156; CHECK-NEXT: blr 157 %res = bitcast <8 x i16> %a to <4 x i32> 158 ret <4 x i32> %res 159} 160 161define <4 x i32> @test_bitcast_v4i32_v4i32(<4 x i32> %a) { 162; CHECK-LABEL: test_bitcast_v4i32_v4i32: 163; CHECK: # %bb.0: 164; CHECK-NEXT: blr 165 %res = bitcast <4 x i32> %a to <4 x i32> 166 ret <4 x i32> %res 167} 168 169define <4 x i32> @test_bitcast_v4i32_v2i64(<2 x i64> %a) { 170; CHECK-LABEL: test_bitcast_v4i32_v2i64: 171; CHECK: # %bb.0: 172; CHECK-NEXT: blr 173 %res = bitcast <2 x i64> %a to <4 x i32> 174 ret <4 x i32> %res 175} 176 177define <4 x i32> @test_bitcast_v4i32_v4f32(<4 x float> %a){ 178; CHECK-LABEL: test_bitcast_v4i32_v4f32: 179; CHECK: # %bb.0: 180; CHECK-NEXT: blr 181 %res = bitcast <4 x float> %a to <4 x i32> 182 ret <4 x i32> %res 183} 184 185define <4 x i32> @test_bitcast_v4i32_v2f64(<2 x double> %a){ 186; CHECK-LABEL: test_bitcast_v4i32_v2f64: 187; CHECK: # %bb.0: 188; CHECK-NEXT: blr 189 %res = bitcast <2 x double> %a to <4 x i32> 190 ret <4 x i32> %res 191} 192 193define <2 x i64> @test_bitcast_v2i64_v16i8(<16 x i8> %a) { 194; CHECK-LABEL: test_bitcast_v2i64_v16i8: 195; CHECK: # %bb.0: 196; CHECK-NEXT: blr 197 %res = bitcast <16 x i8> %a to <2 x i64> 198 ret <2 x i64> %res 199} 200 201define <2 x i64> @test_bitcast_v2i64_v8i16(<8 x i16> %a) { 202; CHECK-LABEL: test_bitcast_v2i64_v8i16: 203; CHECK: # %bb.0: 204; CHECK-NEXT: blr 205 %res = bitcast <8 x i16> %a to <2 x i64> 206 ret <2 x i64> %res 207} 208 209define <2 x i64> @test_bitcast_v2i64_v4i32(<4 x i32> %a) { 210; CHECK-LABEL: test_bitcast_v2i64_v4i32: 211; CHECK: # %bb.0: 212; CHECK-NEXT: blr 213 %res = bitcast <4 x i32> %a to <2 x i64> 214 ret <2 x i64> %res 215} 216 217define <2 x i64> @test_bitcast_v2i64_v2i64(<2 x i64> %a) { 218; CHECK-LABEL: test_bitcast_v2i64_v2i64: 219; CHECK: # %bb.0: 220; CHECK-NEXT: blr 221 %res = bitcast <2 x i64> %a to <2 x i64> 222 ret <2 x i64> %res 223} 224 225define <2 x i64> @test_bitcast_v2i64_v4f32(<4 x float> %a){ 226; CHECK-LABEL: test_bitcast_v2i64_v4f32: 227; CHECK: # %bb.0: 228; CHECK-NEXT: blr 229 %res = bitcast <4 x float> %a to <2 x i64> 230 ret <2 x i64> %res 231} 232 233define <2 x i64> @test_bitcast_v2i64_v2f64(<2 x double> %a){ 234; CHECK-LABEL: test_bitcast_v2i64_v2f64: 235; CHECK: # %bb.0: 236; CHECK-NEXT: blr 237 %res = bitcast <2 x double> %a to <2 x i64> 238 ret <2 x i64> %res 239} 240 241define <4 x float> @test_bitcast_v4f32_v16i8(<16 x i8> %a) { 242; CHECK-LABEL: test_bitcast_v4f32_v16i8: 243; CHECK: # %bb.0: 244; CHECK-NEXT: blr 245 %res = bitcast <16 x i8> %a to <4 x float> 246 ret <4 x float> %res 247} 248 249define <4 x float> @test_bitcast_v4f32_v8i16(<8 x i16> %a) { 250; CHECK-LABEL: test_bitcast_v4f32_v8i16: 251; CHECK: # %bb.0: 252; CHECK-NEXT: blr 253 %res = bitcast <8 x i16> %a to <4 x float> 254 ret <4 x float> %res 255} 256 257define <4 x float> @test_bitcast_v4f32_v4i32(<4 x i32> %a) { 258; CHECK-LABEL: test_bitcast_v4f32_v4i32: 259; CHECK: # %bb.0: 260; CHECK-NEXT: blr 261 %res = bitcast <4 x i32> %a to <4 x float> 262 ret <4 x float> %res 263} 264 265define <4 x float> @test_bitcast_v4f32_v2i64(<2 x i64> %a) { 266; CHECK-LABEL: test_bitcast_v4f32_v2i64: 267; CHECK: # %bb.0: 268; CHECK-NEXT: blr 269 %res = bitcast <2 x i64> %a to <4 x float> 270 ret <4 x float> %res 271} 272 273define <4 x float> @test_bitcast_v4f32_v4f32(<4 x float> %a){ 274; CHECK-LABEL: test_bitcast_v4f32_v4f32: 275; CHECK: # %bb.0: 276; CHECK-NEXT: blr 277 %res = bitcast <4 x float> %a to <4 x float> 278 ret <4 x float> %res 279} 280 281define <4 x float> @test_bitcast_v4f32_v2f64(<2 x double> %a){ 282; CHECK-LABEL: test_bitcast_v4f32_v2f64: 283; CHECK: # %bb.0: 284; CHECK-NEXT: blr 285 %res = bitcast <2 x double> %a to <4 x float> 286 ret <4 x float> %res 287} 288 289define <2 x double> @test_bitcast_v2f64_v16i8(<16 x i8> %a) { 290; CHECK-LABEL: test_bitcast_v2f64_v16i8: 291; CHECK: # %bb.0: 292; CHECK-NEXT: blr 293 %res = bitcast <16 x i8> %a to <2 x double> 294 ret <2 x double> %res 295} 296 297define <2 x double> @test_bitcast_v2f64_v8i16(<8 x i16> %a) { 298; CHECK-LABEL: test_bitcast_v2f64_v8i16: 299; CHECK: # %bb.0: 300; CHECK-NEXT: blr 301 %res = bitcast <8 x i16> %a to <2 x double> 302 ret <2 x double> %res 303} 304 305define <2 x double> @test_bitcast_v2f64_v4i32(<4 x i32> %a) { 306; CHECK-LABEL: test_bitcast_v2f64_v4i32: 307; CHECK: # %bb.0: 308; CHECK-NEXT: blr 309 %res = bitcast <4 x i32> %a to <2 x double> 310 ret <2 x double> %res 311} 312 313define <2 x double> @test_bitcast_v2f64_v2i64(<2 x i64> %a) { 314; CHECK-LABEL: test_bitcast_v2f64_v2i64: 315; CHECK: # %bb.0: 316; CHECK-NEXT: blr 317 %res = bitcast <2 x i64> %a to <2 x double> 318 ret <2 x double> %res 319} 320 321define <2 x double> @test_bitcast_v2f64_v4f32(<4 x float> %a){ 322; CHECK-LABEL: test_bitcast_v2f64_v4f32: 323; CHECK: # %bb.0: 324; CHECK-NEXT: blr 325 %res = bitcast <4 x float> %a to <2 x double> 326 ret <2 x double> %res 327} 328 329define <2 x double> @test_bitcast_v2f64_v2f64(<2 x double> %a){ 330; CHECK-LABEL: test_bitcast_v2f64_v2f64: 331; CHECK: # %bb.0: 332; CHECK-NEXT: blr 333 %res = bitcast <2 x double> %a to <2 x double> 334 ret <2 x double> %res 335} 336 337