xref: /llvm-project/llvm/test/CodeGen/PowerPC/GlobalISel/ppc-isel-arithmentic.ll (revision 2b1e895afb5b79b076db07d51b6118183356e68d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple ppc64le-linux -ppc-asm-full-reg-names -global-isel -o - < %s \
3; RUN:     | FileCheck %s
4
5define i8 @test_addi8(i8 %a, i8 %b) {
6; CHECK-LABEL: test_addi8:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    add r3, r3, r4
9; CHECK-NEXT:    blr
10  %res = add i8 %a, %b
11  ret i8 %res
12}
13
14define i16 @test_addi16(i16 %a, i16 %b) {
15; CHECK-LABEL: test_addi16:
16; CHECK:       # %bb.0:
17; CHECK-NEXT:    add r3, r3, r4
18; CHECK-NEXT:    blr
19  %res = add i16 %a, %b
20  ret i16 %res
21}
22
23define i32 @test_addi32(i32 %a, i32 %b) {
24; CHECK-LABEL: test_addi32:
25; CHECK:       # %bb.0:
26; CHECK-NEXT:    add r3, r3, r4
27; CHECK-NEXT:    blr
28  %res = add i32 %a, %b
29  ret i32 %res
30}
31
32define i64 @test_addi64(i64 %a, i64 %b) {
33; CHECK-LABEL: test_addi64:
34; CHECK:       # %bb.0:
35; CHECK-NEXT:    add r3, r3, r4
36; CHECK-NEXT:    blr
37  %res = add i64 %a, %b
38  ret i64 %res
39}
40
41define i8 @test_subi8(i8 %a, i8 %b) {
42; CHECK-LABEL: test_subi8:
43; CHECK:       # %bb.0:
44; CHECK-NEXT:    sub r3, r3, r4
45; CHECK-NEXT:    blr
46  %res = sub i8 %a, %b
47  ret i8 %res
48}
49
50define i16 @test_subi16(i16 %a, i16 %b) {
51; CHECK-LABEL: test_subi16:
52; CHECK:       # %bb.0:
53; CHECK-NEXT:    sub r3, r3, r4
54; CHECK-NEXT:    blr
55  %res = sub i16 %a, %b
56  ret i16 %res
57}
58
59define i32 @test_subi32(i32 %a, i32 %b) {
60; CHECK-LABEL: test_subi32:
61; CHECK:       # %bb.0:
62; CHECK-NEXT:    sub r3, r3, r4
63; CHECK-NEXT:    blr
64  %res = sub i32 %a, %b
65  ret i32 %res
66}
67
68define i64 @test_subi64(i64 %a, i64 %b) {
69; CHECK-LABEL: test_subi64:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    sub r3, r3, r4
72; CHECK-NEXT:    blr
73  %res = sub i64 %a, %b
74  ret i64 %res
75}
76