1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -global-isel -o - \ 3; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -verify-machineinstrs < %s | FileCheck %s 4 5define signext i32 @load_signext_i32(ptr %ptr) { 6; CHECK-LABEL: load_signext_i32: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: lwa r3, 0(r3) 9; CHECK-NEXT: blr 10entry: 11 %ret = load i32, ptr %ptr, align 4 12 ret i32 %ret 13} 14 15define zeroext i32 @load_zeroext_i32(ptr %ptr) { 16; CHECK-LABEL: load_zeroext_i32: 17; CHECK: # %bb.0: # %entry 18; CHECK-NEXT: lwz r3, 0(r3) 19; CHECK-NEXT: blr 20entry: 21 %ret = load i32, ptr %ptr, align 4 22 ret i32 %ret 23} 24 25define float @load_float(ptr %ptr) { 26; CHECK-LABEL: load_float: 27; CHECK: # %bb.0: # %entry 28; CHECK-NEXT: lfs f1, 0(r3) 29; CHECK-NEXT: blr 30entry: 31 %ret = load float, ptr %ptr, align 4 32 ret float %ret 33} 34 35define void @store_i32(ptr %p) { 36; CHECK-LABEL: store_i32: 37; CHECK: # %bb.0: # %entry 38; CHECK-NEXT: li r4, 100 39; CHECK-NEXT: stw r4, 0(r3) 40; CHECK-NEXT: blr 41entry: 42 store i32 100, ptr %p, align 4 43 ret void 44} 45 46define void @store_float(ptr %ptr, float %a) { 47; CHECK-LABEL: store_float: 48; CHECK: # %bb.0: # %entry 49; CHECK-NEXT: stfs f1, 0(r3) 50; CHECK-NEXT: blr 51entry: 52 store float %a, ptr %ptr, align 4 53 ret void 54} 55