xref: /llvm-project/llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-vectors.ll (revision 6126356d829be32e2195b8ddf8b908ab417ff7f5) 
1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -global-isel \
3; RUN:     -verify-machineinstrs -stop-after=irtranslator < %s | FileCheck %s
4
5; Pass up to twelve vector arguments in registers.
6define void @test_vec1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, <4 x i32> %e, <4 x i32> %f, <4 x i32> %g, <4 x i32> %h, <4 x i32> %i, <4 x i32> %j, <4 x i32> %k, <4 x i32> %l) {
7  ; CHECK-LABEL: name: test_vec1
8  ; CHECK: bb.1.entry:
9  ; CHECK-NEXT:   liveins: $v2, $v3, $v4, $v5, $v6, $v7, $v8, $v9, $v10, $v11, $v12, $v13
10  ; CHECK-NEXT: {{  $}}
11  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $v2
12  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $v3
13  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<4 x s32>) = COPY $v4
14  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<4 x s32>) = COPY $v5
15  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<4 x s32>) = COPY $v6
16  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<4 x s32>) = COPY $v7
17  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<4 x s32>) = COPY $v8
18  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<4 x s32>) = COPY $v9
19  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(<4 x s32>) = COPY $v10
20  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(<4 x s32>) = COPY $v11
21  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(<4 x s32>) = COPY $v12
22  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(<4 x s32>) = COPY $v13
23  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
24entry:
25  ret void
26}
27
28define void @test_vec2(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, <2 x i64> %d, <2 x i64> %e, <2 x i64> %f, <2 x i64> %g, <2 x i64> %h, <2 x i64> %i, <2 x i64> %j, <2 x i64> %k, <2 x i64> %l) {
29  ; CHECK-LABEL: name: test_vec2
30  ; CHECK: bb.1.entry:
31  ; CHECK-NEXT:   liveins: $v2, $v3, $v4, $v5, $v6, $v7, $v8, $v9, $v10, $v11, $v12, $v13
32  ; CHECK-NEXT: {{  $}}
33  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $v2
34  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $v3
35  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<2 x s64>) = COPY $v4
36  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<2 x s64>) = COPY $v5
37  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<2 x s64>) = COPY $v6
38  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<2 x s64>) = COPY $v7
39  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<2 x s64>) = COPY $v8
40  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<2 x s64>) = COPY $v9
41  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(<2 x s64>) = COPY $v10
42  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(<2 x s64>) = COPY $v11
43  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(<2 x s64>) = COPY $v12
44  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(<2 x s64>) = COPY $v13
45  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
46entry:
47  ret void
48}
49
50define void @test_vec3(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, <8 x i16> %d, <8 x i16> %e, <8 x i16> %f, <8 x i16> %g, <8 x i16> %h, <8 x i16> %i, <8 x i16> %j, <8 x i16> %k, <8 x i16> %l) {
51  ; CHECK-LABEL: name: test_vec3
52  ; CHECK: bb.1.entry:
53  ; CHECK-NEXT:   liveins: $v2, $v3, $v4, $v5, $v6, $v7, $v8, $v9, $v10, $v11, $v12, $v13
54  ; CHECK-NEXT: {{  $}}
55  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $v2
56  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<8 x s16>) = COPY $v3
57  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<8 x s16>) = COPY $v4
58  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<8 x s16>) = COPY $v5
59  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<8 x s16>) = COPY $v6
60  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<8 x s16>) = COPY $v7
61  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<8 x s16>) = COPY $v8
62  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<8 x s16>) = COPY $v9
63  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(<8 x s16>) = COPY $v10
64  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(<8 x s16>) = COPY $v11
65  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(<8 x s16>) = COPY $v12
66  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(<8 x s16>) = COPY $v13
67  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
68entry:
69  ret void
70}
71
72define void @test_vec4(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d, <16 x i8> %e, <16 x i8> %f, <16 x i8> %g, <16 x i8> %h, <16 x i8> %i, <16 x i8> %j, <16 x i8> %k, <16 x i8> %l) {
73  ; CHECK-LABEL: name: test_vec4
74  ; CHECK: bb.1.entry:
75  ; CHECK-NEXT:   liveins: $v2, $v3, $v4, $v5, $v6, $v7, $v8, $v9, $v10, $v11, $v12, $v13
76  ; CHECK-NEXT: {{  $}}
77  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $v2
78  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $v3
79  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<16 x s8>) = COPY $v4
80  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<16 x s8>) = COPY $v5
81  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<16 x s8>) = COPY $v6
82  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<16 x s8>) = COPY $v7
83  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<16 x s8>) = COPY $v8
84  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<16 x s8>) = COPY $v9
85  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(<16 x s8>) = COPY $v10
86  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(<16 x s8>) = COPY $v11
87  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(<16 x s8>) = COPY $v12
88  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(<16 x s8>) = COPY $v13
89  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
90entry:
91  ret void
92}
93
94define void @test_vec5(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, <4 x float> %f, <4 x float> %g, <4 x float> %h, <4 x float> %i, <4 x float> %j, <4 x float> %k, <4 x float> %l) {
95  ; CHECK-LABEL: name: test_vec5
96  ; CHECK: bb.1.entry:
97  ; CHECK-NEXT:   liveins: $v2, $v3, $v4, $v5, $v6, $v7, $v8, $v9, $v10, $v11, $v12, $v13
98  ; CHECK-NEXT: {{  $}}
99  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $v2
100  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $v3
101  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<4 x s32>) = COPY $v4
102  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<4 x s32>) = COPY $v5
103  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<4 x s32>) = COPY $v6
104  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<4 x s32>) = COPY $v7
105  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<4 x s32>) = COPY $v8
106  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<4 x s32>) = COPY $v9
107  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(<4 x s32>) = COPY $v10
108  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(<4 x s32>) = COPY $v11
109  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(<4 x s32>) = COPY $v12
110  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(<4 x s32>) = COPY $v13
111  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
112entry:
113  ret void
114}
115
116define void @test_vec6(<2 x double> %a, <2 x double> %b, <2 x double> %c, <2 x double> %d, <2 x double> %e, <2 x double> %f, <2 x double> %g, <2 x double> %h, <2 x double> %i, <2 x double> %j, <2 x double> %k, <2 x double> %l) {
117  ; CHECK-LABEL: name: test_vec6
118  ; CHECK: bb.1.entry:
119  ; CHECK-NEXT:   liveins: $v2, $v3, $v4, $v5, $v6, $v7, $v8, $v9, $v10, $v11, $v12, $v13
120  ; CHECK-NEXT: {{  $}}
121  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $v2
122  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $v3
123  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<2 x s64>) = COPY $v4
124  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<2 x s64>) = COPY $v5
125  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<2 x s64>) = COPY $v6
126  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<2 x s64>) = COPY $v7
127  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<2 x s64>) = COPY $v8
128  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<2 x s64>) = COPY $v9
129  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(<2 x s64>) = COPY $v10
130  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(<2 x s64>) = COPY $v11
131  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(<2 x s64>) = COPY $v12
132  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(<2 x s64>) = COPY $v13
133  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
134entry:
135  ret void
136}
137
138define void @test_vec7(<1 x i128> %a, <1 x i128> %b, <1 x i128> %c, <1 x i128> %d, <1 x i128> %e, <1 x i128> %f, <1 x i128> %g, <1 x i128> %h, <1 x i128> %i, <1 x i128> %j, <1 x i128> %k, <1 x i128> %l) {
139  ; CHECK-LABEL: name: test_vec7
140  ; CHECK: bb.1.entry:
141  ; CHECK-NEXT:   liveins: $v2, $v3, $v4, $v5, $v6, $v7, $v8, $v9, $v10, $v11, $v12, $v13
142  ; CHECK-NEXT: {{  $}}
143  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s128) = COPY $v2
144  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s128) = COPY $v3
145  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s128) = COPY $v4
146  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s128) = COPY $v5
147  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s128) = COPY $v6
148  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(s128) = COPY $v7
149  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(s128) = COPY $v8
150  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(s128) = COPY $v9
151  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(s128) = COPY $v10
152  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(s128) = COPY $v11
153  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(s128) = COPY $v12
154  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(s128) = COPY $v13
155  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
156entry:
157  ret void
158}
159
160