xref: /llvm-project/llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-fp128.ll (revision 6126356d829be32e2195b8ddf8b908ab417ff7f5)
1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -global-isel \
3; RUN:     -verify-machineinstrs -stop-after=irtranslator < %s | FileCheck %s
4
5; Passing ppc_fp128 in registers (in fp registers as f64)
6define void @test_ppc_fp128_1(ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d, ppc_fp128 %e) {
7  ; CHECK-LABEL: name: test_ppc_fp128_1
8  ; CHECK: bb.1.entry:
9  ; CHECK-NEXT:   liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10
10  ; CHECK-NEXT: {{  $}}
11  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $f2
12  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $f1
13  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64)
14  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $f4
15  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $f3
16  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY2]](s64), [[COPY3]](s64)
17  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s64) = COPY $f6
18  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(s64) = COPY $f5
19  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY4]](s64), [[COPY5]](s64)
20  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(s64) = COPY $f8
21  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(s64) = COPY $f7
22  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY6]](s64), [[COPY7]](s64)
23  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(s64) = COPY $f10
24  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(s64) = COPY $f9
25  ; CHECK-NEXT:   [[MV4:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY8]](s64), [[COPY9]](s64)
26  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
27entry:
28  ret void
29}
30
31define void @test_ppc_fp128_2(i32 %a, i32 %b, ppc_fp128 %c, i32 %d) {
32  ; CHECK-LABEL: name: test_ppc_fp128_2
33  ; CHECK: bb.1.entry:
34  ; CHECK-NEXT:   liveins: $f1, $f2, $x3, $x4, $x7
35  ; CHECK-NEXT: {{  $}}
36  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x3
37  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
38  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x4
39  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
40  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $f2
41  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $f1
42  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY2]](s64), [[COPY3]](s64)
43  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s64) = COPY $x7
44  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)
45  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
46entry:
47  ret void
48}
49
50define void @test_ppc_fp128_3(ppc_fp128 %a, i32 %b, ppc_fp128 %c, i32 %d, i32 %e) {
51  ; CHECK-LABEL: name: test_ppc_fp128_3
52  ; CHECK: bb.1.entry:
53  ; CHECK-NEXT:   liveins: $f1, $f2, $f3, $f4, $x5, $x8, $x9
54  ; CHECK-NEXT: {{  $}}
55  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $f2
56  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $f1
57  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64)
58  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x5
59  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)
60  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $f4
61  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s64) = COPY $f3
62  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY3]](s64), [[COPY4]](s64)
63  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(s64) = COPY $x8
64  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY5]](s64)
65  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(s64) = COPY $x9
66  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY6]](s64)
67  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
68entry:
69  ret void
70}
71
72; Passing fp128 in registers (in vector registers)
73define void @test_fp128_1(fp128 %a, fp128 %b, fp128 %c, fp128 %d, fp128 %e) {
74  ; CHECK-LABEL: name: test_fp128_1
75  ; CHECK: bb.1.entry:
76  ; CHECK-NEXT:   liveins: $v2, $v3, $v4, $v5, $v6
77  ; CHECK-NEXT: {{  $}}
78  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s128) = COPY $v2
79  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s128) = COPY $v3
80  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s128) = COPY $v4
81  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s128) = COPY $v5
82  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s128) = COPY $v6
83  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
84entry:
85  ret void
86}
87
88define void @test_fp128_2(i32 %a, i32 %b, fp128 %c, i32 %d) {
89  ; CHECK-LABEL: name: test_fp128_2
90  ; CHECK: bb.1.entry:
91  ; CHECK-NEXT:   liveins: $v2, $x3, $x4, $x7
92  ; CHECK-NEXT: {{  $}}
93  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x3
94  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
95  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x4
96  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
97  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s128) = COPY $v2
98  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $x7
99  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY3]](s64)
100  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
101entry:
102  ret void
103}
104
105define void @test_fp128_3(fp128 %a, i32 %b, fp128 %c, i32 %d, i32 %e) {
106  ; CHECK-LABEL: name: test_fp128_3
107  ; CHECK: bb.1.entry:
108  ; CHECK-NEXT:   liveins: $v2, $v3, $x5, $x9, $x10
109  ; CHECK-NEXT: {{  $}}
110  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s128) = COPY $v2
111  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x5
112  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
113  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s128) = COPY $v3
114  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $x9
115  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY3]](s64)
116  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s64) = COPY $x10
117  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)
118  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm
119entry:
120  ret void
121}
122
123